{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,7]],"date-time":"2025-08-07T08:59:16Z","timestamp":1754557156525,"version":"3.38.0"},"reference-count":31,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,8]]},"DOI":"10.1109\/dsd.2011.10","type":"proceedings-article","created":{"date-parts":[[2011,10,13]],"date-time":"2011-10-13T16:43:29Z","timestamp":1318524209000},"page":"39-46","source":"Crossref","is-referenced-by-count":24,"title":["A Cost Effective Centralized Adaptive Routing for Networks-on-Chip"],"prefix":"10.1109","author":[{"given":"Ran","family":"Manevich","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Israel","family":"Cidon","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Avinoam","family":"Kolodny","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Isask'har","family":"Walter","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shmuel","family":"Wimer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"ITRS - International Technology Roadmap for Semiconductors","year":"0","key":"ref31"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454128"},{"key":"ref10","article-title":"Near-optimal worst-case throughput routing for two-dimensional mesh networks","author":"seo","year":"0","journal-title":"The Proceedings of the 32nd Annual International Symposium on Computer Architecture"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2007.31"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2007.42"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2009.5071465"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/71.250114"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/71.219761"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/185675.185682"},{"key":"ref17","article-title":"The odd-even turn model for adaptive routing","author":"chiu","year":"2000","journal-title":"IEEE Trans on Parallel and Distributed Systems"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859641"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996638"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.99"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/2.982916"},{"year":"0","key":"ref27","article-title":"SNOPT 7.2 solver"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2004.03.003"},{"key":"ref6","article-title":"Routing and addressing problems in large metropolitan-scale intemetworks","author":"finn","year":"1987","journal-title":"Tech Rep ISI\/RR-87&#x2013;180 Information Sciences Institute"},{"key":"ref5","article-title":"Tile processor: embedded multicore for networking and multimedia","author":"agarwal","year":"0","journal-title":"Proc Hot Chips II Symp High Performance Chips"},{"key":"ref29","doi-asserted-by":"crossref","first-page":"24","DOI":"10.1109\/ISCA.1995.524546","article-title":"The SPLASH-2 programs: characterization and methodological considerations","author":"woo","year":"1995","journal-title":"Proceedings 22nd Annual International Symposium on Computer Architecture ISCA"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/800076.802479"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MCOM.1986.1092937"},{"key":"ref2","doi-asserted-by":"crossref","DOI":"10.1016\/j.sysarc.2003.07.004","article-title":"QNoC: QoS architecture and design process for network-on-chip","author":"bolotin","year":"2004","journal-title":"Journal of Systems Architecture Special Issue on Network on Chip"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/215399.215455"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MCAS.2004.1330747"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1147125"},{"key":"ref22","article-title":"Regional congestion awareness for load balance in networks-on-chip","author":"gratz","year":"0","journal-title":"International Symposium on High-Performance Computer Architecture"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2004.8"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/1854153.1854178"},{"key":"ref23","article-title":"Destination-based adaptive routing on 2D mesh networks","author":"ramaujam","year":"0","journal-title":"Proceedings of the ACM\/IEEE symposium on Architecture for networking and communications systems"},{"journal-title":"AIMMS optimization software for mathematical programming","year":"0","key":"ref26"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/dMEMS.2010.18"}],"event":{"name":"2011 14th Euromicro Conference on Digital System Design (DSD)","start":{"date-parts":[[2011,8,31]]},"location":"Oulu, Finland","end":{"date-parts":[[2011,9,2]]}},"container-title":["2011 14th Euromicro Conference on Digital System Design"],"original-title":[],"link":[{"URL":"https:\/\/summer-heart-0930.chufeiyun1688.workers.dev:443\/http\/xplorestaging.ieee.org\/ielx5\/6036122\/6037383\/06037391.pdf?arnumber=6037391","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,12]],"date-time":"2025-03-12T21:28:32Z","timestamp":1741814912000},"score":1,"resource":{"primary":{"URL":"https:\/\/summer-heart-0930.chufeiyun1688.workers.dev:443\/http\/ieeexplore.ieee.org\/document\/6037391\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,8]]},"references-count":31,"URL":"https:\/\/summer-heart-0930.chufeiyun1688.workers.dev:443\/https\/doi.org\/10.1109\/dsd.2011.10","relation":{},"subject":[],"published":{"date-parts":[[2011,8]]}}}