{"id":"https://openalex.org/W1977825116","doi":"https://doi.org/10.1109/tc.1972.5008985","title":"A Note on Three-Valued Logic Simulation","display_name":"A Note on Three-Valued Logic Simulation","publication_year":1972,"publication_date":"1972-04-01","ids":{"openalex":"https://openalex.org/W1977825116","doi":"https://doi.org/10.1109/tc.1972.5008985","mag":"1977825116"},"language":"en","primary_location":{"id":"doi:10.1109/tc.1972.5008985","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1972.5008985","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110173607","display_name":"Melvin A. Breuer","orcid":null},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Melvin A. Breuer","raw_affiliation_strings":["Department of Electrical Engineering, University of Southern California, Los Angeles, CA, USA","Department of Electrical Engineering, University of Southern California, Los Angeles, Calif. 90007"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Southern California, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I1174212"]},{"raw_affiliation_string":"Department of Electrical Engineering, University of Southern California, Los Angeles, Calif. 90007","institution_ids":["https://openalex.org/I1174212"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5110173607"],"corresponding_institution_ids":["https://openalex.org/I1174212"],"apc_list":null,"apc_paid":null,"fwci":3.19278466,"has_fulltext":false,"cited_by_count":65,"citation_normalized_percentile":{"value":0.90103093,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"C-21","issue":"4","first_page":"399","last_page":"402"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.989799976348877,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11975","display_name":"Evolutionary Algorithms and Applications","score":0.9753000140190125,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reset","display_name":"Reset (finance)","score":0.7384843826293945},{"id":"https://openalex.org/keywords/logic-simulation","display_name":"Logic simulation","score":0.7194336652755737},{"id":"https://openalex.org/keywords/complement","display_name":"Complement (music)","score":0.661789059638977},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.6587119102478027},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6446641087532043},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.6050337553024292},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5582098364830017},{"id":"https://openalex.org/keywords/logic-optimization","display_name":"Logic optimization","score":0.5579349398612976},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.5515925884246826},{"id":"https://openalex.org/keywords/hazard","display_name":"Hazard","score":0.497905969619751},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.46722421050071716},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.46309614181518555},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.4332771897315979},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4036765992641449},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3528537154197693},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3452598452568054},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2266136109828949},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10775643587112427},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10121718049049377}],"concepts":[{"id":"https://openalex.org/C2779795794","wikidata":"https://www.wikidata.org/wiki/Q7315343","display_name":"Reset (finance)","level":2,"score":0.7384843826293945},{"id":"https://openalex.org/C64859876","wikidata":"https://www.wikidata.org/wiki/Q173673","display_name":"Logic simulation","level":3,"score":0.7194336652755737},{"id":"https://openalex.org/C112313634","wikidata":"https://www.wikidata.org/wiki/Q7886648","display_name":"Complement (music)","level":5,"score":0.661789059638977},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.6587119102478027},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6446641087532043},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.6050337553024292},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5582098364830017},{"id":"https://openalex.org/C28449271","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Logic optimization","level":4,"score":0.5579349398612976},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.5515925884246826},{"id":"https://openalex.org/C49261128","wikidata":"https://www.wikidata.org/wiki/Q1132455","display_name":"Hazard","level":2,"score":0.497905969619751},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.46722421050071716},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.46309614181518555},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.4332771897315979},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4036765992641449},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3528537154197693},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3452598452568054},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2266136109828949},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10775643587112427},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10121718049049377},{"id":"https://openalex.org/C178790620","wikidata":"https://www.wikidata.org/wiki/Q11351","display_name":"Organic chemistry","level":1,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C188082640","wikidata":"https://www.wikidata.org/wiki/Q1780899","display_name":"Complementation","level":4,"score":0.0},{"id":"https://openalex.org/C106159729","wikidata":"https://www.wikidata.org/wiki/Q2294553","display_name":"Financial economics","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C127716648","wikidata":"https://www.wikidata.org/wiki/Q104053","display_name":"Phenotype","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.1972.5008985","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1972.5008985","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.47999998927116394,"display_name":"Climate action","id":"https://metadata.un.org/sdg/13"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2002133727","https://openalex.org/W2023199338","https://openalex.org/W2033724727","https://openalex.org/W2120688461"],"related_works":["https://openalex.org/W3129977055","https://openalex.org/W2101877870","https://openalex.org/W2386022279","https://openalex.org/W1488117239","https://openalex.org/W1966764473","https://openalex.org/W4387905179","https://openalex.org/W2356140560","https://openalex.org/W2370649629","https://openalex.org/W2363153189","https://openalex.org/W4372324531"],"abstract_inverted_index":{"In":[0],"this":[1],"note":[2],"we":[3],"discuss":[4],"a":[5,33,45],"few":[6],"attributes":[7],"and":[8,23,35,42],"pitfalls":[9],"of":[10,32],"three-valued":[11],"(0,":[12],"1,":[13],"u)":[14],"digital":[15],"logic":[16,31],"simulation.":[17],"The":[18],"areas":[19],"covered":[20],"include":[21],"hazard":[22],"race":[24],"detection,":[25,27],"fault":[26],"verifying":[28],"the":[29,36],"reset":[30],"machine,":[34],"problems":[37],"encountered":[38],"with":[39],"self-timing":[40],"circuits":[41],"in":[43],"employing":[44],"complement":[46],"for":[47],"u.":[48]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}