<?xml version="1.0"?>
<dblpperson name="Abdelmalek Si-Merabet" pid="228/2460" n="6">
<person key="homepages/228/2460" mdate="2018-10-22">
<author pid="228/2460">Abdelmalek Si-Merabet</author>
</person>
<r><inproceedings key="conf/dsd/TehraniGSD21" mdate="2021-10-15">
<author pid="240/7730">Etienne Tehrani</author>
<author pid="43/6324">Tarik Graba</author>
<author pid="228/2460">Abdelmalek Si-Merabet</author>
<author pid="52/4689">Jean-Luc Danger</author>
<title>RSM Protection of the PRESENT Lightweight Cipher as a RISC-V Extension.</title>
<pages>325-332</pages>
<year>2021</year>
<booktitle>DSD</booktitle>
<ee>https://doi.org/10.1109/DSD53832.2021.00056</ee>
<crossref>conf/dsd/2021</crossref>
<url>db/conf/dsd/dsd2021.html#TehraniGSD21</url>
</inproceedings>
</r>
<r><inproceedings key="conf/cosade/DangerFGHKSTP20" mdate="2021-02-05">
<author pid="52/4689">Jean-Luc Danger</author>
<author pid="221/0531">Adrien Facon</author>
<author pid="86/2396">Sylvain Guilley</author>
<author pid="12/296">Karine Heydemann</author>
<author pid="91/6876">Ulrich K&#252;hne</author>
<author pid="228/2460">Abdelmalek Si-Merabet</author>
<author pid="157/3760">Micha&#235;l Timbert</author>
<author pid="284/6321">Baptiste Pecatte</author>
<title>Processor Anchor to Increase the Robustness Against Fault Injection and Cyber Attacks.</title>
<pages>254-274</pages>
<year>2020</year>
<booktitle>COSADE</booktitle>
<ee>https://doi.org/10.1007/978-3-030-68773-1_12</ee>
<crossref>conf/cosade/2020</crossref>
<url>db/conf/cosade/cosade2020.html#DangerFGHKSTP20</url>
</inproceedings>
</r>
<r><inproceedings key="conf/dsd/TehraniGSD20" mdate="2020-10-14">
<author pid="240/7730">Etienne Tehrani</author>
<author pid="43/6324">Tarik Graba</author>
<author pid="228/2460">Abdelmalek Si-Merabet</author>
<author pid="52/4689">Jean-Luc Danger</author>
<title>RISC-V Extension for Lightweight Cryptography.</title>
<pages>222-228</pages>
<year>2020</year>
<booktitle>DSD</booktitle>
<ee>https://doi.org/10.1109/DSD51259.2020.00045</ee>
<crossref>conf/dsd/2020</crossref>
<url>db/conf/dsd/dsd2020.html#TehraniGSD20</url>
</inproceedings>
</r>
<r><inproceedings key="conf/icecsys/TehraniGSGD19" mdate="2020-02-03">
<author pid="240/7730">Etienne Tehrani</author>
<author pid="43/6324">Tarik Graba</author>
<author pid="228/2460">Abdelmalek Si-Merabet</author>
<author pid="86/2396">Sylvain Guilley</author>
<author pid="52/4689">Jean-Luc Danger</author>
<title>Classification of Lightweight Block Ciphers for Specific Processor Accelerated Implementations.</title>
<pages>747-750</pages>
<year>2019</year>
<booktitle>ICECS</booktitle>
<ee>https://doi.org/10.1109/ICECS46596.2019.8965156</ee>
<crossref>conf/icecsys/2019</crossref>
<url>db/conf/icecsys/icecsys2019.html#TehraniGSGD19</url>
</inproceedings>
</r>
<r><inproceedings key="conf/dsd/DangerYGMSSMN18" mdate="2023-03-23">
<author pid="52/4689">Jean-Luc Danger</author>
<author pid="185/3955">Risa Yashiro</author>
<author pid="43/6324">Tarik Graba</author>
<author pid="64/1912">Yves Mathieu</author>
<author pid="228/2460">Abdelmalek Si-Merabet</author>
<author pid="04/4429">Kazuo Sakiyama</author>
<author pid="15/5009">Noriyuki Miura</author>
<author orcid="0000-0002-0625-9107" pid="95/2029">Makoto Nagata</author>
<title>Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology.</title>
<pages>508-515</pages>
<year>2018</year>
<booktitle>DSD</booktitle>
<ee>https://doi.org/10.1109/DSD.2018.00090</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/DSD.2018.00090</ee>
<crossref>conf/dsd/2018</crossref>
<url>db/conf/dsd/dsd2018.html#DangerYGMSSMN18</url>
</inproceedings>
</r>
<r><inproceedings key="conf/dsd/DangerFGHKMT18" mdate="2023-03-23">
<author pid="52/4689">Jean-Luc Danger</author>
<author pid="221/0531">Adrien Facon</author>
<author pid="86/2396">Sylvain Guilley</author>
<author pid="12/296">Karine Heydemann</author>
<author pid="91/6876">Ulrich K&#252;hne</author>
<author pid="228/2460">Abdelmalek Si-Merabet</author>
<author pid="157/3760">Micha&#235;l Timbert</author>
<title>CCFI-Cache: A Transparent and Flexible Hardware Protection for Code and Control-Flow Integrity.</title>
<pages>529-536</pages>
<year>2018</year>
<booktitle>DSD</booktitle>
<ee>https://doi.org/10.1109/DSD.2018.00093</ee>
<ee>https://doi.ieeecomputersociety.org/10.1109/DSD.2018.00093</ee>
<crossref>conf/dsd/2018</crossref>
<url>db/conf/dsd/dsd2018.html#DangerFGHKMT18</url>
</inproceedings>
</r>
<coauthors n="14" nc="1">
<co c="0"><na f="d/Danger:Jean=Luc" pid="52/4689">Jean-Luc Danger</na></co>
<co c="0"><na f="f/Facon:Adrien" pid="221/0531">Adrien Facon</na></co>
<co c="0"><na f="g/Graba:Tarik" pid="43/6324">Tarik Graba</na></co>
<co c="0"><na f="g/Guilley:Sylvain" pid="86/2396">Sylvain Guilley</na></co>
<co c="0"><na f="h/Heydemann:Karine" pid="12/296">Karine Heydemann</na></co>
<co c="0"><na f="k/K=uuml=hne:Ulrich" pid="91/6876">Ulrich K&#252;hne</na></co>
<co c="0"><na f="m/Mathieu:Yves" pid="64/1912">Yves Mathieu</na></co>
<co c="0"><na f="m/Miura:Noriyuki" pid="15/5009">Noriyuki Miura</na></co>
<co c="0"><na f="n/Nagata:Makoto" pid="95/2029">Makoto Nagata</na></co>
<co c="0"><na f="p/Pecatte:Baptiste" pid="284/6321">Baptiste Pecatte</na></co>
<co c="0"><na f="s/Sakiyama:Kazuo" pid="04/4429">Kazuo Sakiyama</na></co>
<co c="0"><na f="t/Tehrani:Etienne" pid="240/7730">Etienne Tehrani</na></co>
<co c="0"><na f="t/Timbert:Micha=euml=l" pid="157/3760">Micha&#235;l Timbert</na></co>
<co c="0"><na f="y/Yashiro:Risa" pid="185/3955">Risa Yashiro</na></co>
</coauthors>
</dblpperson>

