"MADiC: A 3nm 7.4TOPS/mm2, 17.4TOPS/W Generative Diffusion ..."

Shih-Wei Hsieh et al. (2026)

> Home

Details and statistics

DOI: 10.1109/ISSCC49663.2026.11409294

access: closed

type: Conference or Workshop Paper

metadata version: 2026-03-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isscc/HsiehCTLCHHCCCCYKUCSTCH26
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/HsiehCTLCHHCCCCYKUCSTCH26
Shih-Wei Hsieh, Yi-Syuan Chen, Ping-Yuan Tsai, Ming-Hung Lin, Chia-Yuan Cheng, Lien-Feng Hsu, Po-Hao Huang, Hung-Wei Chih, Po-Han Chiang, Chia-Ming Chang, Ming-Hsuan Chiang, Chia-Hung Yuan, Sheng-Po Kuo, Viswanath Uggu, Chun-Kun Chan, Ming-En David Shih, Yu-Cheng Tseng, Hsin-Ping Cheng, Stan Huang, Chia-Ping Chen, Shen-Kai Chang, Chih-Ming Wang, Po-Yu Yeh, Jett Liu, Yung-Chang Chang, Chi-Cheng Ju, Yucheun Kevin Jou:
MADiC: A 3nm 7.4TOPS/mm², 17.4TOPS/W Generative Diffusion Accelerator Enabled by Hardware-Compiler Co-Optimization of Memory Hierarchy and Operator Parallelism. ISSCC 2026: 1-3

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.