IBM System z10: Difference between revisions
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{{Short description|Line of mainframe computers}} |
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{{Infobox information appliance |
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| name = IBM System z10 |
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| logo = File:IBM logo.svg |
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| logo_size = 120px |
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| logo_caption = |
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| image = Image:IBM System Z10 mainframe.jpg |
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| image_size = 270px |
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| caption = IBM System z10 EC Mainframe |
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| type = [[Mainframe]] |
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| designfirm = |
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| manufacturer = [[IBM]] |
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| release date = {{Start date and age|2008}} |
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| discontinued = 2011 |
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| family = [[IBM Z]] |
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| cost = |
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| processor = |
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| frequency = |
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| memory = |
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| slots = |
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| coprocessor = |
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| connection = |
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| ports = |
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| power = |
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| speed = |
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| language = |
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| weight = |
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| dimensions = |
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| predecessor = [[IBM System z9]] |
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| related = |
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| successor = [[IBM zEnterprise System]] |
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}} |
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{{IBM mainframes}} |
{{IBM mainframes}} |
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[[Image:Z10Mainframe2.JPG|thumb|right|IBM System z10 EC Mainframe]] |
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'''IBM System z10''' is a line of [[IBM]] [[Mainframe computer|mainframes]]. The z10 Enterprise Class (EC) was announced on February 26, 2008. On October 21, 2008, IBM announced the z10 Business Class (BC), a scaled |
'''IBM System z10''' is a line of [[IBM]] [[Mainframe computer|mainframes]]. The z10 Enterprise Class (EC) was announced on February 26, 2008. On October 21, 2008, IBM announced the z10 Business Class (BC), a scaled-down version of the z10 EC. The System z10 represents the first model family powered by the [[IBM z10 (microprocessor)|z10 quad core processing engine]]. Its successors are the [[zEnterprise System]] models introduced in 2010 and 2012. |
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==Features== |
==Features== |
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===Processors=== |
===Processors=== |
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The number of "characterizable" (or configurable) processing units (PUs) is indicated in the ''hardware'' model designation (e.g., the E26 has 26 characterizable PUs). Depending on the ''capacity'' model a PU can be characterized as |
The number of "characterizable" (or configurable) processing units (PUs) is indicated in the ''hardware'' model designation (e.g., the E26 has 26 characterizable PUs). Depending on the ''capacity'' model, a PU can be characterized as a [[IBM z10 (microprocessor)|Central Processor]] (CP), [[Integrated Facility for Linux]] (IFL) processor, [[z Application Assist Processor]] (zAAP), [[zIIP|z10 Integrated Information Processor]] (zIIP), or Internal [[Coupling Facility]] (ICF) processor. (The specialty processors are all identical and IBM locks out certain functions based on what the processor is characterized as.) It is also possible to configure additional [[System Assist Processor]]s, but most customers find the mandatory minimum SAP allocation sufficient. |
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There are more physical PUs in a machine than characterizable PUs. For example, the E12 has 17 PUs, of which only 12 are characterizable. The remainder is a mixture of spares and mandatory minimum SAPs. The SAPs provide I/O assistance, system accounting, and other critical system functions. |
There are more physical PUs in a machine than characterizable PUs. For example, the E12 has 17 PUs, of which only 12 are characterizable. The remainder is a mixture of spares and mandatory minimum SAPs. The SAPs provide I/O assistance, system accounting, and other critical system functions. |
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===Operating |
===Operating systems=== |
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The System z10 supports the following IBM operating systems: [[z/OS]], [[z/VSE]], [[z/VM]], and [[z/TPF]] (and its immediate predecessor, TPF/ESA). Other operating systems available include [[Linux on System z]], [[OpenSolaris for System z]], [[UTS (Mainframe UNIX)|UTS]], and [[MUSIC/SP]] (at least in principle). |
The System z10 supports the following IBM operating systems: [[z/OS]], [[z/VSE]], [[z/VM]], and [[z/TPF]] (and its immediate predecessor, TPF/ESA). Other operating systems available include [[Linux on System z]], [[OpenSolaris for System z]], [[UTS (Mainframe UNIX)|UTS]], and [[MUSIC/SP]] (at least in principle). A product in development by Mantissa Corporation, z/VOS, was announced in 2008 to run other operating systems developed for x86 architectures (such as [[Windows]] and x86 versions of Linux),<ref>{{Cite web|url=http://enterprisesystemsmedia.com/article/windows-and-other-x86-operating-systems-on-system-z|title=Windows on System z|website=enterprisesystemsmedia.com|language=en|access-date=2019-09-30|archive-date=2019-09-30|archive-url=https://web.archive.org/web/20190930114511/http://enterprisesystemsmedia.com/article/windows-and-other-x86-operating-systems-on-system-z|url-status=dead}}</ref> later renamed to z86VM<ref>{{Cite web|url=http://www.mantissa.com/blog/63|archive-url=https://web.archive.org/web/20120220140715/http://www.mantissa.com/blog/63|url-status=dead|archive-date=2012-02-20|title=z86VM's blog {{!}} Mantissa Corporation|date=2012-02-20|access-date=2019-09-30}}</ref> and the Linux support is in beta, and "has no plans to support 64 bit", but as of 2019, it has a bug for Windows so not even a beta version for it is available.<ref>{{Cite web|url=http://www.mantissa.com/mantissa-product-families/virtualization/z86vm-faq-2/|title=zEnterprise Virtualization with z86VM|website=Mantissa Corporation|quote=And we presently have a bug in our Plug and Play BIOS processing that is inhibiting Windows from booting…we’ll get there soon, though!|language=en-US|access-date=2019-09-30}}</ref> |
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===New |
===New features=== |
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{{Unreferenced section|date=December 2008}} <!-- Lots of new information, but none of it is sourced --> |
{{Unreferenced section|date=December 2008}} <!-- Lots of new information, but none of it is sourced --> |
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In addition to much higher performance, System z10 introduced a number of new mainframe features. Some of the more notable enhancements include: |
In addition to much higher performance, System z10 introduced a number of new mainframe features. Some of the more notable enhancements include: |
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====Cryptography==== |
====Cryptography==== |
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The System z10 adds hardware-based 192-bit and 256-bit [[Advanced Encryption Standard]] (AES) in addition to the 128- |
The System z10 adds hardware-based 192-bit and 256-bit [[Advanced Encryption Standard]] (AES) in addition to the 128-bit AES support already available on the [[IBM System z9|z9]]. |
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====Decimal |
====Decimal floating point==== |
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The System z9 was the first commercial server to add [[IEEE 754-2008|IEEE 754]] decimal floating point instructions, although these instructions were implemented in microcode with some hardware assists. The System z10 implements the main IEEE 754 decimal floating point operations in a built-in, integral component of each processor core and instruction set architecture. As examples, Enterprise [[PL/I]], XL C, and the z/OS Java [[BigDecimal]] class can exploit hardware decimal floating point. |
The System z9 was the first commercial server to add [[IEEE 754-2008|IEEE 754]] decimal floating point instructions, although these instructions were implemented in microcode with some hardware assists. The System z10 implements the main IEEE 754 decimal floating point operations in a built-in, integral component of each processor core and instruction set architecture. As examples, Enterprise [[PL/I]], XL C, and the z/OS Java [[BigDecimal]] class can exploit hardware decimal floating point. |
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====New |
====New instructions==== |
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The System z10 processor adds numerous new instructions, primarily concentrated on improving the efficiency and performance of compiled code. |
The System z10 processor adds numerous new instructions, primarily concentrated on improving the efficiency and performance of compiled code. The z/OS [[Java Development Kit|Java SDK]] exploits these additional instructions when running on a z10. On July 7, 2009, IBM disclosed [[z/VM]] Version 6.1,<ref>{{cite web |
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| url=http://www-01.ibm.com/common/ssi/rep_ca/7/897/ENUS209-207/ENUS209-207.PDF |
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| title=Preview: IBM z/VM V6.1 - Foundation for future virtualization growth |
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| work=IBM United States Software Announcement 209-207 |
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| publisher=[[IBM]] |
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| date=2009-07-07 |
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| access-date=2013-04-03}}</ref> a new version which requires the additional instructions only available in the System z10 and future models. |
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==== |
====z/VM LPAR support==== |
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On the System z10, and with the appropriate version of z/VM, a single logical partition ([[LPAR]]) can now span all processor types. Previously, IFLs (Linux processors) had to reside in their own separate LPAR(s). This capability improves operational efficiency and simplifies configuration. The z10 also supports much faster z/VM startup from [[DVD-RAM]]. Consequently, IBM started providing a no-charge, downloadable<ref>{{cite web |
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On July 7, 2009, IBM disclosed [[z/VM]] Version 6.1 [http://www.ibm.com/common/ssi/rep_ca/7/897/ENUS209-207/ENUS209-207.PDF], a new version which requires the additional instructions only available in the System z10 and future models. At the same time, IBM declared a new Architecture Level Set (ALS) for [[z/Architecture]] which includes these new instructions. Thus the System z10 is the first machine to implement the new ALS. A mainframe ALS represents uniform compatibility with IBM's (and most vendors') mainframe software products. Thus the System z10 is distinguished from earlier machines because it will run z/VM Version 6.1 and other, future software that requires the new ALS. The first z/Architecture ALS ("ARCHLVL 2") was first implemented in the zSeries z900 model, introduced in the year 2000, and z/VM Version 5 was also the first major software product to require ARCHLVL 2. |
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| url=http://www.vm.ibm.com/eval/ |
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| title=z/VM V5.3 Evaluation Edition |
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| publisher=IBM |
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| date=2010-07-08 |
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| access-date=2013-04-03}}</ref> z/VM Evaluation Edition. |
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==== |
====Capacity on Demand enhancements==== |
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On the System z10, and with the appropriate version of z/VM, a single Logical Partition ([[LPAR]]) can now span all processor types. Previously IFLs (Linux processors) had to reside in their own separate LPAR(s). This capability improves operational efficiency and simplifies configuration. The z10 also supports much faster z/VM startup from [[DVD-RAM]]. Consequently IBM started providing a no charge, downloadable [http://www.vm.ibm.com/eval/ z/VM Evaluation Edition]. |
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====Capacity On Demand Enhancements==== |
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System z10 has a simplified, more automated architecture for activation and deactivation of [[Capacity on Demand]] processing. In particular, the machine no longer requires immediate, direct contact with IBM for activation of CoD features. IBM also introduced a new Capacity for Planned Events (CPE) offering, which allows mainframe owners to activate CPU capacity temporarily to facilitate moving machines between data centers, upgrades, and other routine management tasks at a much lower cost. |
System z10 has a simplified, more automated architecture for activation and deactivation of [[Capacity on Demand]] processing. In particular, the machine no longer requires immediate, direct contact with IBM for activation of CoD features. IBM also introduced a new Capacity for Planned Events (CPE) offering, which allows mainframe owners to activate CPU capacity temporarily to facilitate moving machines between data centers, upgrades, and other routine management tasks at a much lower cost. |
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====InfiniBand |
====InfiniBand coupling==== |
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System z10 provides [[InfiniBand]] coupling options for [[IBM Parallel Sysplex|Parallel Sysplex]]. Some of these options are available for retrofit to the System z9. |
System z10 provides [[InfiniBand]] coupling options for [[IBM Parallel Sysplex|Parallel Sysplex]]. Some of these options are available for retrofit to the System z9. |
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==Models== |
==Models== |
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{| class="wikitable mw-collapsible mw-collapsed" style="min-width: 75%; font-size: 80%" |
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! colspan="7" style="text-align:center;" |IBM System z10 product line |
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|- |
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! |
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! |
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!2007 |
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!2008 |
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!2009 |
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!2010 |
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!2011 |
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|- |
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! colspan="7" |Main frames |
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|- |
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| rowspan="5" |Dual-rack |
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! rowspan="6" | |
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! rowspan="5" |[[IBM System z9#Enterprise Class|z9 EC]] |
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| colspan="2" |z10 E12 |
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! colspan="2" rowspan="5" |zEnterprise EC |
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|- |
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| colspan="2" |z10 E26 |
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|- |
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| colspan="2" |z10 E40 |
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|- |
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| colspan="2" |z10 E56 |
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|- |
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| colspan="2" |z10 E64 |
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|- |
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|Single-rack |
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![[IBM System z9#Business Class|z9 BC]] |
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| colspan="3" |z10 E10 |
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!zEnterprise BC |
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|} |
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[[File:IBM mainframe Z10.jpg|thumb|System z10 Enterprise Class mainframe]] |
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===Enterprise Class=== |
===Enterprise Class=== |
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Released on February 26, 2008, the System z10 Enterprise Class is available in five hardware models: E12, E26, E40, E56, and E64. Each is of the machine type 2097.<ref name="IBMWebz">{{cite web| |
Released on February 26, 2008, the System z10 Enterprise Class is available in five hardware models: E12, E26, E40, E56, and E64. Each is of the machine type 2097.<ref name="IBMWebz">{{cite web |
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| url=http://www-03.ibm.com/systems/z/hardware/ |
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| archive-url=https://web.archive.org/web/20060408174201/http://www-03.ibm.com/systems/z/hardware/ |
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| url-status=dead |
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| archive-date=April 8, 2006 |
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| title=System z hardware |
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| publisher=IBM |
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| access-date=2013-04-03}}</ref> The Enterprise Class PU cores (four per chip) operate at speeds of 4.4 [[Hertz|GHz]]. The processors are stored in one to four compartments referred to as "books". Each book comprises a multi-chip module (MCM) of processing units (PUs) and memory cards (including multi-level cache memory). The number of PUs in each book is based upon the model number:<ref>{{cite web |
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| url=http://www.personal.psu.edu/alw/shr110/IBMz10Features.pdf |
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| title=IBM System z10™ Enterprise Class Overview |
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| first=Harv |
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| last=Emery |
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| work=SHARE 110 in Orlando, Session 2832 |
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| date=2008-02-27 |
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| archive-url=https://web.archive.org/web/20080911115005/http://www.personal.psu.edu/alw/shr110/IBMz10Features.pdf |
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| archive-date=2008-09-11 |
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| url-status=dead |
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| access-date=2013-04-03}}</ref> |
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{| class="wikitable" |
{| class="wikitable" style="min-width: 75%; font-size: 80%" |
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|- |
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! Model |
! Model |
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! Books / PUs |
! Books / PUs |
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! Std SAPs |
! Std SAPs |
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! Std Spares |
! Std Spares |
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! Standard |
! Standard memory (GB) |
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! Flexible |
! Flexible memory (GB) |
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|- |
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| E12 |
| E12 |
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===Business Class=== |
===Business Class=== |
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[[Image: |
[[Image:IBM System z10 BC.jpg|thumb|160px|System z10 BC mainframe]] |
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Released on October 21, 2008, the z10 Business Class has only a single model: E10. Machine type is 2098. It has the same processor chip design and instruction set as the z10 EC but with higher manufacturing yields (3.5 GHz clock speed, one core per chip disabled) and lower cost processor packaging due to reduced cooling and reduced multi-chip shared cache needs. The z10 BC also introduced new, more efficient I/O packaging options. It is possible to configure a z10 BC without spare cores if desired, although such maximally configured z10s still fail gracefully in the unlikely event there's a core failure: the system will move any work from the failed core to surviving cores automatically, without operating system or software involvement, keeping all applications running, albeit at slightly reduced capacity if there are no spares remaining. |
Released on October 21, 2008, the z10 Business Class has only a single model: E10. Machine type is 2098. It has the same processor chip design and instruction set as the z10 EC but with higher manufacturing yields (3.5 GHz clock speed, one core per chip disabled) and lower cost processor packaging due to reduced cooling and reduced multi-chip shared cache needs. The z10 BC also introduced new, more efficient I/O packaging options. It is possible to configure a z10 BC without spare cores if desired, although such maximally configured z10s still fail gracefully in the unlikely event there's a core failure: the system will move any work from the failed core to surviving cores automatically, without operating system or software involvement, keeping all applications running, albeit at slightly reduced capacity if there are no spares remaining. |
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The following configuration is available:<ref>{{cite web |
The following configuration is available:<ref>{{cite web |
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| url=http://www-03.ibm.com/systems/z/hardware/z10bc/specifications.html |
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| archive-url=https://web.archive.org/web/20090130131041/http://www-03.ibm.com/systems/z/hardware/z10bc/specifications.html |
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| url-status=dead |
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| archive-date=January 30, 2009 |
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| title=IBM System z10 Business Class |
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| publisher=IBM |
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| access-date=2013-04-03}}</ref> |
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{| class="wikitable" |
{| class="wikitable" |
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| Line 140: | Line 237: | ||
! zAAPs / zIIPs |
! zAAPs / zIIPs |
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! ICFs |
! ICFs |
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! Standard |
! Standard memory (GB) |
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|- |
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| E10 |
| E10 |
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===Pricing=== |
===Pricing=== |
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While the baseline model of the z10 EC has a reported price starting at $1,000,000 for a new system, the z10 BC has a reported price starting "under $100,000".<ref>{{cite web |
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| url=https://betanews.com/2008/10/21/ibm-intros-entry-level-system-z10-mainframe-for-under-100-000/ |
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| title=IBM intros entry-level System z10 mainframe for under $100,000 |
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| first=Jacqueline |
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| last= Emigh |
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| date=2008-10-21 |
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| access-date=2017-02-09}}</ref> Actual prices depend on a number of factors including the configuration of the machine (amount of central memory, number of specialty engines, I/O options, etc.), maintenance contracts, government and educational discounts, and finance and leasing terms. |
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IBM can also upgrade machines up to two generations old using new parts, retaining the machine's serial number and numerous frame components. |
IBM can also upgrade machines up to two generations old using new parts, retaining the machine's serial number and numerous frame components. |
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== References == |
== References == |
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{{ |
{{Reflist}} |
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{{s-start}} |
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{{s-bef|before=[[IBM System/390|IBM S/390]]}} |
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{{s-ttl|title=[[IBM Z|IBM System z]]|years=2000 - 2008}} |
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{| class="wikitable" style = "text-align: {{{align|center}}}; font-size: 75%;" |
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|'''[[IBM eServer|eServer]] zSeries'''{{br}}2000 |
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|'''[[IBM System z9|System z9]]'''{{br}}2005 |
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|'''System z10'''{{br}}2008 |
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|} |
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{{s-aft|after=[[IBM zEnterprise System]]}} |
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{{s-end}} |
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== External links == |
== External links == |
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* [ |
* [https://www.ibm.com/it-infrastructure/z ibm.com IBM Z mainframes homepage] |
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* [https://www.ibm.com/it-infrastructure/z/hardware IBM Z current mainframe hardware] |
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* [http://www.ibm.com/common/ssi/fcgi-bin/ssialias?infotype=PM&subtype=SP&appname=STG_ZS_USEN&htmlfid=ZSD03005USEN&attachment=ZSD03005USEN.PDF IBM System z10 Enterprise Class – Datasheet] |
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* {{cite web |
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| url=http://public.dhe.ibm.com/common/ssi/ecm/en/zsd03005usen/ZSD03005USEN.PDF |
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| title=IBM System z10 Enterprise Class: Data Sheet |
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| date=2012-09-25 |
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| publisher=[[IBM]] |
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| access-date=2013-04-03 |
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}}{{Dead link|date=January 2020 |bot=InternetArchiveBot |fix-attempted=yes }} |
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* {{cite web |
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| url=http://www.redbooks.ibm.com/redbooks/pdfs/sg247516.pdf |
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| title=IBM System z10 Enterprise Class Technical Guide |
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| publisher=IBM |
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| date=2009-11-11 |
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| access-date=2013-04-03}} |
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{{DEFAULTSORT:Ibm System Z10}} |
{{DEFAULTSORT:Ibm System Z10}} |
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[[Category:IBM System/360 mainframe line|Z10]] |
[[Category:IBM System/360 mainframe line|Z10]] |
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[[Category:64-bit computers]] |
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[[ru:IBM System z10]] |
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Latest revision as of 20:16, 25 August 2024
 | |
 IBM System z10 EC Mainframe | |
| Manufacturer | IBM |
|---|---|
| Product family | IBM Z |
| Type | Mainframe |
| Release date | 2008 |
| Discontinued | 2011 |
| Predecessor | IBM System z9 |
| Successor | IBM zEnterprise System |
| History of IBM mainframes, 1952–present |
|---|
| Market name |
| Architecture |
IBM System z10 is a line of IBM mainframes. The z10 Enterprise Class (EC) was announced on February 26, 2008. On October 21, 2008, IBM announced the z10 Business Class (BC), a scaled-down version of the z10 EC. The System z10 represents the first model family powered by the z10 quad core processing engine. Its successors are the zEnterprise System models introduced in 2010 and 2012.
Features
[edit]Processors
[edit]The number of "characterizable" (or configurable) processing units (PUs) is indicated in the hardware model designation (e.g., the E26 has 26 characterizable PUs). Depending on the capacity model, a PU can be characterized as a Central Processor (CP), Integrated Facility for Linux (IFL) processor, z Application Assist Processor (zAAP), z10 Integrated Information Processor (zIIP), or Internal Coupling Facility (ICF) processor. (The specialty processors are all identical and IBM locks out certain functions based on what the processor is characterized as.) It is also possible to configure additional System Assist Processors, but most customers find the mandatory minimum SAP allocation sufficient.
There are more physical PUs in a machine than characterizable PUs. For example, the E12 has 17 PUs, of which only 12 are characterizable. The remainder is a mixture of spares and mandatory minimum SAPs. The SAPs provide I/O assistance, system accounting, and other critical system functions.
Operating systems
[edit]The System z10 supports the following IBM operating systems: z/OS, z/VSE, z/VM, and z/TPF (and its immediate predecessor, TPF/ESA). Other operating systems available include Linux on System z, OpenSolaris for System z, UTS, and MUSIC/SP (at least in principle). A product in development by Mantissa Corporation, z/VOS, was announced in 2008 to run other operating systems developed for x86 architectures (such as Windows and x86 versions of Linux),[1] later renamed to z86VM[2] and the Linux support is in beta, and "has no plans to support 64 bit", but as of 2019, it has a bug for Windows so not even a beta version for it is available.[3]
New features
[edit] |
In addition to much higher performance, System z10 introduced a number of new mainframe features. Some of the more notable enhancements include:
Cryptography
[edit]The System z10 adds hardware-based 192-bit and 256-bit Advanced Encryption Standard (AES) in addition to the 128-bit AES support already available on the z9.
Decimal floating point
[edit]The System z9 was the first commercial server to add IEEE 754 decimal floating point instructions, although these instructions were implemented in microcode with some hardware assists. The System z10 implements the main IEEE 754 decimal floating point operations in a built-in, integral component of each processor core and instruction set architecture. As examples, Enterprise PL/I, XL C, and the z/OS Java BigDecimal class can exploit hardware decimal floating point.
New instructions
[edit]The System z10 processor adds numerous new instructions, primarily concentrated on improving the efficiency and performance of compiled code. The z/OS Java SDK exploits these additional instructions when running on a z10. On July 7, 2009, IBM disclosed z/VM Version 6.1,[4] a new version which requires the additional instructions only available in the System z10 and future models.
z/VM LPAR support
[edit]On the System z10, and with the appropriate version of z/VM, a single logical partition (LPAR) can now span all processor types. Previously, IFLs (Linux processors) had to reside in their own separate LPAR(s). This capability improves operational efficiency and simplifies configuration. The z10 also supports much faster z/VM startup from DVD-RAM. Consequently, IBM started providing a no-charge, downloadable[5] z/VM Evaluation Edition.
Capacity on Demand enhancements
[edit]System z10 has a simplified, more automated architecture for activation and deactivation of Capacity on Demand processing. In particular, the machine no longer requires immediate, direct contact with IBM for activation of CoD features. IBM also introduced a new Capacity for Planned Events (CPE) offering, which allows mainframe owners to activate CPU capacity temporarily to facilitate moving machines between data centers, upgrades, and other routine management tasks at a much lower cost.
InfiniBand coupling
[edit]System z10 provides InfiniBand coupling options for Parallel Sysplex. Some of these options are available for retrofit to the System z9.
HiperDispatch
[edit]As the number of cores in the System z machines has grown, IBM engineers have continued to find ways to reduce symmetric multiprocessing (SMP) effects. Adding more cores has diminishing returns in performance due to cache, memory, and I/O contention. The latest effort to reduce these penalties is HiperDispatch, a set of intelligent, cooperative dispatching strategies between the System z10 hardware and z/OS, particularly the z/OS Workload Manager and dispatcher. HiperDispatch steers more processing tasks toward the cores that are "closest" to the cached data the tasks will likely require, minimizing contention for memory and I/O. HiperDispatch helps maintain near-linear SMP scalability and is more relevant to the larger models, but it is enabled by default on all System z10 machines.
Models
[edit]| IBM System z10 product line | ||||||
|---|---|---|---|---|---|---|
| 2007 | 2008 | 2009 | 2010 | 2011 | ||
| Main frames | ||||||
| Dual-rack | z9 EC | z10 E12 | zEnterprise EC | |||
| z10 E26 | ||||||
| z10 E40 | ||||||
| z10 E56 | ||||||
| z10 E64 | ||||||
| Single-rack | z9 BC | z10 E10 | zEnterprise BC | |||
Enterprise Class
[edit]Released on February 26, 2008, the System z10 Enterprise Class is available in five hardware models: E12, E26, E40, E56, and E64. Each is of the machine type 2097.[6] The Enterprise Class PU cores (four per chip) operate at speeds of 4.4 GHz. The processors are stored in one to four compartments referred to as "books". Each book comprises a multi-chip module (MCM) of processing units (PUs) and memory cards (including multi-level cache memory). The number of PUs in each book is based upon the model number:[7]
| Model | Books / PUs | CPs | IFLs / uIFLs | zAAPs / zIIPs | ICFs | Opt SAPs | Std SAPs | Std Spares | Standard memory (GB) | Flexible memory (GB) |
|---|---|---|---|---|---|---|---|---|---|---|
| E12 | 1 / 17 | 0-12 | 0-12 / 0-11 | 0-6 / 0-6 | 0-12 | 0-3 | 3 | 2 | 16 - 352 | NA |
| E26 | 2 / 34 | 0-26 | 0-26 / 0-25 | 0-13 / 0-13 | 0-16 | 0-7 | 6 | 2 | 16 - 752 | 32 - 352 |
| E40 | 3 / 51 | 0-40 | 0-40 / 0-39 | 0-20 / 0-20 | 0-16 | 0-11 | 9 | 2 | 16 - 1136 | 32 - 752 |
| E56 | 4 / 68 | 0-56 | 0-56 / 0-55 | 0-28 / 0-28 | 0-16 | 0-18 | 10 | 2 | 16 - 1520 | 32 - 1132 |
| E64 | 4 / 77 | 0-64 | 0-64 / 0-63 | 0-32 / 0-32 | 0-16 | 0-21 | 11 | 2 | 16 - 1520 | 32 - 1136 |
NOTES:
- A minimum of one CP, IFL, or ICF must ordered with every model.
- For each CP ordered, one zAAP and one zIIP may also be ordered.
- Optional SAPs are required only in some situations when using TPF/ESA or z/TPF.
- Memory figures refer to user-accessible memory. The z10 EC reserves 16GB for HSA (Hardware System Area).
- Sub-capacity (fractional) CP configurations are also available.
Business Class
[edit]
Released on October 21, 2008, the z10 Business Class has only a single model: E10. Machine type is 2098. It has the same processor chip design and instruction set as the z10 EC but with higher manufacturing yields (3.5 GHz clock speed, one core per chip disabled) and lower cost processor packaging due to reduced cooling and reduced multi-chip shared cache needs. The z10 BC also introduced new, more efficient I/O packaging options. It is possible to configure a z10 BC without spare cores if desired, although such maximally configured z10s still fail gracefully in the unlikely event there's a core failure: the system will move any work from the failed core to surviving cores automatically, without operating system or software involvement, keeping all applications running, albeit at slightly reduced capacity if there are no spares remaining.
The following configuration is available:[8]
| Model | CPs | IFLs | zAAPs / zIIPs | ICFs | Standard memory (GB) |
|---|---|---|---|---|---|
| E10 | 1-5 | 1-10 | 0-5 / 0-5 | 1-10 | 4 - 120 (-248 in June, 2009) |
NOTES:
- For each CP ordered, one zAAP and one zIIP may also be ordered.
- Memory figures refer to user-accessible memory. The z10 BC reserves 8GB for HSA (Hardware System Area).
- Sub-capacity (fractional) CP configurations are also available.
Pricing
[edit]While the baseline model of the z10 EC has a reported price starting at $1,000,000 for a new system, the z10 BC has a reported price starting "under $100,000".[9] Actual prices depend on a number of factors including the configuration of the machine (amount of central memory, number of specialty engines, I/O options, etc.), maintenance contracts, government and educational discounts, and finance and leasing terms.
IBM can also upgrade machines up to two generations old using new parts, retaining the machine's serial number and numerous frame components.
See also
[edit]References
[edit]- ^ "Windows on System z". enterprisesystemsmedia.com. Archived from the original on 2019-09-30. Retrieved 2019-09-30.
- ^ "z86VM's blog | Mantissa Corporation". 2012-02-20. Archived from the original on 2012-02-20. Retrieved 2019-09-30.
- ^ "zEnterprise Virtualization with z86VM". Mantissa Corporation. Retrieved 2019-09-30.
And we presently have a bug in our Plug and Play BIOS processing that is inhibiting Windows from booting…we'll get there soon, though!
- ^ "Preview: IBM z/VM V6.1 - Foundation for future virtualization growth" (PDF). IBM United States Software Announcement 209-207. IBM. 2009-07-07. Retrieved 2013-04-03.
- ^ "z/VM V5.3 Evaluation Edition". IBM. 2010-07-08. Retrieved 2013-04-03.
- ^ "System z hardware". IBM. Archived from the original on April 8, 2006. Retrieved 2013-04-03.
- ^ Emery, Harv (2008-02-27). "IBM System z10™ Enterprise Class Overview" (PDF). SHARE 110 in Orlando, Session 2832. Archived from the original (PDF) on 2008-09-11. Retrieved 2013-04-03.
- ^ "IBM System z10 Business Class". IBM. Archived from the original on January 30, 2009. Retrieved 2013-04-03.
- ^ Emigh, Jacqueline (2008-10-21). "IBM intros entry-level System z10 mainframe for under $100,000". Retrieved 2017-02-09.
External links
[edit]- ibm.com IBM Z mainframes homepage
- IBM Z current mainframe hardware
- "IBM System z10 Enterprise Class: Data Sheet" (PDF). IBM. 2012-09-25. Retrieved 2013-04-03.[permanent dead link]
- "IBM System z10 Enterprise Class Technical Guide" (PDF). IBM. 2009-11-11. Retrieved 2013-04-03.