All notable changes to this project will be documented in this file.
The format is based on Keep a Changelog, and this project adheres to Semantic Versioning.
- Fix corruption in CONTROL OUT transfers (and remove
quirk_setup_late_cnak
) - Fix build with
defmt
enabled - Add USBPHYC clock configuration for H7RS series
- Add support for ISO endpoints
- Add support for a full-speed ULPI mode
- Add OTG core DMA address registers
- Ensure endpoint allocation fails when
endpoint_count < MAX_EP_COUNT
. - New configuration option:
xcvrdly
(transceiver delay). EpState
now implementsSend
andSync
.- The default value of
vbus_detection
is nowfalse
.
Initial release.