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xnnpack_src_defs.bzl
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"""
Auto-generated by generate-wrappers.py script. Do not modify
"""
AARCH32_ASM_MICROKERNEL_SRCS = [
"XNNPACK/src/cs16-bfly4/cs16-bfly4-samples1-asm-aarch32-neon-x1.S",
"XNNPACK/src/cs16-bfly4/cs16-bfly4-samples1-asm-aarch32-neon-x2.S",
"XNNPACK/src/cs16-bfly4/cs16-bfly4-samples1-asm-aarch32-neon-x4.S",
"XNNPACK/src/cs16-fftr/cs16-fftr-asm-aarch32-neon-x1.S",
"XNNPACK/src/cs16-fftr/cs16-fftr-asm-aarch32-neon-x4.S",
"XNNPACK/src/f32-gemm/f32-gemm-4x4-asm-aarch32-vfp-ld64.S",
"XNNPACK/src/f32-gemm/f32-gemm-4x4-minmax-asm-aarch32-vfp-ld64.S",
"XNNPACK/src/f32-gemm/f32-gemm-4x8-minmax-asm-aarch32-neon-cortex-a55.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x8-minmax-asm-aarch32-neon-cortex-a7.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x8-minmax-asm-aarch32-neon-cortex-a53.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x8-minmax-asm-aarch32-neon-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x8-minmax-asm-aarch32-neon-ld64.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x8-minmax-asm-aarch32-neon-prfm-cortex-a53.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x8-minmax-asm-aarch32-neon-prfm-cortex-a75.S",
"XNNPACK/src/f32-igemm/f32-igemm-4x8-minmax-asm-aarch32-neon-cortex-a55.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x8-minmax-asm-aarch32-neon-cortex-a7.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x8-minmax-asm-aarch32-neon-cortex-a53.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x8-minmax-asm-aarch32-neon-cortex-a75.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x8-minmax-asm-aarch32-neon-ld64.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x8-minmax-asm-aarch32-neon-prfm-cortex-a53.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x8-minmax-asm-aarch32-neon-prfm-cortex-a75.S",
"XNNPACK/src/qc8-dwconv/qc8-dwconv-3p8c-minmax-fp32-asm-aarch32-neonv8-mla8-cortex-a35.S",
"XNNPACK/src/qc8-dwconv/qc8-dwconv-3p16c-minmax-fp32-asm-aarch32-neonv8-mla8-cortex-a35.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-1x8-minmax-fp32-asm-aarch32-neon-mlal-lane-cortex-a7.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-1x8-minmax-fp32-asm-aarch32-neon-mlal-lane-prfm-cortex-a7.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-1x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-cortex-a35.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-1x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-prfm-cortex-a35.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x8-minmax-fp32-asm-aarch32-neon-mlal-lane-cortex-a7.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x8-minmax-fp32-asm-aarch32-neon-mlal-lane-cortex-a53.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x8-minmax-fp32-asm-aarch32-neon-mlal-lane-ld64.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x8-minmax-fp32-asm-aarch32-neon-mlal-lane-prfm-cortex-a7.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x8-minmax-fp32-asm-aarch32-neon-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x8-minmax-fp32-asm-aarch32-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-cortex-a35.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-cortex-a53.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-ld64.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-prfm-cortex-a35.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x8c4-minmax-fp32-asm-aarch32-neondot-cortex-a55.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x8c4-minmax-fp32-asm-aarch32-neondot-ld64.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-1x8-minmax-fp32-asm-aarch32-neon-mlal-lane-cortex-a7.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-1x8-minmax-fp32-asm-aarch32-neon-mlal-lane-prfm-cortex-a7.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-1x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-cortex-a35.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-1x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-prfm-cortex-a35.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x8-minmax-fp32-asm-aarch32-neon-mlal-lane-cortex-a7.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x8-minmax-fp32-asm-aarch32-neon-mlal-lane-cortex-a53.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x8-minmax-fp32-asm-aarch32-neon-mlal-lane-ld64.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x8-minmax-fp32-asm-aarch32-neon-mlal-lane-prfm-cortex-a7.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x8-minmax-fp32-asm-aarch32-neon-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x8-minmax-fp32-asm-aarch32-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-cortex-a35.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-cortex-a53.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-ld64.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-prfm-cortex-a35.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x8-minmax-fp32-asm-aarch32-neonv8-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x8c4-minmax-fp32-asm-aarch32-neondot-cortex-a55.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x8c4-minmax-fp32-asm-aarch32-neondot-ld64.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-cortex-a7.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-cortex-a7.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-cortex-a7.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-cortex-a53.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-ld64.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-cortex-a7.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-cortex-a55.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-ld64.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-1x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-cortex-a7.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-1x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-cortex-a7.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-cortex-a7.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-cortex-a53.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-ld64.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-cortex-a7.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-cortex-a55.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x8c4-minmax-rndnu-asm-aarch32-neondot-ld64.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-1x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-cortex-a7.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-1x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-cortex-a7.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-cortex-a7.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-cortex-a53.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-ld64.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-cortex-a7.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-1x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-cortex-a7.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-1x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-cortex-a7.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-cortex-a7.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-cortex-a53.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-ld64.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-cortex-a7.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x8-minmax-rndnu-asm-aarch32-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/u32-filterbank-accumulate/u32-filterbank-accumulate-asm-aarch32-arm-x1.S",
"XNNPACK/src/u32-filterbank-accumulate/u32-filterbank-accumulate-asm-aarch32-neon-x1.S",
"XNNPACK/src/u32-filterbank-accumulate/u32-filterbank-accumulate-asm-aarch32-neon-x2.S",
]
AARCH64_ASM_MICROKERNEL_SRCS = [
"XNNPACK/src/f16-gemm/gen/f16-gemm-1x8-minmax-asm-aarch64-neonfp16arith-ld64.S",
"XNNPACK/src/f16-gemm/gen/f16-gemm-1x16-minmax-asm-aarch64-neonfp16arith-ld32.S",
"XNNPACK/src/f16-gemm/gen/f16-gemm-1x16-minmax-asm-aarch64-neonfp16arith-ld64.S",
"XNNPACK/src/f16-gemm/gen/f16-gemm-4x8-minmax-asm-aarch64-neonfp16arith-ld64.S",
"XNNPACK/src/f16-gemm/gen/f16-gemm-4x16-minmax-asm-aarch64-neonfp16arith-ld32.S",
"XNNPACK/src/f16-gemm/gen/f16-gemm-4x16-minmax-asm-aarch64-neonfp16arith-ld64.S",
"XNNPACK/src/f16-gemm/gen/f16-gemm-6x8-minmax-asm-aarch64-neonfp16arith-ld64.S",
"XNNPACK/src/f16-gemm/gen/f16-gemm-6x16-minmax-asm-aarch64-neonfp16arith-cortex-a55.S",
"XNNPACK/src/f16-gemm/gen/f16-gemm-6x16-minmax-asm-aarch64-neonfp16arith-cortex-a55r0.S",
"XNNPACK/src/f16-gemm/gen/f16-gemm-6x16-minmax-asm-aarch64-neonfp16arith-cortex-a75.S",
"XNNPACK/src/f16-gemm/gen/f16-gemm-6x16-minmax-asm-aarch64-neonfp16arith-ld32.S",
"XNNPACK/src/f16-gemm/gen/f16-gemm-6x16-minmax-asm-aarch64-neonfp16arith-ld64.S",
"XNNPACK/src/f16-gemm/gen/f16-gemm-8x8-minmax-asm-aarch64-neonfp16arith-ld64.S",
"XNNPACK/src/f16-gemm/gen/f16-gemminc-1x8-minmax-asm-aarch64-neonfp16arith-ld64.S",
"XNNPACK/src/f16-gemm/gen/f16-gemminc-1x16-minmax-asm-aarch64-neonfp16arith-ld32.S",
"XNNPACK/src/f16-gemm/gen/f16-gemminc-4x8-minmax-asm-aarch64-neonfp16arith-ld64.S",
"XNNPACK/src/f16-gemm/gen/f16-gemminc-4x16-minmax-asm-aarch64-neonfp16arith-ld32.S",
"XNNPACK/src/f16-gemm/gen/f16-gemminc-6x8-minmax-asm-aarch64-neonfp16arith-ld64.S",
"XNNPACK/src/f16-gemm/gen/f16-gemminc-6x16-minmax-asm-aarch64-neonfp16arith-cortex-a55.S",
"XNNPACK/src/f16-gemm/gen/f16-gemminc-6x16-minmax-asm-aarch64-neonfp16arith-cortex-a75.S",
"XNNPACK/src/f16-gemm/gen/f16-gemminc-6x16-minmax-asm-aarch64-neonfp16arith-ld32.S",
"XNNPACK/src/f16-gemm/gen/f16-gemminc-8x8-minmax-asm-aarch64-neonfp16arith-ld64.S",
"XNNPACK/src/f16-igemm/f16-igemm-1x16-minmax-asm-aarch64-neonfp16arith-ld32.S",
"XNNPACK/src/f16-igemm/f16-igemm-1x16-minmax-asm-aarch64-neonfp16arith-ld64.S",
"XNNPACK/src/f16-igemm/f16-igemm-4x16-minmax-asm-aarch64-neonfp16arith-ld32.S",
"XNNPACK/src/f16-igemm/f16-igemm-4x16-minmax-asm-aarch64-neonfp16arith-ld64.S",
"XNNPACK/src/f16-igemm/f16-igemm-6x16-minmax-asm-aarch64-neonfp16arith-cortex-a55.S",
"XNNPACK/src/f16-igemm/f16-igemm-6x16-minmax-asm-aarch64-neonfp16arith-cortex-a55r0.S",
"XNNPACK/src/f16-igemm/f16-igemm-6x16-minmax-asm-aarch64-neonfp16arith-cortex-a75.S",
"XNNPACK/src/f16-igemm/f16-igemm-6x16-minmax-asm-aarch64-neonfp16arith-ld32.S",
"XNNPACK/src/f16-igemm/f16-igemm-6x16-minmax-asm-aarch64-neonfp16arith-ld64.S",
"XNNPACK/src/f32-dwconv/f32-dwconv-9p4c-minmax-asm-aarch64-neonfma-cortex-a55.S",
"XNNPACK/src/f32-dwconv/f32-dwconv-9p4c-minmax-asm-aarch64-neonfma.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-1x8-minmax-asm-aarch64-neonfma-cortex-a53.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-1x8-minmax-asm-aarch64-neonfma-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-1x8-minmax-asm-aarch64-neonfma-ld64.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-1x8-minmax-asm-aarch64-neonfma-prfm-cortex-a53.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-1x8-minmax-asm-aarch64-neonfma-prfm-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-1x12-minmax-asm-aarch64-neonfma-cortex-a53.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x2-minmax-asm-aarch64-neonfma-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x2-minmax-asm-aarch64-neonfma-ld64.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x2-minmax-asm-aarch64-neonfma-prfm-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x8-minmax-asm-aarch64-neonfma-cortex-a53.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x8-minmax-asm-aarch64-neonfma-cortex-a55.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x8-minmax-asm-aarch64-neonfma-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x8-minmax-asm-aarch64-neonfma-ld64.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x8-minmax-asm-aarch64-neonfma-ld128.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x8-minmax-asm-aarch64-neonfma-prfm-cortex-a53.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x8-minmax-asm-aarch64-neonfma-prfm-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x12-minmax-asm-aarch64-neonfma-cortex-a53.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-5x8-minmax-asm-aarch64-neonfma-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-5x8-minmax-asm-aarch64-neonfma-prfm-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-6x8-minmax-asm-aarch64-neonfma-cortex-a53.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-6x8-minmax-asm-aarch64-neonfma-cortex-a55.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-6x8-minmax-asm-aarch64-neonfma-cortex-a73.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-6x8-minmax-asm-aarch64-neonfma-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-6x8-minmax-asm-aarch64-neonfma-ld64.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-6x8-minmax-asm-aarch64-neonfma-ld128.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-6x8-minmax-asm-aarch64-neonfma-prfm-cortex-a53.S",
"XNNPACK/src/f32-gemm/gen/f32-gemm-6x8-minmax-asm-aarch64-neonfma-prfm-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-1x8-minmax-asm-aarch64-neonfma-cortex-a53.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-1x8-minmax-asm-aarch64-neonfma-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-1x8-minmax-asm-aarch64-neonfma-ld64.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-1x8-minmax-asm-aarch64-neonfma-prfm-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-1x12-minmax-asm-aarch64-neonfma-cortex-a53.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-4x8-minmax-asm-aarch64-neonfma-cortex-a53.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-4x8-minmax-asm-aarch64-neonfma-cortex-a55.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-4x8-minmax-asm-aarch64-neonfma-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-4x8-minmax-asm-aarch64-neonfma-ld64.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-4x8-minmax-asm-aarch64-neonfma-ld128.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-4x8-minmax-asm-aarch64-neonfma-prfm-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-4x12-minmax-asm-aarch64-neonfma-cortex-a53.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-5x8-minmax-asm-aarch64-neonfma-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-5x8-minmax-asm-aarch64-neonfma-prfm-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-6x8-minmax-asm-aarch64-neonfma-cortex-a53.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-6x8-minmax-asm-aarch64-neonfma-cortex-a55.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-6x8-minmax-asm-aarch64-neonfma-cortex-a73.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-6x8-minmax-asm-aarch64-neonfma-cortex-a75.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-6x8-minmax-asm-aarch64-neonfma-ld64.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-6x8-minmax-asm-aarch64-neonfma-ld128.S",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-6x8-minmax-asm-aarch64-neonfma-prfm-cortex-a75.S",
"XNNPACK/src/f32-igemm/f32-igemm-1x12-minmax-asm-aarch64-neonfma-cortex-a53.S",
"XNNPACK/src/f32-igemm/f32-igemm-4x8-minmax-asm-aarch64-neonfma-cortex-a55.S",
"XNNPACK/src/f32-igemm/f32-igemm-4x12-minmax-asm-aarch64-neonfma-cortex-a53.S",
"XNNPACK/src/f32-igemm/f32-igemm-6x8-minmax-asm-aarch64-neonfma-cortex-a55.S",
"XNNPACK/src/f32-igemm/f32-igemm-6x8-minmax-asm-aarch64-neonfma-cortex-a73.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-1x8-minmax-asm-aarch64-neonfma-cortex-a53.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-1x8-minmax-asm-aarch64-neonfma-cortex-a75.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-1x8-minmax-asm-aarch64-neonfma-prfm-cortex-a53.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-1x8-minmax-asm-aarch64-neonfma-prfm-cortex-a75.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x2-minmax-asm-aarch64-neonfma-cortex-a75.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x2-minmax-asm-aarch64-neonfma-ld64.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x2-minmax-asm-aarch64-neonfma-prfm-cortex-a75.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x8-minmax-asm-aarch64-neonfma-cortex-a53.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x8-minmax-asm-aarch64-neonfma-cortex-a75.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x8-minmax-asm-aarch64-neonfma-ld64.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x8-minmax-asm-aarch64-neonfma-ld128.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x8-minmax-asm-aarch64-neonfma-prfm-cortex-a53.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x8-minmax-asm-aarch64-neonfma-prfm-cortex-a75.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-5x8-minmax-asm-aarch64-neonfma-cortex-a75.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-5x8-minmax-asm-aarch64-neonfma-prfm-cortex-a75.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-6x8-minmax-asm-aarch64-neonfma-cortex-a53.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-6x8-minmax-asm-aarch64-neonfma-cortex-a75.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-6x8-minmax-asm-aarch64-neonfma-ld64.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-6x8-minmax-asm-aarch64-neonfma-ld128.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-6x8-minmax-asm-aarch64-neonfma-prfm-cortex-a53.S",
"XNNPACK/src/f32-igemm/gen/f32-igemm-6x8-minmax-asm-aarch64-neonfma-prfm-cortex-a75.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal-cortex-a53.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm-cortex-a53.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-1x16c4-minmax-fp32-asm-aarch64-neondot-ld32.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-1x16c4-minmax-fp32-asm-aarch64-neondot-ld64.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal-cortex-a53.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm-cortex-a53.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-2x8c8-minmax-fp32-asm-aarch64-neon-mull.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-2x8c16-minmax-fp32-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-cortex-a53.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-ld64.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x16c4-minmax-fp32-asm-aarch64-neondot-cortex-a55.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x16c4-minmax-fp32-asm-aarch64-neondot-ld32.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x16c4-minmax-fp32-asm-aarch64-neondot-ld64.S",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x16c4-minmax-fp32-asm-aarch64-neondot-ld128.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal-cortex-a53.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm-cortex-a53.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal-cortex-a53.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm-cortex-a53.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-2x8c16-minmax-fp32-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-cortex-a53.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-ld64.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x16c4-minmax-fp32-asm-aarch64-neondot-cortex-a55.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x16c4-minmax-fp32-asm-aarch64-neondot-ld64.S",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-4x16c4-minmax-fp32-asm-aarch64-neondot-ld128.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal-cortex-a53.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm-cortex-a53.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x8c8-minmax-rndnu-asm-aarch64-neon-mlal-cortex-a53.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x8c8-minmax-rndnu-asm-aarch64-neon-mlal-prfm-cortex-a53.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x8c8-minmax-rndnu-asm-aarch64-neon-mlal-prfm.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x8c8-minmax-rndnu-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x16c4-minmax-fp32-asm-aarch64-neondot-ld32.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x16c4-minmax-fp32-asm-aarch64-neondot-ld64.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x16c4-minmax-rndnu-asm-aarch64-neondot-ld32.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x16c4-minmax-rndnu-asm-aarch64-neondot-ld64.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal-cortex-a53.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm-cortex-a53.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x8c8-minmax-fp32-asm-aarch64-neon-mull.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x8c8-minmax-rndnu-asm-aarch64-neon-mlal-cortex-a53.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x8c8-minmax-rndnu-asm-aarch64-neon-mlal-prfm-cortex-a53.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x8c8-minmax-rndnu-asm-aarch64-neon-mlal-prfm.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x8c8-minmax-rndnu-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x8c8-minmax-rndnu-asm-aarch64-neon-mull.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x8c16-minmax-fp32-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x8c16-minmax-rndnu-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x8-minmax-rndnu-asm-aarch64-neon-mlal-lane-ld64.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x8-minmax-rndnu-asm-aarch64-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-cortex-a53.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-ld64.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-cortex-a53.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-ld64.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16c4-minmax-fp32-asm-aarch64-neondot-cortex-a55.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16c4-minmax-fp32-asm-aarch64-neondot-ld32.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16c4-minmax-fp32-asm-aarch64-neondot-ld64.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16c4-minmax-fp32-asm-aarch64-neondot-ld128.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16c4-minmax-rndnu-asm-aarch64-neondot-cortex-a55.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16c4-minmax-rndnu-asm-aarch64-neondot-ld32.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16c4-minmax-rndnu-asm-aarch64-neondot-ld64.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16c4-minmax-rndnu-asm-aarch64-neondot-ld128.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal-cortex-a53.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm-cortex-a53.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-1x8c8-minmax-fp32-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-1x8c8-minmax-rndnu-asm-aarch64-neon-mlal-cortex-a53.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-1x8c8-minmax-rndnu-asm-aarch64-neon-mlal-prfm-cortex-a53.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-1x8c8-minmax-rndnu-asm-aarch64-neon-mlal-prfm.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-1x8c8-minmax-rndnu-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal-cortex-a53.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm-cortex-a53.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal-prfm.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-2x8c8-minmax-fp32-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-2x8c8-minmax-rndnu-asm-aarch64-neon-mlal-cortex-a53.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-2x8c8-minmax-rndnu-asm-aarch64-neon-mlal-prfm-cortex-a53.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-2x8c8-minmax-rndnu-asm-aarch64-neon-mlal-prfm.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-2x8c8-minmax-rndnu-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-2x8c16-minmax-fp32-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-2x8c16-minmax-rndnu-asm-aarch64-neon-mlal.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x8-minmax-rndnu-asm-aarch64-neon-mlal-lane-ld64.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x8-minmax-rndnu-asm-aarch64-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-cortex-a53.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-ld64.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x16-minmax-fp32-asm-aarch64-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-cortex-a53.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-ld64.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x16c4-minmax-fp32-asm-aarch64-neondot-cortex-a55.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x16c4-minmax-fp32-asm-aarch64-neondot-ld64.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x16c4-minmax-fp32-asm-aarch64-neondot-ld128.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x16c4-minmax-rndnu-asm-aarch64-neondot-cortex-a55.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x16c4-minmax-rndnu-asm-aarch64-neondot-ld64.S",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-4x16c4-minmax-rndnu-asm-aarch64-neondot-ld128.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x8c4-minmax-rndnu-asm-aarch64-neondot-cortex-a55.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x8c4-minmax-rndnu-asm-aarch64-neondot-ld128.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-cortex-a53.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-cortex-a75.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-ld64.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-prfm-cortex-a75.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x16c4-minmax-fp32-asm-aarch64-neondot-cortex-a55.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x16c4-minmax-fp32-asm-aarch64-neondot-ld128.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x16c4-minmax-rndnu-asm-aarch64-neondot-cortex-a55.S",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-4x16c4-minmax-rndnu-asm-aarch64-neondot-ld128.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x8c4-minmax-rndnu-asm-aarch64-neondot-cortex-a55.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x8c4-minmax-rndnu-asm-aarch64-neondot-ld128.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-cortex-a53.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-cortex-a75.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-ld64.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-prfm-cortex-a53.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-prfm-cortex-a75.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x16-minmax-rndnu-asm-aarch64-neon-mlal-lane-prfm-ld64.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x16c4-minmax-fp32-asm-aarch64-neondot-cortex-a55.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x16c4-minmax-fp32-asm-aarch64-neondot-ld128.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x16c4-minmax-rndnu-asm-aarch64-neondot-cortex-a55.S",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-4x16c4-minmax-rndnu-asm-aarch64-neondot-ld128.S",
] + [
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-4x16c4-minmax-none-asm-aarch64-neondot-cortex-a55.S",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-4x16c4-minmax-none-asm-aarch64-neondot-cortex-a55.S",
] if native.read_config("pt", "is_oss", "0") == "0" else []
ALL_ARMSIMD32_MICROKERNEL_SRCS = [
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-1x1c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-1x2c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-2x1c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-2x2c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-1x1c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-1x2c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-2x1c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-2x2c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x1c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x2c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x1c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x2c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-1x1c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-1x2c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-2x1c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-2x2c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qs8-vcvt/gen/qs8-vcvt-armsimd32-x4.c",
"XNNPACK/src/qs8-vcvt/gen/qs8-vcvt-armsimd32-x8.c",
"XNNPACK/src/qs8-vlrelu/gen/qs8-vlrelu-armsimd32-x4.c",
"XNNPACK/src/qs8-vlrelu/gen/qs8-vlrelu-armsimd32-x8.c",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-1x1c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-1x2c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-2x1c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-2x2c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-1x1c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-1x2c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-2x1c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-2x2c4-minmax-fp32-armsimd32.c",
"XNNPACK/src/qu8-vcvt/gen/qu8-vcvt-armsimd32-x4.c",
"XNNPACK/src/qu8-vcvt/gen/qu8-vcvt-armsimd32-x8.c",
"XNNPACK/src/qu8-vlrelu/gen/qu8-vlrelu-armsimd32-x4.c",
"XNNPACK/src/qu8-vlrelu/gen/qu8-vlrelu-armsimd32-x8.c",
]
ALL_AVX2_MICROKERNEL_SRCS = [
"XNNPACK/src/f16-gemm/gen/f16-gemm-1x8-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-gemm/gen/f16-gemm-1x16-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-gemm/gen/f16-gemm-3x16-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-gemm/gen/f16-gemm-4x8-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-gemm/gen/f16-gemm-4x16-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-gemm/gen/f16-gemm-5x8-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-gemm/gen/f16-gemm-5x16-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-gemm/gen/f16-gemm-6x8-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-gemm/gen/f16-gemm-7x8-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-igemm/gen/f16-igemm-1x8-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-igemm/gen/f16-igemm-1x16-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-igemm/gen/f16-igemm-3x16-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-igemm/gen/f16-igemm-4x8-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-igemm/gen/f16-igemm-4x16-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-igemm/gen/f16-igemm-5x8-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-igemm/gen/f16-igemm-5x16-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-igemm/gen/f16-igemm-6x8-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-igemm/gen/f16-igemm-7x8-minmax-avx2-broadcast.c",
"XNNPACK/src/f16-pavgpool/f16-pavgpool-9p8x-minmax-avx2-c8.c",
"XNNPACK/src/f16-pavgpool/f16-pavgpool-9x-minmax-avx2-c8.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x32-acc2.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x32-acc4.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x32.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x40-acc2.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x40-acc5.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x40.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x48-acc2.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x48-acc3.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x48.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x64-acc2.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x64-acc4.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x64.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x72-acc3.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x72.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x80-acc2.c",
"XNNPACK/src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-avx2-rr1-p2-x80-acc5.c",
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"XNNPACK/src/math/sigmoid-f32-avx2-rr2-p5-nr2fma.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-3p16c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-9p8c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-9p16c-minmax-fp32-avx2-mul16-add16-vpunpck.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-9p16c-minmax-fp32-avx2-mul16-vpmovsx.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-9p16c-minmax-fp32-avx2-mul16-vpunpck.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-9p16c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-9p24c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-9p32c-minmax-fp32-avx2-mul16-add16-vpunpck.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-9p32c-minmax-fp32-avx2-mul16-vpmovsx.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-9p32c-minmax-fp32-avx2-mul16-vpunpck.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-9p32c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-25p8c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-25p16c-minmax-fp32-avx2-mul16-add16-vpunpck.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-25p16c-minmax-fp32-avx2-mul16-vpmovsx.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-25p16c-minmax-fp32-avx2-mul16-vpunpck.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-25p16c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-25p24c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-25p32c-minmax-fp32-avx2-mul16-add16-vpunpck.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-25p32c-minmax-fp32-avx2-mul16-vpmovsx.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-25p32c-minmax-fp32-avx2-mul16-vpunpck.c",
"XNNPACK/src/qc8-dwconv/gen/qc8-dwconv-25p32c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-1x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-1x8c8-xw-minmax-fp32-avx2.c",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-2x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-2x8c8-xw-minmax-fp32-avx2.c",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-3x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qc8-gemm/gen/qc8-gemm-3x8c8-xw-minmax-fp32-avx2.c",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-1x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-2x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qc8-igemm/gen/qc8-igemm-3x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-9p8c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-9p16c-minmax-fp32-avx2-mul16-add16-vpunpck.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-9p16c-minmax-fp32-avx2-mul16-vpmovsx.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-9p16c-minmax-fp32-avx2-mul16-vpunpck.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-9p16c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-9p24c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-9p32c-minmax-fp32-avx2-mul16-add16-vpunpck.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-9p32c-minmax-fp32-avx2-mul16-vpmovsx.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-9p32c-minmax-fp32-avx2-mul16-vpunpck.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-9p32c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-25p8c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-25p16c-minmax-fp32-avx2-mul16-add16-vpunpck.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-25p16c-minmax-fp32-avx2-mul16-vpmovsx.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-25p16c-minmax-fp32-avx2-mul16-vpunpck.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-25p16c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-25p24c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-25p32c-minmax-fp32-avx2-mul16-add16-vpunpck.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-25p32c-minmax-fp32-avx2-mul16-vpmovsx.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-25p32c-minmax-fp32-avx2-mul16-vpunpck.c",
"XNNPACK/src/qs8-dwconv/gen/qs8-dwconv-25p32c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qs8-f32-vcvt/gen/qs8-f32-vcvt-avx2-x8.c",
"XNNPACK/src/qs8-f32-vcvt/gen/qs8-f32-vcvt-avx2-x16.c",
"XNNPACK/src/qs8-f32-vcvt/gen/qs8-f32-vcvt-avx2-x24.c",
"XNNPACK/src/qs8-f32-vcvt/gen/qs8-f32-vcvt-avx2-x32.c",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-1x8c8-xw-minmax-fp32-avx2.c",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-2x8c8-xw-minmax-fp32-avx2.c",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-3x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qs8-gemm/gen/qs8-gemm-3x8c8-xw-minmax-fp32-avx2.c",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-1x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-2x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qs8-igemm/gen/qs8-igemm-3x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qs8-vadd/gen/qs8-vadd-minmax-avx2-mul32-ld64-x8.c",
"XNNPACK/src/qs8-vadd/gen/qs8-vadd-minmax-avx2-mul32-ld64-x16.c",
"XNNPACK/src/qs8-vadd/gen/qs8-vadd-minmax-avx2-mul32-ld64-x24.c",
"XNNPACK/src/qs8-vadd/gen/qs8-vadd-minmax-avx2-mul32-ld64-x32.c",
"XNNPACK/src/qs8-vaddc/gen/qs8-vaddc-minmax-avx2-mul32-ld64-x8.c",
"XNNPACK/src/qs8-vaddc/gen/qs8-vaddc-minmax-avx2-mul32-ld64-x16.c",
"XNNPACK/src/qs8-vaddc/gen/qs8-vaddc-minmax-avx2-mul32-ld64-x24.c",
"XNNPACK/src/qs8-vaddc/gen/qs8-vaddc-minmax-avx2-mul32-ld64-x32.c",
"XNNPACK/src/qs8-vcvt/gen/qs8-vcvt-avx2-x16.c",
"XNNPACK/src/qs8-vcvt/gen/qs8-vcvt-avx2-x32.c",
"XNNPACK/src/qs8-vcvt/gen/qs8-vcvt-avx2-x64.c",
"XNNPACK/src/qs8-vlrelu/gen/qs8-vlrelu-avx2-x16.c",
"XNNPACK/src/qs8-vlrelu/gen/qs8-vlrelu-avx2-x32.c",
"XNNPACK/src/qs8-vlrelu/gen/qs8-vlrelu-avx2-x64.c",
"XNNPACK/src/qu8-dwconv/gen/qu8-dwconv-9p8c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qu8-dwconv/gen/qu8-dwconv-9p16c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qu8-dwconv/gen/qu8-dwconv-9p32c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qu8-dwconv/gen/qu8-dwconv-25p8c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qu8-dwconv/gen/qu8-dwconv-25p16c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qu8-dwconv/gen/qu8-dwconv-25p32c-minmax-fp32-avx2-mul32.c",
"XNNPACK/src/qu8-f32-vcvt/gen/qu8-f32-vcvt-avx2-x8.c",
"XNNPACK/src/qu8-f32-vcvt/gen/qu8-f32-vcvt-avx2-x16.c",
"XNNPACK/src/qu8-f32-vcvt/gen/qu8-f32-vcvt-avx2-x24.c",
"XNNPACK/src/qu8-f32-vcvt/gen/qu8-f32-vcvt-avx2-x32.c",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-1x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-2x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qu8-gemm/gen/qu8-gemm-3x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-1x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-2x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qu8-igemm/gen/qu8-igemm-3x8c8-minmax-fp32-avx2.c",
"XNNPACK/src/qu8-vadd/gen/qu8-vadd-minmax-avx2-mul32-ld64-x8.c",
"XNNPACK/src/qu8-vadd/gen/qu8-vadd-minmax-avx2-mul32-ld64-x16.c",
"XNNPACK/src/qu8-vaddc/gen/qu8-vaddc-minmax-avx2-mul32-ld64-x8.c",
"XNNPACK/src/qu8-vaddc/gen/qu8-vaddc-minmax-avx2-mul32-ld64-x16.c",
"XNNPACK/src/qu8-vcvt/gen/qu8-vcvt-avx2-x16.c",
"XNNPACK/src/qu8-vcvt/gen/qu8-vcvt-avx2-x32.c",
"XNNPACK/src/qu8-vcvt/gen/qu8-vcvt-avx2-x64.c",
"XNNPACK/src/qu8-vlrelu/gen/qu8-vlrelu-avx2-x16.c",
"XNNPACK/src/qu8-vlrelu/gen/qu8-vlrelu-avx2-x32.c",
"XNNPACK/src/qu8-vlrelu/gen/qu8-vlrelu-avx2-x64.c",
"XNNPACK/src/x8-lut/gen/x8-lut-avx2-x32.c",
"XNNPACK/src/x8-lut/gen/x8-lut-avx2-x64.c",
"XNNPACK/src/x8-lut/gen/x8-lut-avx2-x96.c",
"XNNPACK/src/x8-lut/gen/x8-lut-avx2-x128.c",
"XNNPACK/src/x8-transposec/gen/x8-transposec-32x32-reuse-mov-avx2.c",
"XNNPACK/src/x8-transposec/gen/x8-transposec-32x32-reuse-switch-avx2.c",
"XNNPACK/src/x16-transposec/gen/x16-transposec-16x16-reuse-mov-avx2.c",
"XNNPACK/src/x16-transposec/gen/x16-transposec-16x16-reuse-switch-avx2.c",
]
ALL_AVX512F_MICROKERNEL_SRCS = [
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-2f2m2l16c16s4r-minmax-avx512f-acc2.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-2f2m2l16c16s4r-minmax-avx512f.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-2f2m2l32c16s4r-minmax-avx512f-acc2.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-2f2m2l32c16s4r-minmax-avx512f.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-2f2m2l64c16s4r-minmax-avx512f-acc2.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-2f2m2l64c16s4r-minmax-avx512f.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-3p16c-minmax-avx512f-acc2.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-3p16c-minmax-avx512f.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-3p32c-minmax-avx512f-acc2.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-3p32c-minmax-avx512f.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-4p16c-minmax-avx512f-acc2.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-4p16c-minmax-avx512f.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-4p32c-minmax-avx512f-acc2.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-4p32c-minmax-avx512f.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-9p16c-minmax-avx512f-acc2.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-9p16c-minmax-avx512f.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-9p32c-minmax-avx512f-acc2.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-9p32c-minmax-avx512f.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-25p16c-minmax-avx512f-acc2.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-25p16c-minmax-avx512f.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-25p32c-minmax-avx512f-acc2.c",
"XNNPACK/src/f32-dwconv/gen/f32-dwconv-25p32c-minmax-avx512f.c",
"XNNPACK/src/f32-gemm/gen/f32-gemm-1x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-gemm/gen/f32-gemm-4x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-gemm/gen/f32-gemm-5x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-gemm/gen/f32-gemm-6x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-gemm/gen/f32-gemm-7x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-gemm/gen/f32-gemm-8x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-1x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-4x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-5x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-6x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-7x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-gemm/gen/f32-gemminc-8x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-igemm/gen/f32-igemm-1x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-igemm/gen/f32-igemm-4x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-igemm/gen/f32-igemm-5x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-igemm/gen/f32-igemm-6x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-igemm/gen/f32-igemm-7x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-igemm/gen/f32-igemm-8x16-minmax-avx512f-broadcast.c",
"XNNPACK/src/f32-prelu/gen/f32-prelu-avx512f-2x16.c",
"XNNPACK/src/f32-prelu/gen/f32-prelu-avx512f-2x32.c",
"XNNPACK/src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx512f-p5-scalef-x128-acc2.c",
"XNNPACK/src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx512f-p5-scalef-x128-acc4.c",
"XNNPACK/src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx512f-p5-scalef-x128.c",
"XNNPACK/src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx512f-p5-scalef-x144-acc3.c",
"XNNPACK/src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx512f-p5-scalef-x144.c",
"XNNPACK/src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx512f-p5-scalef-x160-acc2.c",
"XNNPACK/src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx512f-p5-scalef-x160-acc5.c",
"XNNPACK/src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx512f-p5-scalef-x160.c",
"XNNPACK/src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx512f-p5-scalef-x192-acc2.c",
"XNNPACK/src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx512f-p5-scalef-x192-acc3.c",
"XNNPACK/src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx512f-p5-scalef-x192-acc6.c",
"XNNPACK/src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx512f-p5-scalef-x192.c",
"XNNPACK/src/f32-raddextexp/gen/f32-raddextexp-avx512f-p5-scalef-x128-acc2.c",
"XNNPACK/src/f32-raddextexp/gen/f32-raddextexp-avx512f-p5-scalef-x128-acc4.c",
"XNNPACK/src/f32-raddextexp/gen/f32-raddextexp-avx512f-p5-scalef-x128.c",
"XNNPACK/src/f32-raddextexp/gen/f32-raddextexp-avx512f-p5-scalef-x144-acc3.c",
"XNNPACK/src/f32-raddextexp/gen/f32-raddextexp-avx512f-p5-scalef-x144.c",
"XNNPACK/src/f32-raddextexp/gen/f32-raddextexp-avx512f-p5-scalef-x160-acc2.c",
"XNNPACK/src/f32-raddextexp/gen/f32-raddextexp-avx512f-p5-scalef-x160-acc5.c",
"XNNPACK/src/f32-raddextexp/gen/f32-raddextexp-avx512f-p5-scalef-x160.c",
"XNNPACK/src/f32-raddextexp/gen/f32-raddextexp-avx512f-p5-scalef-x192-acc2.c",
"XNNPACK/src/f32-raddextexp/gen/f32-raddextexp-avx512f-p5-scalef-x192-acc3.c",
"XNNPACK/src/f32-raddextexp/gen/f32-raddextexp-avx512f-p5-scalef-x192-acc6.c",
"XNNPACK/src/f32-raddextexp/gen/f32-raddextexp-avx512f-p5-scalef-x192.c",
"XNNPACK/src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx512f-rr1-p5-scalef-x128-acc2.c",
"XNNPACK/src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx512f-rr1-p5-scalef-x128-acc4.c",
"XNNPACK/src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx512f-rr1-p5-scalef-x128.c",
"XNNPACK/src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx512f-rr1-p5-scalef-x144-acc3.c",
"XNNPACK/src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx512f-rr1-p5-scalef-x144.c",
"XNNPACK/src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx512f-rr1-p5-scalef-x160-acc2.c",
"XNNPACK/src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx512f-rr1-p5-scalef-x160-acc5.c",
"XNNPACK/src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx512f-rr1-p5-scalef-x160.c",
"XNNPACK/src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx512f-rr1-p5-scalef-x192-acc2.c",
"XNNPACK/src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx512f-rr1-p5-scalef-x192-acc3.c",
"XNNPACK/src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx512f-rr1-p5-scalef-x192-acc6.c",
"XNNPACK/src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx512f-rr1-p5-scalef-x192.c",
"XNNPACK/src/f32-rmax/f32-rmax-avx512f.c",
"XNNPACK/src/f32-vbinary/gen/f32-vadd-minmax-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vadd-minmax-avx512f-x32.c",
"XNNPACK/src/f32-vbinary/gen/f32-vaddc-minmax-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vaddc-minmax-avx512f-x32.c",
"XNNPACK/src/f32-vbinary/gen/f32-vdiv-minmax-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vdiv-minmax-avx512f-x32.c",
"XNNPACK/src/f32-vbinary/gen/f32-vdivc-minmax-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vdivc-minmax-avx512f-x32.c",
"XNNPACK/src/f32-vbinary/gen/f32-vmax-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vmax-avx512f-x32.c",
"XNNPACK/src/f32-vbinary/gen/f32-vmaxc-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vmaxc-avx512f-x32.c",
"XNNPACK/src/f32-vbinary/gen/f32-vmin-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vmin-avx512f-x32.c",
"XNNPACK/src/f32-vbinary/gen/f32-vminc-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vminc-avx512f-x32.c",
"XNNPACK/src/f32-vbinary/gen/f32-vmul-minmax-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vmul-minmax-avx512f-x32.c",
"XNNPACK/src/f32-vbinary/gen/f32-vmulc-minmax-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vmulc-minmax-avx512f-x32.c",
"XNNPACK/src/f32-vbinary/gen/f32-vrdivc-minmax-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vrdivc-minmax-avx512f-x32.c",
"XNNPACK/src/f32-vbinary/gen/f32-vrsubc-minmax-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vrsubc-minmax-avx512f-x32.c",
"XNNPACK/src/f32-vbinary/gen/f32-vsqrdiff-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vsqrdiff-avx512f-x32.c",
"XNNPACK/src/f32-vbinary/gen/f32-vsqrdiffc-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vsqrdiffc-avx512f-x32.c",
"XNNPACK/src/f32-vbinary/gen/f32-vsub-minmax-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vsub-minmax-avx512f-x32.c",
"XNNPACK/src/f32-vbinary/gen/f32-vsubc-minmax-avx512f-x16.c",
"XNNPACK/src/f32-vbinary/gen/f32-vsubc-minmax-avx512f-x32.c",
"XNNPACK/src/f32-vclamp/gen/f32-vclamp-avx512f-x16.c",
"XNNPACK/src/f32-vclamp/gen/f32-vclamp-avx512f-x32.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-lut16-p3-perm-x16.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-lut16-p3-perm-x32.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-lut16-p3-perm-x48.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-lut16-p3-perm-x64.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-lut16-p3-perm-x80.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-lut16-p3-perm-x96.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-lut16-p3-perm-x112.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-lut16-p3-perm-x128.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-p6-x16.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-p6-x32.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-p6-x48.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-p6-x64.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-p6-x80.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-p6-x96.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-p6-x112.c",
"XNNPACK/src/f32-velu/gen/f32-velu-avx512f-rr1-p6-x128.c",
"XNNPACK/src/f32-vhswish/gen/f32-vhswish-avx512f-x16.c",
"XNNPACK/src/f32-vhswish/gen/f32-vhswish-avx512f-x32.c",
"XNNPACK/src/f32-vlrelu/gen/f32-vlrelu-avx512f-x16.c",
"XNNPACK/src/f32-vlrelu/gen/f32-vlrelu-avx512f-x32.c",
"XNNPACK/src/f32-vrelu/gen/f32-vrelu-avx512f-x16.c",
"XNNPACK/src/f32-vrelu/gen/f32-vrelu-avx512f-x32.c",
"XNNPACK/src/f32-vrnd/gen/f32-vrndd-avx512f-x16.c",
"XNNPACK/src/f32-vrnd/gen/f32-vrndd-avx512f-x32.c",
"XNNPACK/src/f32-vrnd/gen/f32-vrndne-avx512f-x16.c",
"XNNPACK/src/f32-vrnd/gen/f32-vrndne-avx512f-x32.c",
"XNNPACK/src/f32-vrnd/gen/f32-vrndu-avx512f-x16.c",
"XNNPACK/src/f32-vrnd/gen/f32-vrndu-avx512f-x32.c",
"XNNPACK/src/f32-vrnd/gen/f32-vrndz-avx512f-x16.c",
"XNNPACK/src/f32-vrnd/gen/f32-vrndz-avx512f-x32.c",
"XNNPACK/src/f32-vscaleexpminusmax/gen/f32-vscaleexpminusmax-avx512f-p5-scalef-x16.c",
"XNNPACK/src/f32-vscaleexpminusmax/gen/f32-vscaleexpminusmax-avx512f-p5-scalef-x32.c",
"XNNPACK/src/f32-vscaleexpminusmax/gen/f32-vscaleexpminusmax-avx512f-p5-scalef-x48.c",
"XNNPACK/src/f32-vscaleexpminusmax/gen/f32-vscaleexpminusmax-avx512f-p5-scalef-x64.c",
"XNNPACK/src/f32-vscaleexpminusmax/gen/f32-vscaleexpminusmax-avx512f-p5-scalef-x80.c",
"XNNPACK/src/f32-vscaleexpminusmax/gen/f32-vscaleexpminusmax-avx512f-p5-scalef-x96.c",
"XNNPACK/src/f32-vscaleexpminusmax/gen/f32-vscaleexpminusmax-avx512f-p5-scalef-x112.c",
"XNNPACK/src/f32-vscaleexpminusmax/gen/f32-vscaleexpminusmax-avx512f-p5-scalef-x128.c",
"XNNPACK/src/f32-vscaleexpminusmax/gen/f32-vscaleexpminusmax-avx512f-p5-scalef-x144.c",
"XNNPACK/src/f32-vscaleexpminusmax/gen/f32-vscaleexpminusmax-avx512f-p5-scalef-x160.c",
"XNNPACK/src/f32-vscaleexpminusmax/gen/f32-vscaleexpminusmax-avx512f-p5-scalef-x176.c",
"XNNPACK/src/f32-vscaleexpminusmax/gen/f32-vscaleexpminusmax-avx512f-p5-scalef-x192.c",
"XNNPACK/src/f32-vscaleextexp/gen/f32-vscaleextexp-avx512f-p5-scalef-x16.c",
"XNNPACK/src/f32-vscaleextexp/gen/f32-vscaleextexp-avx512f-p5-scalef-x32.c",
"XNNPACK/src/f32-vscaleextexp/gen/f32-vscaleextexp-avx512f-p5-scalef-x48.c",
"XNNPACK/src/f32-vscaleextexp/gen/f32-vscaleextexp-avx512f-p5-scalef-x64.c",
"XNNPACK/src/f32-vscaleextexp/gen/f32-vscaleextexp-avx512f-p5-scalef-x80.c",
"XNNPACK/src/f32-vscaleextexp/gen/f32-vscaleextexp-avx512f-p5-scalef-x96.c",
"XNNPACK/src/f32-vscaleextexp/gen/f32-vscaleextexp-avx512f-p5-scalef-x112.c",
"XNNPACK/src/f32-vscaleextexp/gen/f32-vscaleextexp-avx512f-p5-scalef-x128.c",
"XNNPACK/src/f32-vscaleextexp/gen/f32-vscaleextexp-avx512f-p5-scalef-x144.c",
"XNNPACK/src/f32-vscaleextexp/gen/f32-vscaleextexp-avx512f-p5-scalef-x160.c",
"XNNPACK/src/f32-vscaleextexp/gen/f32-vscaleextexp-avx512f-p5-scalef-x176.c",
"XNNPACK/src/f32-vscaleextexp/gen/f32-vscaleextexp-avx512f-p5-scalef-x192.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x48.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x64.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x80.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x96.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x112.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x128.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x32.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x48.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x64.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x80.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x96.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x112.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x128.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-div-x16.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-div-x32.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-div-x48.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-div-x64.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-div-x80.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-div-x96.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-div-x112.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-div-x128.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x32.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x48.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x64.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x80.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x96.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x112.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr1-p5-scalef-nr1fma-x128.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x16.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x32.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x48.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x64.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x80.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x96.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x112.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-div-x128.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x16.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x32.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x48.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x64.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x80.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x96.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x112.c",
"XNNPACK/src/f32-vsigmoid/gen/f32-vsigmoid-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma-x128.c",
"XNNPACK/src/f32-vsqrt/gen/f32-vsqrt-avx512f-nr1fma1adj-x16.c",
"XNNPACK/src/f32-vsqrt/gen/f32-vsqrt-avx512f-nr1fma1adj-x32.c",
"XNNPACK/src/f32-vsqrt/gen/f32-vsqrt-avx512f-nr1fma1adj-x48.c",
"XNNPACK/src/f32-vsqrt/gen/f32-vsqrt-avx512f-nr1fma1adj-x64.c",
"XNNPACK/src/f32-vsqrt/gen/f32-vsqrt-avx512f-nr1fma1adj-x80.c",
"XNNPACK/src/f32-vsqrt/gen/f32-vsqrt-avx512f-nr1fma1adj-x96.c",
"XNNPACK/src/f32-vsqrt/gen/f32-vsqrt-avx512f-nr1fma1adj-x112.c",
"XNNPACK/src/f32-vsqrt/gen/f32-vsqrt-avx512f-nr1fma1adj-x128.c",
"XNNPACK/src/f32-vunary/gen/f32-vabs-avx512f-x16.c",
"XNNPACK/src/f32-vunary/gen/f32-vabs-avx512f-x32.c",
"XNNPACK/src/f32-vunary/gen/f32-vneg-avx512f-x16.c",
"XNNPACK/src/f32-vunary/gen/f32-vneg-avx512f-x32.c",
"XNNPACK/src/f32-vunary/gen/f32-vsqr-avx512f-x16.c",
"XNNPACK/src/f32-vunary/gen/f32-vsqr-avx512f-x32.c",
"XNNPACK/src/math/exp-f32-avx512f-rr2-lut16-p3-perm-scalef.c",
"XNNPACK/src/math/exp-f32-avx512f-rr2-lut16-p3-perm.c",
"XNNPACK/src/math/exp-f32-avx512f-rr2-lut32-p2-perm2-scalef.c",
"XNNPACK/src/math/exp-f32-avx512f-rr2-lut32-p2-perm2.c",
"XNNPACK/src/math/exp-f32-avx512f-rr2-p5-scalef.c",
"XNNPACK/src/math/exp-f32-avx512f-rr2-p5.c",
"XNNPACK/src/math/expm1minus-f32-avx512f-rr1-lut16-p3-perm.c",
"XNNPACK/src/math/expm1minus-f32-avx512f-rr1-p6.c",
"XNNPACK/src/math/extexp-avx512f-p5.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr1-lut16-p3-perm-scalef-div.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr1-lut16-p3-perm-scalef-nr1fma1adj.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr1-lut16-p3-perm-scalef-nr1fma.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr1-lut32-p2-perm2-scalef-div.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma1adj.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr1-lut32-p2-perm2-scalef-nr1fma.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr1-lut64-p2-gather-scalef-div.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr1-lut64-p2-gather-scalef-nr1fma1adj.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr1-lut64-p2-gather-scalef-nr1fma.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr1-p5-scalef-div.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr1-p5-scalef-nr1fma1adj.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr1-p5-scalef-nr1fma.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr2-lut16-p3-perm-scalef-div.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr2-lut16-p3-perm-scalef-nr1fma1adj.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr2-lut16-p3-perm-scalef-nr1fma.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr2-lut32-p2-perm2-scalef-div.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma1adj.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr2-lut32-p2-perm2-scalef-nr1fma.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr2-lut64-p2-gather-scalef-div.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr2-lut64-p2-gather-scalef-nr1fma1adj.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr2-lut64-p2-gather-scalef-nr1fma.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr2-p5-scalef-div.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr2-p5-scalef-nr1fma1adj.c",
"XNNPACK/src/math/sigmoid-f32-avx512f-rr2-p5-scalef-nr1fma.c",
"XNNPACK/src/math/sqrt-f32-avx512f-nr1fma1adj.c",
"XNNPACK/src/math/sqrt-f32-avx512f-nr1fma.c",
"XNNPACK/src/math/sqrt-f32-avx512f-nr2fma.c",
]
ALL_AVX512SKX_MICROKERNEL_SRCS = [