lowRISC / opentitan
OpenTitan: Open source silicon root of trust
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OpenTitan: Open source silicon root of trust
BaseJump STL: A Standard Template Library for SystemVerilog
A minimal GPU design in Verilog to learn how GPUs work from the ground up
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores