core1

The I/O Router and Northbridge (Core 1).

Purpose

This crate implements the communications and routing layer. It bridges the high-speed Physics Core (Core 0) with external interfaces: sensors, visualiser, and inter-MCU grid. Designed to run on Core 1 of the RP2350.

Key Types

Responsibilities

1. Packet Routing

   • Receives Packet from Core 0 via internal bus.
   • Routes spikes to Bus B (PIO Mesh) for inter-cluster traffic.
   • Forwards DebugEvent telemetry to host via Bus D (Diagnostic).

2. Regulator Snooping

   • Inspects DebugEvent::Cluster telemetry packets
   • Extracts queue depth and quadrant activity for regulator
   • Supports deterministic draining for DST tests

3. I/O Management

   • Manages grid transceiver (inter-MCU PIO)
   • Manages control transceiver (USB/SPI to host)

Kernel Loop

The CommsKernel multiplexes three streams:

1. Control Stream — Commands from UI/Regulator → Forward to Core 0
2. Internal Stream — Packets from Core 0 → Route to Vis or PIO
3. IO Stream — Packets from PIO → Convert to Events for Core 0

Dependencies

• io_bus — Transceiver traits and packet types
• debug_interface — DebugEvent for telemetry forwarding
• control_interface — ControlEvent, RegulatorInput
• inter_core — NeuronEvent for spike routing

Related Documentation

• Architecture Overview