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Answers To Selected Problems On Simplification of Boolean Functions

This document contains solutions to selected problems from Chapter 3 of Mano's Digital Design (2nd ed.) textbook. It provides logic diagrams and implementations of Boolean functions using NAND, NOR, and other logic gates. Specific problems addressed include implementing functions with two-input NAND gates, three-level NOR/NAND circuits, two-level gate circuits, and using Karnaugh maps to simplify functions down to two gates.

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Anushri Pathak
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6K views4 pages

Answers To Selected Problems On Simplification of Boolean Functions

This document contains solutions to selected problems from Chapter 3 of Mano's Digital Design (2nd ed.) textbook. It provides logic diagrams and implementations of Boolean functions using NAND, NOR, and other logic gates. Specific problems addressed include implementing functions with two-input NAND gates, three-level NOR/NAND circuits, two-level gate circuits, and using Karnaugh maps to simplify functions down to two gates.

Uploaded by

Anushri Pathak
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd

Answers to Selected Problems on Simplification of

Boolean Functions
(See Chapter 3 of Mano's Digital Design (2nd ed.))
3-14 Draw a logic diagram ( AB + A'B')( CD' + C'D )
using only two-input NAND
gates to implement the
following expression:

 
3-16 Implement the (a)
following functions with
three-level NOR gate F = wx' + y'z' + w'yz'
circuits. F'= (w' + x)(y + z)(w + y' + z)

(b)
F =  (5,6,9,10) = w'xy'z + w'xyz' + wx'y'z + wx'yz'
F'= (w + x' + y + z')(w + x' + y' + z)(w' + x + y + z')(w' + x +
y' + z)
 
3-17 Implement the (a)
following expressions with
three-level NAND circuits. F = AB' + ABD + ABD' + A'C'D' + A'BC'
F'= A'B'D + A'C

(b)

F =  (5,6,9,10) = w'xy'z + w'xyz' + wx'y'z + wx'yz'


F'= (w + x' + y + z')(w + x' + y' + z)(w' + x + y + z')(w' + x +
y' + z)

3-19 Find eight different F = xy'z + x'yz +w


two-level gate circuits to can be implemented by the following structure
implement F=xy'z+x'yz+w

For each of the three terms:

xy'z can be implemented by   or   

x'yz can be implemented by   or   

w can be implemented by   or   

By using different combinations of these, you will be able to


implement the function with 2 X 2 X 2 = 8 different two-level
gate circuits.
 
3-20 Implement the function F(A,B,C,D) =  (0,1,2,3,4,8,9,12)
F with the following two- F = A'B' + C'D' + B'C'
level forms: NAND-AND, F'= BD + BC + AC
AND-NOR, OR-NAND, and
NOR-OR. NAND-AND

NOR-OR

 
3-25 Implement the F(A,B,C,D) =  (0,1,2,9,11)
following Boolean function F d(A,B,C,D) =  (8,10,14,15)
together with the don't-care
condition d using no more
than two NOR gates.
Assume that both the
normal and complement
inputs are available.

F'= B + A'CD
F = B'(A + C' + D')

which can be simplified to

consisting of two NOR gates only 


 
3-26 Simplify the following F(A,B,C,D) =  (1,2,3,5,7,9,10,11,13,15)
Boolean function using two
differently constructed
Karnaugh maps.

F = D + B'C

F = D + B'C

COSC 3410 Answers to Selected Problems, Chapter | 1 | 2 | 3 | 4 | 5 | 6 | 7 |

 visits since 3/30/98. RETURN to J. C. Huang's home page.

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