WATCHED
Lec 01: What is Signal?
Lec 02: What is an Analog Signal?
Lec 03: What is Digital Signal?
Lec 04: Need of Digital Signal
Lec 05: Introduction to Digital Electronics
Lec 06: Switch and Bits Intuition
Lec 07: Introduction to Boolean Algebra (Part 1)
Lec 08: Introduction to Boolean Algebra (Part 2)
Lec 09: Boolean Algebra Examples (Part 1)
Lec 10: Boolean Algebra Examples (Part 2)
Lec 11: Redundancy Theorem (Boolean Algebra Trick)
Lec 12: Sum of Products (Part 1) | SOP Form
Lec 13: Sum of Products (Part 2) | SOP Form
Lec 14: Product of Sums (Part 1) | POS Form
Lec 15: Product of Sums (Part 2) | POS Form
Lec 16: SOP and POS Form Example
Lec 17: Minimal to Canonical Form Conversion (Part 1
Lec 18: Minimal to Canonical Form Conversion (Part 2
Lec 19: Examples & Tricks (SOP and POS Forms)
Lec 20: Positive and Negative Logic
Lec 21: Dual Form
Lec 22: Self Dual
Lec 23: Complement Meaning and Examples
Lec 24: Venn Diagram Examples
Lec 25: Switching Circuit (Part 1)
Lec 26: Switching Circuit (Part 2)
Lec 27: Statement Problem in Boolean Algebra (Part 1)
Lec 28: Statement Problem in Boolean Algebra (Part 2)
Lec 29: Introduction to Number Systems
Lec 30: Binary Number System
Lec 31: Decimal to Binary Conversion
Lec 32: Decimal to Octal Conversion
Lec 33: Decimal to Hexadecimal Conversion
Lec 34: Binary to Decimal Conversion
Lec 35: Octal to Decimal Conversion
Lec 36: Hexadecimal to Decimal Conversion
Lec 37: Octal to Binary & Binary to Octal Conversion
Lec 38: Hexadecimal to Binary & Binary to Hexadecim
Lec 39: Hexadecimal to Octal & Octal to Hexadecimal
Lec 40: Binary Addition
Lec 41: Binary Subtraction
Lec 42: Binary Multiplication
Lec 43: Binary Division
Lec 44: Octal Addition
Lec 45: Octal Subtraction
Lec 46: Octal Multiplication
Hexadecimal Addition
Hexadecimal Subtraction
Hexadecimal Multiplication
r's Complement
(r-1)'s Complement
1's and 2's Complement
Shortcut for 2's Complement
Data Representation using Signed Magnitude
Data Representation using 1's Complement
Data Representation using 2's Complement
Binary Subtraction using 1's Complement
Binary Subtraction using 2's Complement
Classification of Codes
Binary Coded Decimal (BCD) Code
BCD Addition
2421 Code
Excess-3 Code (XS-3 Code)
Excess-3 Code Addition
Introduction to Gray Code
Binary to Gray Code Conversion
Gray Code to Binary Conversion
What is Parity?
Hamming Code | Error detection Part
Hamming Code | Error Correction Part
Logic Gates (Part 1)
Logic Gates (Part 2)
Logic Gates (Part 3)
Logic Gates (Part 4)
Logic Gates (Part 5) | Important!
Logic Gates (Part 6) | Important!
NAND Gate as Universal Gate (Part 1)
NAND Gate as Universal Gate (Part 2)
NOR Gate as Universal Gate
IES Previous Year Solution of Digital Electronics (Part
IES Previous Year Solution of Digital Electronics (Part
IES Previous Year Solution of Digital Electronics (Part
IES Previous Year Solution of Digital Electronics (Part
IES Previous Year Solution of Digital Electronics (Part
Karnaugh Map (K' Map) Part 1
Karnaugh Map (K' Map) Part 2
Karnaugh Map (K' Map) Part 3
K' Map and Implicants
4 Variable Karnaugh Map (Part 1)
4 Variable Karnaugh Map (Part 2)
4 Variable Karnaugh Map (Part 3)
Don't Care in Karnaugh Map (K' Map)
Don't Care in K' Map (Response to Doubt)
K' Map using Max Terms (Part 1)
K' Map using Max Terms (Part 2)
5 variable K' Map
Quine-McCluskey Minimization Technique (Tabular M
[Private Video]
Digital Electronics Previous Year Solution of DRDO &
Digital Electronics Previous Year Solution of DRDO &
Digital Electronics Previous Year Solution of DRDO &
by Neso Academy
4-Bit Even Parity Generator
by Neso Academy
Seven Segment Display Decoder
by Neso Academy
Seven Segment Display Decoder (Part 2)
by Neso Academy
Seven Segment Display Decoder (Part 3)
by Neso Academy
Comparison between Combinational and Sequential Ci
by Neso Academy
Half Adder
by Neso Academy
Full Adder
by Neso Academy
Full Adder using Half Adder
by Neso Academy
4 Bit Parallel Adder using Full Adders
by Neso Academy
Half Subtractor
by Neso Academy
Full Subtractor | Easy Explanation
by Neso Academy
Shift Add 3 Method | Simple method for Binary to BCD
by Neso Academy
Realizing Half Adder using NAND Gate only
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Realizing Half Adder using NOR Gate only
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Realizing Full Adder using NAND Gate only
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Realizing Half Subtractor using NAND Gate only
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Realizing Half Subtractor using NOR Gate only
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2-Bit Multiplier Using Half Adders
by Neso Academy
Carry Lookahead Adder (Part 1) | CLA Generator
by Neso Academy
Carry Lookahead Adder (Part 2) | CLA Adder
by Neso Academy
BCD Adder | Simple Explanation
by Neso Academy
Introduction to Multiplexer | MUX Basic
WATCHED by Neso Academy
4X1 Multiplexer
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8X1 Multiplexer
WATCHED by Neso Academy
MUX Tree Basic | 4X1 MUX using 2X1 MUX | Easy E
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Implementing 8X1 MUX using 2X1 MUX
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Implementing 8X1 MUX using 4X1 MUX (Special Ca
WATCHED by Neso Academy
Implementation of Boolean Function using Multiplexer
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32X1 MUX using 8X1 MUX
by Neso Academy
1-Bit Full Adder using Multiplexer
by Neso Academy
Logical Expression from Multiplexer
by Neso Academy
Introduction to Demultiplexer | 1:2 DEMUX
WATCHED by Neso Academy
1:4 Demultiplexer
WATCHED by Neso Academy
Full Subtractor using 1:8 Demultiplexer
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Demultiplexer as Decoder
by Neso Academy
2-Bit Comparator
by Neso Academy
Introduction to Encoders and Decoders
by Neso Academy
Priority Encoder
by Neso Academy
Decimal to BCD Encoder
by Neso Academy
Octal to Binary Encoder
by Neso Academy
Hexadecimal to Binary Encoder
by Neso Academy
Full Adder Implementation using Decoder
by Neso Academy
Introduction to Sequential Circuits | Important
by Neso Academy
SR Latch | NOR and NAND SR Latch
by Neso Academy
What is Clock?
by Neso Academy
Triggering Methods in Flip Flops
by Neso Academy
Difference between Latch and Flip Flop
by Neso Academy
1
Introduction to SR Flip Flop
by Neso Academy
Truth Table, Characteristic Table and Excitation Table f
by Neso Academy
Introduction to D flip flop
by Neso Academy
Truth Table, Characteristic Table and Excitation Table f
by Neso Academy
Introduction to JK flip flop
by Neso Academy
Truth table, Characteristic Table and Excitation Table fo
by Neso Academy
Race Around Condition or Racing in JK Flip Flop
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Master Slave JK Flip Flop
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Behaviour of Master Slave D Flip Flop
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Introduction to T flip flop
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Truth Table, Characteristic Table and Excitation Table f
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5 Steps for Flip Flop Conversions | JK to D Flip Flop C
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T Flip Flop to D Flip Flop Conversion
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SR Flip Flop to JK Flip Flop Conversion
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SR Flip Flop to T Flip Flop Conversion
by Neso Academy
Practice Problems on Combinational Circuits (Part 1)
by Neso Academy
Practice Problems on Combinational Circuits (Part 2)
by Neso Academy
Practice Problems on Combinational Circuits (Part 3)
by Neso Academy
Practice Problems on Combinational Circuits (Part 4)
by Neso Academy
How to get Edge Triggering | Simulation using Multisim
by Neso Academy
Preset and Clear Inputs in Flip Flop
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Difference between Synchronous and Asynchronous Se
by Neso Academy
Introduction to State Table, State Diagram & State Equ
by Neso Academy
Design Procedure for Clocked Sequential Circuits
by Neso Academy
Mealy and Moore State Machines (Part 1)
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Mealy and Moore State Machines (Part 2)
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Analysis of Clocked Sequential Circuits (with D Flip F
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Analysis of Clocked Sequential Circuits (with JK Flip F
by Neso Academy
Analysis of Clocked Sequential Circuits (with T Flip Fl
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Sequence or Pattern Detector
by Neso Academy
Sequence Detector Example
by Neso Academy
State Reduction and Assignment
by Neso Academy
ASM Chart
by Neso Academy
ASM Chart for Moore State Machine
by Neso Academy
Introduction to Counters | Important
by Neso Academy
Types of Counters | Comparison between Ripple and Sy
by Neso Academy
3 Bit Asynchronous Up Counter
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4 Bit Asynchronous Up Counter
by Neso Academy
State Diagram of a Counter
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3 bit & 4 bit Asynchronous Down Counter
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3 Bit & 4 Bit UP/DOWN Ripple Counter
by Neso Academy
Modulus of the Counter & Counting up to Particular Va
by Neso Academy
Decade (BCD) Ripple Counter
by Neso Academy
How to Design Synchronous Counters | 2-Bit Synchron
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3-Bit Synchronous Up Counter
by Neso Academy
3-Bit & 4-bit Up/Down Synchronous Counter
by Neso Academy
Ring Counter
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Johnson's Counter (Twisted/Switch Tail Ring Counter)
by Neso Academy
Introduction to Registers
by Neso Academy
Data Formats and Classification of Registers
by Neso Academy
Shift Register (SISO Mode)
by Neso Academy
Shift Register (SIPO & PIPO Mode)
by Neso Academy
Digital Electronics Test-1
Shift Register (PISO Mode)
Bidirectional Shift Register
Universal Shift Register
[Private Video]
Practice Problems on Sequential Circuits (Part 2)
Practice Problems on Sequential Circuits (Part 3)
Programmable Logic Array (PLA) | Easy Explanation
Programmable Array Logic (PAL)
