Introduction to PSP
MOSFET Model
G. Gildenblat, X. Li, H. Wang, W. Wu
Department of Electrical Engineering
The Pennsylvania State University, USA
and
R. van Langevelde, A.J. Scholten, G.D.J. Smit and D.B.M. Klaassen
Philips Research Laboratories, The Netherlands
OUTLINE
Origin and General Features of PSP
Project
Technical Details
Fitting Examples
NQS
Simulation Examples
Conclusions
Key Objectives of PSP Project
Merge the best features of the two
most advanced Surface-Potential-
Based Models (SPBM): SP and MM11
Provide the modeling capabilities
down to 65nm node and beyond (in
the nearest future)
Strengthen the infrastructure of the
SPBM
What Makes PSP Project Possible
Similar approach to compact
modeling at PSU and Philips Research
Similar modular structure of SP and
MM11
Extension of Symmetric Linearization
Method beyond SP and MM11
Structure of PSP Model
Global Parameter Set
Local Parameter Set
Core
Intrinsic
Extrinsic
Support Modules
JUNCAP
PSP NQS
Worth Noting
PSP is far more than mixture of the best SP
and MM11 modules. For example, the
following PSP submodels go beyond both SP
and MM11 versions.
NQS
Gate current
General Features of PSP (I)
Physical surface-potential-based formulation in both
intrinsic and extrinsic model modules
Physical and accurate description of the accumulation
region
Inclusion of all relevant small-geometry effects
Modeling of the halo implant effects, including the
output conductance degradation in long devices
Coulomb scattering and non-universality in the
mobility model
Non-singular velocity-field relation enabling the
modeling of RF distortions including intermodulation
effects.
Complete Gummel symmetry
General Features of PSP (II)
Mid-point bias linearization enabling accurate
modeling of the ratio-based circuits (e.g. R2R
circuits)
Quantum-mechanical corrections
Correction for the polysilicon depletion effects
GIDL/GISL model
Surface-potential-based noise model including
channel thermal noise, flicker noise and channel-
induced gate noise.
Advanced junction model including trap-assisted
tunneling, band-to-band tunneling and avalanche
breakdown
Spline-collocation-based NQS model including all
terminal currents
Stress model
OUTLINE
Origin and General Features of PSP
Technical Details
Fitting Examples
NQS
Simulation Examples
Conclusions
Surface Potential without Minority Carriers
(for use in S/D overlap regions)
0.1 40
Surface Potential (V)
0.0 20
Error (pV)
-0.1 0
-20
-0.2
Numerical Solution
Analytical Approximation -40
-0.3
-1.5 -1.0 -0.5 0.0 0.5 1.0 1.5
Vgs (V)
PSP: s calculation
VSB=1V
with FPSP(u)
Accuracy of s approximation
Mobility
PSP uses SP mobility model. It includes universal
dependence on the vertical effective field Eeff and the
deviations from the universality associated with the
Coulomb scattering.
MU0 x
=
CS qbm
2
1 + ( MUE Eeff )
THEMU
+
( qbm + qim )
2
Drift Velocity
PSP uses MM11 drift velocity model that is
conducive to the highly accurate description of
saturation region including high order drain
conductances.
E y
Vd =
1 + (E y E c )
2
This form also assures compliance with
Gummel symmetry test and non-singular
model behavior at Vds= 0.
Drain Current
2 (W L )( qim + t )
Id = ; = sd ss
1 + 1 + 2 ( Ec L )
2
No need for correction factors used in older SPBMs to
reproduce proper behavior for small Vds
Subthreshold region is accurately modeled through
Velocity saturation is introduced in such a way that its
effects automatically vanish in subthreshold.
Lateral Field Gradient
(
f = 1 ( s qN sub ) s y
2 2
)
Most SPBMs use GCA: f = 1
HiSIM: f = f ( L,W )
(
SP, PSP: f = f L, W, Vgs , Vsb , Vds )
Symmetric Linearization (I)
qi = qim ( s m )
2
( y ) = m + H 1 1 ( y ym )
HL
L
y m = 1 +
2 4H
These equations are the same in SP and PSP
Symmetric Linearization (II)
Variable H in PSP is defined differently than in SP
Without velocity saturation: H 0 = ( qim ) + t
H SP = H 0 (1 + 0 )
1
In SP: ; = Ec L
1 1
1 2 1 1
In PSP: H PSP = hH 0 1 + ( h ) ;
2
h = + 1 + 2 2
2 2
( ) 2
Normalized Quasi-Static Charges
Using Ward-Dutton partition
qim 2
QD = + 1 2
2 12 2 H PSP 20 H PSP
2
QI = qim
12 H PSP
2
QG = Voxm
12 H PSP
QS = QI QD QB = QG QI
Verification of Symmetric
Linearization
Normalized Transcapacitances 0.9 Linearized CSM
Original CSM
Cgg
0.6
Csg
0.3
Cdg
Cbg
0.0
-1 0 1 2 3 4
Vgs (V)
Vds = 2V, Vbs= 0 V, Vfb=-1V
PSP Noise Model
Includes thermal channel noise, 1/f noise, channel-
induced gate noise and shot-noise in the gate-current
Thermal channel noise automatically becomes shot
noise below threshold, so it is not necessary to model
this phenomena separately
Rigorously includes fluctuations in the velocity
saturation term. Based on MM11 formulation
Takes advantage of symmetric linearization to simplify
expressions for the spectral densities
Experimentally verified
Example
Drain (Sid) and gate (Sig) current noise spectral densities
Gate Current Model
Based on Tsu-Esaki formulation, includes supply
function
Includes contributions from both the channel and the
overlap regions. Automatic scaling (no scaling
parameters)
SP model extended MM11 formulation of Igate by
including supply function. PSP version is based on SP
but is further developed
Experimentally verified using several processes from
four different production facilities
Example
Vsb=0V, Vds=0.025, 0.042, 0.61 and 1V
OUTLINE
Origin and General Features of PSP
Technical Details
Fitting Examples (Global fit, no
binning)
NQS
Simulation Examples
Conclusions
ID-VGS
for long/wide device
10
-6
VBS = 0 .. 1.2V 10
8 -7
10
I D ( A)
6 10
-8
I D (A)
-9
4 10
-10
10
2 -11
10
VDS = 0 .05 V -12 VDS = 0 .05 V
10
0.0 0.4 0.8 1.2 0.0 0.4 0.8 1.2
VGS (V) VGS (V)
Philips 90nm LP-process NMOS W/L = 10m/10m
gm and gm/ID
for long/wide device
15 40
VBS = 0 .. 1.2V
30
10
g m ( A/V)
g m / I D (1/V)
20
5
10
VDS = 0 .05 V VDS = 0 .05 V
0.0 0.4 0.8 1.2 10
-12
10
-11
10
-10 -9
10 10 10
-8 -7
10
-6
VGS (V) I D (A)
Philips 90nm LP-process NMOS W/L = 10m/10m
ID-VDS
for long/wide device
0.20
VGS = 0.34 .. 1.2V
VBS = 0V -4
0.15 10
g DS (A/V)
I D (mA)
-5
0.10 10
-6
0.05 10
-7
10
0.0 0.4 0.8 1.2 0.0 0.4 0.8 1.2
VDS (V) VDS (V)
Philips 90nm LP-process NMOS W/L = 10m/10m
ID-VGS
for short/narrow device
5 -6
10
VBS = 0 .. 1.2V -7
4 10
-8
10
-9
I D ( A)
3 10
I D (A)
-10
10
-11
2 10
-12
10
-13
1 10
-14
VDS = 0 .05 V 10 -15 VDS = 0 .05 V
10
0.0 0.4 0.8 1.2 0.0 0.4 0.8 1.2
VGS (V) VGS (V)
Philips 90nm LP-process NMOS W/L = 110nm/100nm
gm and gm/ID
for short/narrow device
8 V = 0 .. 1.2V 40
BS
6 30
g m ( A/V)
g m / I D (1/V)
4 20
2 10
VDS = 0 .05 V VDS = 0 .05 V
0.0 0.4 0.8 1.2 -15 -14 -13 -12 -11 -10
10 10 10 10 10 10 10 10 10 10
-9 -8 -7 -6
VGS (V) I D (A)
Philips 90nm LP-process NMOS W/L = 110nm/100nm
ID-VDS
for short/narrow device
0.06
VGS = 0.34 .. 1.2V
VBS = 0V
-4
0.04 10
g DS (A/V)
I D (mA)
-5
0.02 10
-6
10
0.0 0.4 0.8 1.2 0.0 0.4 0.8 1.2
VDS (V) VDS (V)
Philips 90nm LP-process NMOS W/L = 110nm/100nm
CV Characteristics
W/L = 800m/90nm, Vds=0, Vsb=0
OUTLINE
Origin and General Features of PSP
Technical Details
Fitting Examples
NQS
Simulation Examples
Conclusions
PSP NQS Model
Unified model for AC and transient
simulations
Spline-collocation-based
Consistent with QS, includes all terminal
currents, and all operation regions
Verified by comparison with experiments
and channel segmentation method
Includes all major small-geometry effects
Similar to SP but further developed
Subcircuit-Based Implementation
The differential equations to be solved:
duk
= f k ( u1 ,..., u N )
dt
Using sub-circuit approach (for N=2):
f1 = f1 (V1 ,V2 ) , f 2 = f 2 (V1 ,V2 )
V1=u1 V2=u2
R C R C
Cf1 Cf2
R is sufficiently large so that the current flow through it is negligible
Extended Operation Range
2
3V
3V
IG QS 2
-3V
1 NQS
Currents (mA)
Currents (mA)
0.6ns
ID
1 IS
0
3V
IB 3V
QS
-3V 0
-1 NQS
0.6ns
-2 -1
0.0 0.2 0.4 0.6 0.8 1.0 0.0 0.2 0.4 0.6 0.8 1.0
Time (ns) Time (ns)
Mobility Degradation Effects
1.6
3V
3V
1.2
Currents (mA)
0V
0.8 0.3ns
Symbols: NQS
0.4 QS
TCAD
0.0
constant
field-dependent
-0.4
0.0 0.2 0.4 0.6
Time (ns)
RF Modeling
90-nm Philips low-power technology
Ground-signal-ground configuration; common source
bulk; pad open-short-dedicated open de-embedding
(Tiemeijer et al.)
L=3 m; Wfing=10 m; Nfing=6; MULT=2
i.o.w. total width=120 m
markers: measurements
dashed lines: PSP-QS
solid lines: PSP-NQS
Re[Y11]
PSP, SWNQS=5 PSP, SWNQS=9
VDS=1.5 V
VGS=0.5 V
VGS=1.0 V
VGS=1.5 V
MM11, 5 segments
Cgg
PSP, SWNQS=5 PSP, SWNQS=9
VDS=1.5 V
VGS=0.5 V
VGS=1.0 V
VGS=1.5 V
MM11, 5 segments
The Killer NOR Gate
Vdd
A MP1
X
B MP2
Q
MN2
MN1
MP1 W/L=8.0/10.0um MP2, MN1, MN2 W/L=8.0/3.0um
V(A)
V(B)
V(Q) NQS
Node Voltages (V) 1.6 V(Q) QS
1.2
0.8
0.4
0.0
0 50 100 150 200
Time (ns)
Node Voltage at X (V)
0
QS
-5
NQS
-10
0 50 100 150 200
Time (ns)
PSP Default Parameter Set
5
Node Voltage at X (V)
0
-5
QS
-10
NQS
-15
-20
0 50 100 150 200
Time (ns)
Generic 90nm Process Parameter Set
Acknowledgement
The Authors are grateful to C. McAndrew, J. Watson,
P. Bendix, D. Foty, B. Mulvaney, N. Arora, W. Grabinski,
J. Victory, G. Workman and S. Veeraraghavan
for numerous stimulating discussion of the subject and to
D. Gloria and S. Boret for kindly providing the 90 nm RF
data.
PSP development at PSU was supported in part by
SRC, LSI Logic, Freescale Semiconductor, IBM
and
by simulation tools provided by Freescale
Semiconductor, Mentor Graphics and Agilent.
PSP Code and Documentation
http://www.semiconductors.philips.co
/Philips_Models/mos_models/psp/index.html
documentation of the model and parameter
extraction strategy
Verilog-A code
C-code
Modules that can be directly linked to
Spectre and ADS
Conclusions
The commonality between SP and
MM11 has been used to merge them
into a powerful new model PSP
PSP has been extensively tested on
several 90 nm nodes
PSP satisfies all the requirements for
a next generation compact MOSFET
model
PSP-SOI is in progress
