Standard

 computer  
I/O  Buses  and  Interfaces  
 General  PC  bus  architecture  

Processor      

Cache  

Memory  -­‐  I/O  Bus      

Main   I/O   I/O  

Memory   Controller   Controller  
(DRAM)  
   
Disk   …   Disk   Disk   …   Disk  

   
The  bus  is  a  criBcal  component  of  the  Computer:  
 
•  Buses  are  shared  components  that  provide  the  paths  for  all  parts  of  the  
computer  to  communicate  with  each  other  
•  They  can  reduce  the  complexity  of  communicaBons  between  computer  
components    
•  They  contain  conduits  for  data,  “addressing”,  and  Bming/control  
•  They  need  a  protocol  that  all  users  use  
•  They  can  provide  an  easy  way  to  evolve  a  computer  system  –  add  
components  
•  They  can  be  a  serious  boMleneck  if  not  designed  and  used  appropriately  
•  As  systems  grow,  they  need  to  evolve  hierarchically    
•  They  can  be  parallel  or  serial  
•  They  can  have  data  widths  larger  than  the  computer  word  length  
 General  Bus  types  
Processor-­‐memory  bus  (may  be  proprietary)  
Short  and  high  speed  
Matched  to  the  memory  system  to  maximize  the  memory-­‐processor  bandwidth  
OpBmized  for  cache  block  transfers  
 

Backplane  bus  (may  be  industry  standard)  

The  backplane  is  an  interconnecBon  structure  within  the  chassis  
Used  as  an  intermediary  bus  connecBng  I/O  busses  to  the  processor-­‐memory  bus  
 
I/O  bus  (industry  standard,  e.g.,  SCSI,  PCI-­‐e,USB,  Hypertransport)  
Usually  is  lengthy  and  slower  
Needs  to  accommodate  a  wide  range  of  I/O  devices  
Connects  to  the  processor-­‐memory  bus  or  backplane  bus  
 Bus  CharacterisBcs  
Control  lines:  Master  ini@ates  requests  
Bus   Data  lines:  Data  can  go  either  way   Bus  
Master   Slave  

•  Data  &  Address  lines  

–  Data,  addresses,  and  complex  commands  
•  Control  lines  
–  Signal  requests  and  acknowledgments  
–  Indicate  what  type  of  informaBon  is  on  the  data  lines  
•  Bus  transacBon  consists  of  
–  Master  issuing  the  command  (and  address)    –  request  
–  Slave  receiving  (or  sending)  the  data      –  acBon  
–  Defined  by  what  the  transacBon  does  to  memory  
•  Input  –  inputs  data  from  the  I/O  device  to  the  memory  
•  Output  –  outputs  data  from  the  memory  to  the  I/O  device  
Bus  design  consideraBons:  
 
Accessibility  
Speed  
Reliability  
Extensibility  
BoMle  necks  
Noise  (electrical)  
Flexibility  
Ease  of  Interfacing  
Power  
Sharability  
CommunicaBon  Protocol  
Length  
 Bus  CommunicaBons  
•  Bus  Protocols  
–  Asynchronous  
–  Synchronous  
–  Memory  Read  /  Writes    
–  I/O  Read  Writes  
–  Peer  communicaBon  –  e.g.  CPU  to  CPU  
–  Are  communicaBons  verified?  
–  Is  there  error  checking  (parity,  CRC,  etc.)  ?  
 Synchronous  and  Asynchronous  Buses  
•  Synchronous  bus  (e.g.,  processor-­‐memory  buses)  
–  Includes  a  clock  in  the  control  lines  and  has  a  fixed  
protocol  for  communicaBon  that  is  relaBve  to  the  clock  
–  Advantage:  involves  very  liMle  logic  and  can  run  very  fast  
–  Disadvantages:  
•  Every  device  communicaBng  on  the  bus  must  use  same  clock  rate  
•  To  avoid  clock  skew,  they  cannot  be  long  if  they  are  fast  
•  Asynchronous  bus  (e.g.,  I/O  buses)  
–  It  is  not  clocked,  so  requires  a  handshaking  protocol  and  
addiBonal  control  lines  (ReadReq,  Ack,  DataRdy)  
–  Advantages:  
•  Can  accommodate  a  wide  range  of  devices  and  device  speeds  
•  Can  be  lengthened  without  worrying  about  clock  skew  or  
synchronizaBon  problems  
–  Disadvantage:  slow(er)  
Synchronous  Bus  
Asynchronous  Bus  Handshaking  Protocol  
-­‐  Output  (read)  data  from  memory  to  an  I/O  device  

ReadReq   1  
2  
Data   addr   data  
3  
Ack   4   6  
5   7  
DataRdy  

             I/O  device  signals  a  request  by  raising  ReadReq  and  pu^ng  the  addr  on  the  data  
lines  

1.  Memory sees ReadReq, reads addr from data lines, and raises Ack
2.  I/O device sees Ack and releases the ReadReq and data lines
3.  Memory sees ReadReq go low and drops Ack
4.  When memory has data ready, it places it on data lines and raises DataRdy
5.  I/O device sees DataRdy, reads the data from data lines, and raises Ack
6.  Memory sees Ack, releases the data lines, and drops DataRdy
7.  I/O  device  sees  DataRdy  go  low  and  drops  Ack  
Asynchronous  Bus  
Interrupt  Driven  Data  Transfer  Time  esBmate  

CPU add
(1) I/O sub user
interrupt and program
or
nop
Memory IOC (2) save PC

device (3) interrupt

service addr
read
store interrupt
... service
User program halts only (4) rti routine
during actual transfer
memory
1000 transfers/second:
1000 interrupts @ 2 µsec per interrupt=> 2 msec
1000 interrupt service @ 98 µsec each=> 98 msec
100 msec = 0.1 CPU seconds
Direct  Memory  Access  Time  esBmate  

Time to do 1000 xfers in 1 msec:

CPU sends a starting address, 1 DMA set-up sequence: @ 50 µsec
direction(R/W), and word count 1 interrupt: @ 2 µsec
to DMAC. Then issues "start". 1 interrupt service sequence: @ 48 µsec
100µsec
CPU .0001 second of CPU time

0
ROM

Memory DMAC IOC

Memory
Mapped I/O RAM
I/O device

DMAC provides;
Peripheral controller Handshake signals Peripherals
Memory Addresses
Handshake signals
DMAC
n
Bus  Standards  

•  Expansion  buses  or  “slots”  

•  Disk  interfaces  
•  External  buses  
•  CommunicaBons  interfaces  
 Expansion  Buses  

•  These  are  “slots”  on  the  motherboard  

 
–  ISA  –  Industry  Standard  Architecture  (outdated)  
–  PCI  –  Personal  Component  Interconnect  (outdated)  
–  EISA  –  Extended  ISA  (outdated)  
•  SIMM  –  Single  Inline  Memory  Module  (plugs  into  slot)  
•  DIMM  –  Dual  Inline  Memory  Module  (plugs  into  slot)  
–  MCA  –  Micro-­‐Channel  Architecture  (outdated)  
–  AGP  –  Accelerated  Graphics  Port  (outdated)  
–  VESA  –  Video  Electronics  Standards  AssociaBon  (outdated)  
–  PCMCIA  –  Personal  Computer  Memory  Card  InternaBonal  
AssociaBon  (outdated)  
–  PCI-­‐e  –  PCI  express  (Current)  
–  HT  –  Hypertransport  (Current)  
3  ISA  
slots  

6  SIMM   2  DIMM  
5  PCI  slots   PenBum  CPU  
slots   slots  
 Disk  Interfaces  

•  Examples  
–  ATA  –  AT  AMachment  (named  afer  IBM  PC-­‐AT)  (outdated)  
–  IDE  –  Integrated  Drive  Electronics  (same  as  ATA)  (outdated)  
–  Enhanced  IDE  (outdated)  
•  Encompasses  several  older  standards  (ST-­‐506/ST-­‐412,  IDE,  ESDI,  
ATA-­‐2,  ATA-­‐3,  ATA-­‐4)  
–  Floppy  disk  (outdated)  
–  SCSI  –  Small  Computer  Systems  Interface  (servers)  (Current)  
–  ESDI  –  Enhanced  Small  Device  Interface  (mid-­‐80s,  obsolete)  
(outdated)  
–  PCMCIA  (outdated)  
–  SATA  –  serial  ATA    (Current)  
–  Ethernet  (used  for  network  drives)  (Current)  
 External  Buses  
•  Examples  
–  Parallel  –  someBmes  called  LPT  (“line  printer”)  
(outdated)  
–  Serial  –  typically  RS232C  (someBmes  RS422)  
(outdated)  
–  PS/2  –  for  keyboards  and  mice  (outdated)  
–  USB  –  Universal  Serial  Bus  (current)  
–  IrDA  –  Infrared  Device  AMachment  (specialized)  
–  FireWire  –  very  high  speed,  developed  by  IEEE  
(outdated)  
 
 CommunicaBons  Buses  

•  For  connecBng  systems  to  systems  

•  Parallel/LPT  (outdated)  
–  special  purpose,  e.g.,  using  special  sofware  
(Laplink)  to  transfer  data  between  systems  
•  Serial/RS232C  (outdated)  
–  To  connect  a  system  to  a  voice-­‐grade  modem  
•  Ethernet  (current)  
–  To  connect  a  system  to  a  high-­‐speed  network  
Bus  Details  

•  A  look  at  a  few  of  the  preceding  examples  in  more  

detail  :  
–  ISA  
–  PCI  
–  AGP  
–  Serial  
–  Parallel  
–  SCSI  
–  Ethernet  
–  USB  
 ISA  bus  

History  
–  a  computer  bus  standard  for  IBM  PC  compaBble  computers  introduced  with  the  IBM  
Personal  Computer  to  support  its  Intel  8088  microprocessor's  8-­‐bit  external  data  bus  
and  extended  to  16  bits  for  the  IBM  Personal  Computer/AT's  Intel  80286  processor  
•  ConfiguraBon  
–  Parallel,  mulB-­‐drop  

Advancements  
•  EISA  
•  Extended  ISA  
•  Design  by  nine  IBM  compeBtors  (AST,  Compaq,  Epson,  HP,  NEC,  Olive^,  Tandy,  WYSE,  
Zenith)  
•  Intended  to  compete  with  IBM’s  MCA    -­‐  EISA  is  hardware  compaBble  with  ISA  
•  MCA  
•  Micro  Channel  Architecture  
•  Introduced  by  IBM  in  1987  as  a  replacement  for  the  AT/ISA  bus  

•  EISA  and  MCA  have  not  been  successful!  

 
 PCI  

•  Peripheral  Component  Interconnect  

–  Also  called  “Local  Bus”  
•  History  
–  Developed  by  Intel  (1993)  
–  Very  successful,  widely  used  
–  Much  faster  than  ISA  
–  Gradually  replaced  ISA  
•  ConfiguraBon  
–  Parallel,  mulB-­‐drop  
•  Used  for…  
–  Just  about  any  peripheral  
–  Can  support  mulBple  high-­‐performance  devices  
–  Graphics,  full-­‐moBon  video,  SCSI,  local  area  networks,  etc.    
•  SpecificaBons  
–  64-­‐bit  bus  capability  
–  Usually  implemented  as  a  32-­‐bit  bus  
–  Runs  at  33  MHz  or  66  MHz  
–  At  33  MHz  and  a  32-­‐bit  bus,  data  rate  is  133  Mbytes/s  
 AGP  

•  Accelerated  Graphics  Port  

•  History  
–  First  appeared  on  PenBum  II  boards  
–  Developed  just  for  graphics  (especially  3D  graphics)  
•  ConfiguraBon  
–  Parallel,  point-­‐to-­‐point  (only  one  AGP  port  /  system)  
•  SpecificaBons  
–  Data  rates  up  to  532  Mbytes/s    
 Serial  Interfaces  

•  On  PCs,  a  “serial  interface”  implies  a  “COM  port”,  or  “communicaBons  

port”  
–  COM1,  COM2,  COM3,  etc.  
•  COM  ports  conform  to  the  RS-­‐232C  interface  standard  
•  History  
–  Well-­‐established  standard,  developed  by  the  EIA  (Electronics  Industry  AssociaBon)  in  1960s  
–  Originally  intended  as  an  electrical  specificaBon  to  connect  computer  terminals  to  modems  
•  Defines  the  interface  between  a  DTE  and  a  DCE  
–   DTE  =  Data  Terminal  Equipment  (terminal)  
–   DCE  =  Data  CommunicaBons  Equipment  (modem)  
–  A  “modem”  is  someBmes  called  a  “data  set”  
–  A  “terminal”  is  anything  at  the  “terminus”  of  the  connecBon  
•  VDT  (video  display  terminal),  computer,  printer,  etc.  
•  Data  rate  
–  Maximum  specified  data  rate  is  20  Kbits/s  with  a  maximum  cable  length  of  15  meters  
–  However…  
•  It  is  common  to  “push”  an  RS-­‐232C  interface  to  higher  data  rates  
•  Data  rates  to  1  Mbit/s  can  be  achieved  (with  short  cables!)  
•  ConfiguraBon  
–  Serial,  point-­‐to-­‐point  
 
 Parallel  Interfaces  

•  History  
–  In  the  context  of  PCs,  a  “parallel  interface”  implies  a  Centronics-­‐
compaBble  printer  interface  
–  Originally  developed  by  printer  company,  Centronics  
–  Introduced  on  the  IBM  PC  (1981)  as  an  LPT  (“line  printer”)  port  
–  Improvements  
•  EPP  (Enhanced  Parallel  Port),  development  by  Intel,  Xircom,  Xenith  
•  Enshrined  in  the  standard  IEEE-­‐1284  (1994)  
–  “Standard  Signaling  Method  for  a  Bi-­‐direcBonal  Parallel  Peripheral  Interface  for  
Personal  Computers”  
–  Includes  Centronics/LPT  mode,  EPP  mode,  and…  
–  ECP  mode  (Enhanced  Capability  Port)  
•  Data  Rate  
–  150  Kbytes/s  (LPT)  to  1.5  Mbytes/s  (ECP)  
•  ConfiguraBon  
–  Parallel,  point-­‐to-­‐point  
SCSI    
•  Small  Computer  Systems  Interface  
•  History  
–  Developed  by  Shugart  Associates  (1981)    
–  Originally  called  Shugart  Associates  Systems  Interface  (SASI,  
pronounced  “sassi”)  
–  Scaled  down  version  of  IBM’s  System  360  Selector  Channel  
–  Became  an  ANSI  standard  in  1986  
•  Used  for…  
–  Disk  drives,  CD-­‐ROM  drives,  tape  drives,  scanners,  printers,  etc.  
•  ConfiguraBon  
–  Parallel,  daisy  chain  
–  Requires  terminator  at  end  of  chain  
•  Versions  (data  width,  data  rate)  
–  SCSI-­‐1,  Narrow  SCSI  (8  bits,  5  MBps)  
–  SCSI-­‐2  (8,  bits  10  MBps)  
–  SCSI-­‐3  (8,  bits,  20  MBps)  
–  UltraWide  SCSI  (16  bits,  40  MBps)  
–  Ultra2  SCSI  (8  bits  40  MBps)  
–  Wide  Ultra2  SCSI  (16  bits,  80  MBps)  
Ethernet  
•  History  
–  In  1980,  Xerox,  Digital  Equipment  CorporaBon  (DEC,  now  
Compaq),  and  Intel  published  a  specificaBon  for  an  “Ethernet”  
LAN  (local  area  network)  
–  Now  exists  as  a  standard  -­‐  IEEE  802.3  
•  Physical  interface  uses  either  coax  cable  with  BNC  connectors  or  
twisted  pair  cable  with  RJ-­‐45  connectors  (10Base-­‐T)  
–  Fast  Ethernet  
•  Specified  in  IEEE  802.3u  (100Base-­‐TX)  
•  Data  Rate  
–  10  Mbits/s  for  Ethernet  (10Base-­‐T)  
–  100  Mbits/s  for  Fast  Ethernet  (100Base-­‐T)  
–  1000  Mbits/s  for  Gigabit  Ethernet  (1000Base-­‐T)  
•  ConfiguraBon  
–  Serial,  mulB-­‐point  (token  ring  or  token  bus)  
USB  
•  History  
–  Universal  Serial  Bus  (USB)  is  an  industry  standard  developed  in  
the  mid-­‐1990s  
–  Versions  =  USB  1.x,  USB  2.0,  USB  3.0,  USB  3.1  
•  Data  Rate  /  Power  
–  USB1.x  -­‐  1.5  Mbit/s  (Low-­‐Bandwidth)  and  12  Mbit/s  (Full-­‐Bandwidth),  /
100  -­‐  500mA  
–  USB2.0  -­‐  35  MB/s  or  280  Mbit/s,  /1.5  up  to  5A  
–  USB3.0  -­‐  up  to  4  Gbit/s  (500  MB/s),  /low  power  150  mA  and  900  mA,  
up  to  hi  power  5A.  
–  USB3.1  -­‐  10  Gbps,/  up  to  2  A  at  5  V,  up  to  5  A  at  either  12  V  (60  W)  or  
20  V  (100  W)  

•  ConfiguraBon  
–  Serial,  hub,  Bered  star