Digital Principles and Applications

Programmable ROMs
A programmable ROM (PROM) allows the user instead of the manufacturer to store the data. An instrument
called aPROMprogrammer stores the words by "burning in." Here is an example ofhow a PROM programmer
works. Originally, all diodes are connected at the cross points. For instance, in Fig. 4.40 there would be a
total of32 diodes (8 rows and 4 columns). Each of these diodes has afi1sible link (a small fuse). The PROM
programmer sends destructively high currents through all diodes to be removed. In this way, only the desired
diodes remain connected after programming a PROM. Programming like this is permanent because the data
cannot be erased after it has been burned in.
Here are some commercially available PROMs:
74Sl88: 256 bits organized as 32 x 8
74S287: ·1024 bits organized as 256 x 4
74S472: 4096bits organized as 512 x 8
PRO Ms such as these are useful for small production runs. For instance, if you are building only a few
hundred units (or maybe even just one), you would choose a PROM rather than a ROM.
Since PROMs are useful in many applications, manufacturers produce these chips in high volume.
Furthermore, the PROM is a universal logic solution. Why? Because the AND gates generate all the
fundamental products; the user can then OR these products as needed to generate any Boolean output. One
disadvantage of PRO Ms is the limit on number of input variables; typically, PRO Ms have 8 inputs or less.

Simplified Drawing of a PROM

It is cumbersome to draw large PROMs as illustrated in Fig. 4.41, because of the large number of diodes.
An alternative, streamlined drawing procedure for PROMs like the one in Fig. 4.40 is shown in Fig. 4.41. In
this simplified drawing, the solid black
A B C
bullets indicate connections to the AND-
gate inputs. Each bullet represents a fixed Programmable OR array
connection that cannot be changed. Fur-
thermore, each AND gate has 3 inputs,
indicated by the bullet on .its input line.
Similarly, each OR gate has 8 inputs,
as indicated by the x 's on its input line,
but each x is a fusible link that can. be ·
removed.
Notice that the input side of Fig. 4.41
is a fixed AND array, meaning the inputs
to the AND gates are not programmable
in a PROM. On the other hand, the out-
put side of the circuit is programmable
because each connection at the input of
Fixed AND array
each OR gate is a fusible link. A fixed
AND array and a programmable OR ar- Y3 Y2 Y1 Yo
ray are characteristic of all PRO Ms. To
begin with, every AND-gate output is Streamlined drawing of PROM
connected to every OR-gate input. Since
 Data-Processing Circuits

the AND gates produce all eight possible combinations Programmable OR array
of the input variables A, Band C, it is possible to produce
1----11---1--,iE---1-ABC
any Boolean function at the OR-gate outputs.
1-----1e----,...__,..._...,._]BC
Programming a PROM 1----11---+---l'---+-ABC
Generating a Boolean function at the output of a PROM l----11---+---1'---t-ABC
is accomplished by fusing (melting) fusible links at the
input to the OR gates in Fig. 4.41. For example, suppose 1-----;,1E---l!E---ll---+-ABC

we want to generate the function Yo = ABC. Simply fuse 1---.;i1E---llt'---ll---+-ABC

(melt) 7 of the AND-gate outputs connected to the Yo
1-----1e---_,._---1f---+-ABC
OR-gate input and leave the single AND-gate output
ABC connected. A portion of Fig. 4.41 is shown in Fig. 1----11----;tE---1'---J!:-- ABC
4.43 with the proper fusible link remaining for Y0 .
As a second example, suppose we want to generate the
function Y1 = AB . We must include all terms containing
AB, since
ABC +ABC= AB(C + C)=AB Boolean function from
PROM
The two top fusible links must be included, while the
remaining six are broken, as shown in Fig. 4.42. Continuing in this fashion, you can see that Y2 = A and Y3
=AB.

Erasable PROMs
The erasable PROM (EPRO.M) uses metal-oxide-semiconductor field-effect transistors (MOSFETs ). Data is
stored with an EPROM programmer. Later, data can be erased with ultraviolet light. The light passes through
a quartz window in the IC package. When it strikes the chip, the ultraviolet light releases all stored charges.
The effect is to wipe out the stored contents. In other words, the EPROM is ultraviolet-light-erasable and
electrically reprogrammable.
Here are some commercially available EPROMs:
2716: 16,384 bits organized as 2048 x 8
2732: 32,768 bits organized as 4096 x 8
The EPROM is useful in project development. With an EPROM, the designer can modify the contents
until the stored data is perfect. When the design is finalized, the data can be burned into PROMs (small
production runs) or sent to an IC manufacturer who produces ROMs (large production runs).

20. What is a ROM?

21. What does it mean to say that a particular ROMjs
22. What is a PROM?
 Digital Principles and Applications

• 4.11 PROGRAMMABLE ARRAY LOGIC I

Programmable array logic (PAL) is a programmable array of logic gates on a single chip. PALs are another
design solution, similar to a sum-of-products solution, product-of-sums solution, and multiplexer logic.

Programming a PAL
A PAL is different from a PROM because it has a programmable AND array and a fixed OR array. For
instance. Fig. 4.43 shows a PAL with 4 inputs and 4 outputs. The x's on the input side are fusible links, while
the solid black bullets on the output side are fixed connections. With a PROM programmer, we can burn in
the desired fundamental products, which are then ORed by the fixed output connections.
A B C D

Fixed OR array

Programmable AND array

Y3 Y2 Y1 Yo

ce::~ti;:f}I) Structure of PAL

Here is an example of how to program a PAL. Suppose we want to generate the following Boolean
functions:
 Data-Processing Circuits

Y3 = ABC D + A.BCD + ABCD + ABCD (4.5)

Y2 = ABCD +A.BCD+ ABCD (4.6)
Y, = ABC +ABC+ABC+ABC (4.7)
Yo =ABCD (4.8)
Start with Eq. (4.5). The first desired product is A.BCD. On the top input line of Fig. 4.44 we have
to remove the first x, the fourth x, the fifth x, and the eighth x. Then the top AND gate has an output of
ABCD.
By removing xs on the next three input lines, we can make the top four AND gates produce the fundamental
products ofEq. (4.5). The fixed OR connections on the output side imply that the first OR gate produces an
output of
1:3 = ABCD + ABCD + ABCD + ABCD
A B C D

ti R-7 \7 v Fixed OR array

i,

Programmable AND array

Example of programming a PAL

 Digital Principles and Applications

Similarly, we can remove xs as needed to generate Y2, Y1, and Y0 . Figure 4.44 shows how the PAL looks
after the necessary xs have been removed. If you examine this circuit, you will see that it produces the Y
outputs given by Eqs. (4.5) to (4.8).

Commerdaily Available PAls

The PAL given in Fig. 4.43 is hypothetical. Commercially available PALs typically have more inputs. For
instance, here is a sample of some TTL PALs available from National Semiconductor Corporation:
10H8; 10 input and 8 output AND-OR
16H2: 6 input and 2 output AND-OR
14L4: 14 input and 4 output AND-OR-INVERT
For these chip numbers, H stands for active-high output and Lfor active-low output. The 10H8 and the
16H2 produce active-high outputs because they are AND-OR PALs. The 14L4, on the other hand, produces
an active-low output because it is an AND-OR-INVERT circuit (one that has inverters at the final outputs).
Unlike PROMs, PALs are not a universal logic solution. Why? Because only some of the fundamental
products can be generated and ORed at the final outputs. Nevertheless, PALs have enough flexibility to
produce all kinds of complicated logic functions. Furthermore, PALs have the advantage of 16 inputs
compared to the typical limit of 8 inputs forPROMs.

23. What is a PAL?

24. A PAL has an AND array and an OR array. Which one is fixed and which is programmable?

4.12 PROGRAMMABLE LOGIC ARRAYS

Programmable logic arrays (PLAs), along with ROMs and PALs, are included in the more general
classification ofICs called programmable logic devices (PLDs). Figure 4.45 illustrates the basic operation of
these three PLDs. In each case, the input signals are presented to an array of AND gates, while the outputs
are taken from an array of OR gates.
The input AND-gate array used in a PROM is fixed and cannot be altered, while the output OR-gate array
isji,sible-linked, and can thus be programmed. The PAL is just the opposite: The output OR-gate array is
fixed, while the input AND-gate array is fusible-linked and thus programmable. The PLA is much more
versatile than the PROM or the PAL, since both its AND-gate array and its OR-gate array are fusible-linked
and programmable. It is also more complicated to utilize since the number of fusible links are doubled.
A PLA having 3 input variables (ABC) and 3 output variables (XYZ) is illustrated in Fig. 4.46. Eight AND
gates are required to decode the 8 possible input states. In this case, there are three OR gates that can be used
to generate logic functions at the output. Note that there could be additional OR gates at the output if desired.
Programming the PLA is a two-step process that combines procedures use~ with the PROM and the PAL.
As an example, suppose it is desired to use a PLA to recognize each of the 10 decimal digits represented
in binary form and to correctly drive a 7-segment display. The 7-segment indicator was presented in Sec.
4.5. To begin with, the PLA must have 4 inputs, as shown in Fig. 4.47a. Four bits (ABCD) are required to
represent the 10 decimal numbers (see Table 1.1 ). There must be 7 outputs (abcdefg), 1 output to drive each
 Data-Processing Circuits

Input

Fixed ,___ _ _ _ _ Fusible A B C

AND OR Output
Array Array Programmable OR array
,---------"---
PROM
Input

Fusible ,___ _ _ __ Fixed

AND OR Output
Array Array
PAL
Input

Fusible 1--------1 Fusible

AND OR Output
Array Array Programmable AND array

PLA X Y Z

of the 7 segments of the indicator. Let's assume that our PLA is capable of driving the 7-segment indicator
directly. (This is not always a valid assumption, and a buffer amplifier may be needed to supply the proper
current for the indicator.)
To begin with, all fusible links are good. The circuit in Fig. 4.47b shows the remaining links after
programming. The input AND-gate array is programmed (fusible links are removed) such that each AND
gate decodes one of the decimal numbers. Then, with the use of Fig. 4.47c, links are removed from the output
OR-gate array such that the proper segments of the indicator are illuminated. For instance, when ABCD =
LHLH, segments afgcd are illuminated to display the decimal number 5. You should take the time to examine
the other nine digits to confirm proper operation.
One final point. Many PLDs are programmable only at the factory. They must be ordered from the
manufacturer with specific programming instructions. There are, however, PLDs that can be programmed
by the user. These are said to be field-programmable, and the letter F is often used to indicate this fact. For
instance, the Texas Instruments TIFPLA840 is a field-programmable PLA with 14 input variables, 32 AND
gates, and 6 OR gates; it is described as a 14 x 32 x 6 FPLA.

Wbatis aPLA'l
How does a PLA differ from a PAL?
27. In Fig. 4.47, ABCD =LLHH. What segments are activated?
 Digital Principles and Applications

a
A
b
a

.rjf
C
B p
L d

e/ f
C A e

l g
D
g d
(a) (c)

A B C D

v· ~i ~·R7 0
I
2
3
4

5
6

7
8

a b c d e f g
(b)

7-segment decoder using PLA

4.13 TROUBLESHOOTING WITH A LOGIC PROBE

Chapter 3 introduced the logic clip, a device that connects to a 14 or 16-pin TC. The logic clip contains 16
LEDs that monitor the state of the pins. When a pin voltage is high, the corresponding LED lights up. When
the pin voltage is low, the LED is dark.
Figure 4.48 shows a logic probe, which is another troubleshooting tool you will find helpful in diagnosing
faulty circuits. When you touch the probe tip to the output node as shown, the device lights up for a high state
and goes dark for a low state. For instance, if either A or B, or both. arc low, then Yis high and the probe lights
up. On the other hand, if A and B are both high, Y is low and the probe is dark.