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8086 Signals

The 8086 microprocessor has 40 pins and operates at speeds of 5 MHz, 8 MHz, or 10 MHz. It can run in either single-processor or multi-processor mode. The pins are categorized into common signals used in both modes, signals for single-processor mode, and signals for multi-processor mode. In multi-processor mode, additional control signals are used to interface between multiple processors and a bus controller is required. In single-processor mode, fewer control signals are needed and a simple demultiplexer can produce the necessary signals without a separate bus controller.

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371 views8 pages

8086 Signals

The 8086 microprocessor has 40 pins and operates at speeds of 5 MHz, 8 MHz, or 10 MHz. It can run in either single-processor or multi-processor mode. The pins are categorized into common signals used in both modes, signals for single-processor mode, and signals for multi-processor mode. In multi-processor mode, additional control signals are used to interface between multiple processors and a bus controller is required. In single-processor mode, fewer control signals are needed and a simple demultiplexer can produce the necessary signals without a separate bus controller.

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dgk84_id
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8086 PIN CONFIGURATION

• The 16-bit 8086 microprocessor has 40 pins.


• It is available in 5 MH, 8MHz and 10 MHz.
• It can operate in two modes, i.e. single processor (minimum mode) or multiprocessor moth
(maximum mode) configuration.
• The signals are categorized in three groups as follows

(i) Common signal, which are used in minimum as well as maximum mode
(ii) Signal for minimum mode
(iii) Signals for maximum mode.

• The pin diagram for 8086 processor is shown in fig.


• The signals common for both maximum & minimum modes are:
Pin From 24 to 31 in Minimum Mode:

INTA (Interrupt Acknowledge) Output: This indicates recognition of an interrupt request.


HOLD input, HLDA output:

• A HIGH on HOLD pin indicates that another master (DMA) is requesting to take over the system
bus.
• On receiving HOLD signal processor outputs HLDA signal HIGH as an acknowledgment.
• At the same time, processor tristates the system bus.
• A low on HOLD gives the system bus control back to the processor. Processor then outputs low
signal on HLDA.

Pin Definitions (24 to 31) In Maximum Mode:


Difference between MAX and MIN mode

Maximum mode Minimum Mode

When MN/MX(bar) low 8086 is in maximum When MN/MX(bar) high 8086 is in minimum
mode. mode.

In maximum mode 8086 generates In minimum mode 8086 generates INTA(bar),


QS1,QS0,S0(bar),S1(bar),S2(bar), ALE, DEN(bar), DT/R(bar), M/IO(bar),
LOCK(bar),RQ(bar)/GT1,RQ(bar)/GT0 control HLDA,HOLD and WR(bar) control signals.
signals.
So clearly there are multiple processors in the There is only one processor in the system
system. minimum mode.

Whereas in maximum mode interfacing, In minimum mode no interfacing or


master/slave and multiplexing and several such master/slave signals is required.
control signals are required

In maximum mode a bus controller is required to In minimum mode direct RD WR signals can be
produce control signals. This bus controller used. No bus controller required. A simple
produces MEMRDC, MEMWRC, IORDC, IOWRC, demultiplexer would do the job. of producing
ALE, DEN, DT/R control signals. the control signals. This demultiplexer
produces MEMRD, MEMWR, IORD, IOWR
control signals.

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