Harvard architecture Von Neumann architecture
Harvard architecture – diagram Von Neumann architecture – diagram
The name is originated from It is named after the mathematician and
“Harvard Mark I” a relay based old early computer scientist John Von
computer. Neumann.
It required two memories for their It required only one memory for their
instruction and data. instruction and data.
Design of Harvard architecture is Design of the von Neumann architecture
complicated. is simple.
Harvard architecture is required Von Neumann architecture is required
separate bus for instruction and data. only one bus for instruction and data.
Processor can complete an Processor needs two clock cycles to
instruction in one cycle complete an instruction.
Easier to pipeline, so high Low performance as compared to
performance can be achieve. Harvard architecture.
Comparatively high cost. It is cheaper.
Program Counter
A program counter (PC) is a CPU register in the computer processor which has the
address of the next instruction to be executed from memory. It is a digital counter
needed for faster execution of tasks as well as for tracking the current execution point.
A program counter is also known as an instruction counter, instruction pointer,
instruction address register or sequence control register.
All instructions as well as data in memory have a specific address. As each instruction
is processed, the software application responsible updates the program counter with
the upcoming instructions' address which needs to be fetched. The program counter in
turn passes this information to the memory address register as part of the execution
cycle/standard fetch. The program counter increases the stored value by one as the
next instruction is fetched. If the computer is reset or restarts, the program counter
usually reverts to the value of zero.
Similar to other process registers of the computer, the program counter is like a bank
of binary latches, with each representing one bit of value. The program counter works
in combination with other registers to identify the current instruction. It can be
modified or accessed with the help of access or jump instructions. The PC can be
accessed/modified by jump and branch instructions. Therefore, the destination address
can be loaded to the program counter via branch instructions. The program counter
can also be loaded with the address using the data processing instructions.
Subroutine Calls
Among computer control instructions, we can find subroutine call instructions with the
acronym "Call" and subroutine return instructions with the acronym "Ret".
A subroutine is a sequence of instructions ended with the return instruction "Ret". In the
subroutine call instruction there is always placed the address of the first instruction in the
subroutine called the subroutine address.
The mechanism of subroutine calls and the implementation of "Call" i "Ret" instructions are
based on the use of the stack.
Execution of the subroutine "Call" instruction consists in:
1. storing in the stack the current contents of the program counter (i.e. the return address
do the next instruction after the call) by "Push" operation,
2. writing to the program counter the address embedded in the "Call" instruction,
3. fetching next instruction according to the new contents of the program counter.
Address written to the stack will be used by the return instruction "Ret" for automatic return
from the subroutine to the next instruction after the
"Call" instruction.
Execution of the return from subroutine instruction "Ret" consists in:
1. reading from the top of the stack of the return address ( to the instruction succeeding
the "call" instruction),
2. writing this address to the program counter,
3. execution of the "Pop" operation on the stack,
4. fetching a new instruction according to the new contents of the program counter.
The address written down to the stack during a subroutine call is sometimes called a trace
and the subroutine call is called a jump with a trace.
We frequently use nested subroutine calls, where during execution of a subroutine a new
subroutine is called from its body. The mechanism of the return from the subroutine
according to the trace stored in the stack enables automatic returns to subsequent calling
program contexts with the preserved proper order of returns.
The figure below represents actions concerned with nested subroutine calls from a leading
program thread. During the call of the subroutine 1 (Call 500 stored at address 100), the
return address 101 is stored in the stack. During the call of subroutine 2 (Call 900 written at
address 600), the return address 601 is stored in the stack. When returning from subroutine 2,
the address 601 is taken from the stack. When returning from the subroutine 1, the address
101 is taken from the stack.
The use of stack in subroutine calls
Stack Memory
Stack memory is a special kind of memory that is used for temporary information storage,
when we want to read information exactly in the opposite direction to that in which it was
written in, without taking care about organizing data addressing.
Stack memory is a sequential memory with specific access restrictions that allow writing and
reading information to/from only one location in this memory called the top of the stack.
Stack memory behaves as a queue to which data can be written into the top of the stack,
making at the same time a shift of all information stored in subsequent locations by one
position down in depth of this queue. The readout from the stack is possible only from the top
of the stack. The readout makes information from the top of the stack be removed and a new
information be written at its place from the depth of the stack with a shift of all stored
information one position towards the top of the stack. Then the queue is of the Last-In-First-
Out type.
The stack memory works in a similar way as the magazine of a rifle, in which introduction of
a new cartridge pushes all remaining cartages in depth of the magazine and the use of a
cartridge (a shot) makes the top cartridge be removed and replaced by the first cartridge
residing under the used one.
Three instructions are used to manipulate the stack:
Push - write data into the stack,
Read stack - read the top of the stack,
Pop - remove data from the top of the stack with a shift of its contents up.
Sometimes, arithmetical operations concern two top locations of the stack used as the
arguments and the place for the result. After the pure arithmetical operation, the pop
operation is done and the result is available at the top of the stack.
Stack functioning principles
The first stack implementations were based on the use of registers, in which data were shifted
in a parallel way during Push and Pop operations.
Contemporary stack implementations are based on the use of the main memory supported by
special registers that ease accessing and management of the stack. A stack is a reserved by
the operating system, continuous sequence of consecutive memory locations. The boundaries
of the stack are determined by two special registers - the stack base register and the stack
limit register that hold the addresses of the upper and the lower boundary stack locations.
The address space between these addresses is excluded from other use than for the stack
implementation. The top of the stack is determined by the address hold in the third register
called the stack pointer register.
Before a computer starts program execution the top of the stack register is set to the contents
of the stack base register. After each Push operation, the contents of the stack pointer register
is changed by the byte number that corresponds to the stack word in the direction of the stack
limit. After each Pop operation the contents of the stack pointer is changed in the direction of
the stack base.
Stack implementation the computer - the top of the stack in the memory
The figure above shows organization of the stack in the main memory, where the top of the
stack is accessed only in the memory. Another solution, shown in the figure below, assumes
that the top of the stack and the location just below the top, are stored in special processor
registers: the top of the stack register and the top-1 register.
Stack implementation in the computer - the top of the stack in registers
Interrupts and exceptions
Interrupts enable influencing computer programs execution from the external world using a
hardware method. A processor has usually 2 interrupt pins (maskable and non-maskable
interrupt pins), into which devices external in respect to the computer can send signals to
request execution of an interrupt processing program. An interrupt request makes current
program execution be suspended (after completion of the currently executed instruction).
Instead of execution of the next program instruction, execution of an interrupt processing
program is enforced in a hardware way, starting from the address taken from a special
register or a table in the main memory of the computer.
Actions included in the interrupt processing
An interrupt processing subroutine stores in the stack the states of selected basic processor
registers, which will be necessary to restore the interrupted program state (so called program
context) on return from the interrupt. The stored registers are program counter, processor
status register, processor stack pointer, other special registers, frequently the accumulator and
a few basic general purpose registers that contain the data.
Next, a proper interrupt processing subroutine program is performed, which usually performs
some higher necessity operations (more prioritary than the current program), which are
caused by asynchronous interrupt request. When the interrupt processing program is
completed, the contents of registers which are important for restoring the interrupted program
activity are fetched, one after another, from the stack (by execution of "read stack" instruction
- to the accumulator and "Pop" instructions followed by instructions that send data from the
accumulator to other registers). When the contents of all relevant registers are restored, the
return from interrupt subroutine is executed that fetches the next instruction according to the
program counter.
Checking for interrupt requests takes place after such instructions after which interrupts are
enabled. It enlarges the instruction cycle by the third phase: interrupt processing phase. Not
after all instructions, interrupts processing is enabled. The interrupt processing is not allowed
after instructions that tested or set computer state that has to be preserved during execution of
the next instruction. Instructions after which interrupt processing is not enabled are called
uninterruptible instructions.
Interrupt processing can be blocked also in the programmed way - by interrupts masking, as
a result of execution of relevant internal computer instructions. It does not concern interrupts
coming on the non-maskable interrupt pin. These interrupts have to processed always,
however only after interruptible instructions.
Instruction execution cycle including interrupt processing
A signal coming to the interrupt pin can be a logical sum of interrupt signals coming from
many sources. It is necessary to detect from what source the current interrupt signal comes
and if the signal represents simultaneous interrupt requests from many sources - to decide
which of the sources to service first, since the processor can process only one interrupt at a
time. These problems are solved by interrupt controllers that will be discussed more in
detail in the lecture on input/output device controllers. Interrupt processing can be organized
using one or many priority levels assigned to interrupts coming from different sources.
Interrupt controllers transfer to the processor not only a summary interrupt request signal but
also an identification code of the interrupt that has the highest priority.
With a single priority level, interrupt processing programs are not interruptible by other
interrupts that can arrive. With many priority levels, interrupts that have higher priority can
break processing of interrupts with lower level priorities. This is organized using nested
interrupt processing subroutine calls where the states of broken programs and/or subroutines
are stored in the stack. The principles of interrupt processing with a single or multiple priority
levels are illustrated in two figures below.
Interrupt processing with a single priority level
Interrupt processing with many priority levels
Exceptions are a kind of internal interrupts triggered inside a processor. They are activated
either by special internal instructions or by some exceptional situations which can occur
during program execution and threaten to destroy system integrity. The exceptions are
processed in a similar way as non-maskable interrupts.
In System Programming vs In application programming
In System Programming (ISP) and In Application Programming (IAP).
In-System Programming(ISP) can be defined as a technique used in which a programmable
device is programmed after installation of the device to the circuit board, other than the devices
being programmed prior to installing it to the system. The device can be a micro chip or a micro
controllers or other embedded devices. ISP is also referred to as in-circuit programming. In In-
System programming we require a programming adapter, a special programming interface e.g.
Serial Programming Interface(SPI) and a software tool which will manage the programming
interface through any [Link]-Application Programming(IAP) on the other hand is the ability
of an application to erase and program codes in the memory of an end user application. A good
example is when an application requires to download new code parts. In-Application
Programming therefore means that the app will re-program parts of the on chip Flash-ROM.
Let us now look at some of the differences between In-System Programming and In-
Application Programming.
In both In-System Programming and In Application programming, the main device
involved are the micro controllers. In System Programming memory requires that the micro
controller (MCU) is off line. This means that it is not involved when the memory is being
programmed. Whereas In Application Programming, the micro controller (MCU) always is
involved when programming the memory. Therefore, it is always important to have the
systems online so as to update the application memory.
In System Programming is mainly applicable for manufacturing. It is preferred in
manufacturing as it allows the manufacturers to program chips in their systems instead of
buying other pre-programmed chips from other distributors. This helps them apply any
design or code changes while still in the production run. While IAP is more designed for field
updates. Always note that for In System Programming, one can erase or programme the
whole controller, while for In Application Programming only some of the memory sections of
the controller can be programmed and not the logic portions.
In conclusion, we can say that ISP is very important as it enables systems to be upgraded.
The upgrade is done without the need of disassembling the main system or to remove the
memory physically. Another advantage of ISP is that it allows manufacturers of major
electronic devices to integrate programming phase and testing phase into one phase of
production. This is very important as it leads to cycle cost reduction as no disassembling of
the application is required compared to In Application Programming as it will require
programming a computer logic devices while at the same time they are being operated by the
system.
