DEPART
DEPARTMENT OF ELECTRICAL
ENGINEERING
tegrated
circuit design
DEE611
EE6113
113 CMOS INTEGRATED
CIRCUIT DESIGN
PRACTICAL WORK ASSESSMENT
PRACTICAL WORK ASSESSMENT
PRACTICAL WORK ASSESSMENT
EE603 CMOS INTEGRATED CIRCUIT DESIGN
PROGRAMME : DTK PRACTICAL WORK NUMBER : 1
DATE : LECTURER’S NAME :
TITLE : Introduction to Microwind 2.6a.
1. PRACTICAL WORK ASSESSMENT - 100%
i. Practical Skill Assessment - 70%
ii. Lab Report Assessment
Curriculum - 30%
Development and Evaluation Sections
2. GENERIC SKILL ASSESSMENT - NONE
Curriculum Development and Career Training Division
1. PRACTICAL WORK ASSESSMENT
Department of Polytechnic Education
PRACTICAL WORK ASSESSMENT
DEE6113 CMOS INTEGRATED CIRCUIT DESIGN
PROGRAMME : DTK PRACTICAL WORK NUMBER : 1
DATE : LECTURER’S NAME :
TITLE : Introduction to Microwind 2.6a.
A. PRACTICAL SKILL ASSESSMENT B. LAB REPORT
NO. ATTAINMENT ATTAINMENT
(CLO3, PLO5, LD2) ASSESSMENT
Students should be able to draw Report Format and
1. Organization
basic MOS transistor layout Theory
Procedure
Student able to set the polysilicon
2. Results
width correctly
Students should be able to produce
3. the MOS transistor cross-section
correctly. Analysis
Student able to measure
4.
equipment’s correctly Question/
Discussion
Student able to change the layout
5.
background colour correctly.
Conclusion
Student able to produce the
6.
simulation of the layout correctly.
PERCENTAGE = (70%) PERCENTAGE = (30%)
2. GENERIC SKILL ASSESSMENT (GSA) ATTAINMENT TOTAL (100%)
(PLO6, LD3)
NONE
Remark: LD1 Knowledge, LD2 Practical Skill, LD3 Communication Skill, LD4 Critical Thinking and Problem Solving Skills
LD5 Sosial Skills and Responsibilities, LD6 Continuous Learning and Information Management Skills, LD7 Management and
Entrepreneurial Skills, LD8 Professionalism, Ethics and Moral, LD9 Leadership and Teamwork Skills
PRACTICAL WORK ASSESSMENT
A. PRACTICALS TOTAL GSA
NO. REG. NO. NAME GROUP MEMBERS B. LAB REPORT
KILL (A+B=100%) (100%)
ASSESSMENT
ASSESSMENT
(30%)
(70%)
PRACTICAL / LAB SHEET FORMAT
DEE 6113 CMOS Integrated Circuit Design
PRACTICAL LABORATORY NUMBER: 1
TITLE : Introduction to Microwind 2.6a.
LEARNING OUTCOME:
At the end of this lab, students should be able to
1. To understand the features of Microwind software.
2. To practice drawing the layout of simple devices such as MOS transistor.
3. To practice simulating the layout of simple devices such as MOS transistor.
APPARATUS/EQUIPMENT:
1. PC Set (Windows 7)
2. Microwind 2.6a software.
INTRODUCTION / THEORY:
In this lab an important VLSI tool Microwind is studied. The main objective of this lab is to
understand the features of this software and practice layout and simulation of simple devices like
MOSFETS and inverter.
Microwind is a windows based VLSI tool designed especially for designing and simulating
microelectronic circuits at layout level. The tool features full editing facilities, e.g. copy, cut, paste,
duplicate, and move operations. This software also provides various views of the layout such as 2D
cross section, 3D process viewer, etc. The software is capable of providing limited simulation
facilities as well as by building layouts of some basic devices.
In the next section we will discover the important features of software in detail.
ACTION NAME & DESIGNATION SIGNATURE DATE
Prepared by:
Approved by:
WORKING PROCEDURES:
Part 1 Layout Steps
• Open the Microwind Editor window.
• Select the Foundry file from File menu. Select “[Link]” file. Click open, which is shown in
figure 1. (We are using the 0.6micron technology)
Figure 1: Foundry file selection in Microwind
• Click file menu, select ‘new’ and save it with name “[Link]”
• Now you can start to make layout in Microwind with desired process.
• Following are the steps used for the NMOS device:
1. Click on the “show palette” window. This is shown in figure2.
2. From the palette window click on the “polysilicon”.
3. Draw “polysilicon” box and the width width should not be less than 2 λ, which is the
minimum width of the polysilicon box as shown in figure 3.
4. Draw a N+ Diffusion as shown in figure 4. The intersection between diffusion and
polysilicon creates the channel of the nMOS device.
Figure 2: Palette window in Microwind Editor
Figure 3: Creating a polysilicon box Figure 4: Creating a N+ Diffusion
Part 2 : Change the Layout Background Colour
• Click file menu, select ‘Colors..’ and tick ‘White background’ box.
• Your layout and simulation background will turn into white colour.
Figure 5: Changing the layout background colour.
Part 3 :Process Simulation
Click on this icon above to see the process section in 2D.
• The cross-section is given by a click of the mouse at the first point and the release of the
mouse at the second point.
• The cross-section of the n-channel MOS device is shown in figure 6.
Figure 6: The cross-section of the nMOS devices.
Part 4 : MOS Characteristics
• Click on the MOS characteristics icon. The screen shown in Figure 7 appears. It represents
the Id/Vd simulation of the nMOS device.
Figure 7: N-Channel MOS characteristics
• The MOS size (width and length of the channel situated at the intersection of the polysilicon
gate and the diffusion) has a strong influence on the value of the current.
• In Figure 7, the MOS width is 12.8µm and the length is 1.2µm. A high gate voltage (Vg =5.0)
corresponds to the highest Id/Vd curve. For Vg=0, no current flows. The maximum current
is obtained for Vg=5.0V, Vd=5.0V, with Vs=0.0.
QUESTION / DISCUSSIONS:
1. Explain the terminology ‘technology feature’. (4 marks)
2. Describe the difference between micron and lambda unit in layout design process.
(4 marks)
3. PMOS transistor is usually larger than NMOS transistor in layout. Give an explanation.
(4 marks)
