1

Comparative study of ,MLI

K. Rajambal [Link] and Dual inverter
1 2*

using space
1&2
Department vector
of Electrical, modulation
Pondicherry techniques
Engineering College, Puducherry, India.

*
Corresponding Author Email: puni_nila@[Link].

Abstract

This paper presents a comparative analysis of MLI and dual inverter and the topologies are
compared in terms of inverter output voltage and motor phase voltage by varying input voltages and for
different loads. A model of cascaded multilevel inverter and Z-source inverter are built in
MATLAB/SIMULINK and its performance are analyzed. Space vector modulation technique is used to
generate pulses for the inverters. SVPWM is one of the most popular techniques gained interest recently.
This technique results in higher magnitude of fundamental output voltage available as compared to
sinusoidal PWM. A Simulation model of the scheme is developed and applied to the MLI and dual
Inverters. The effects of modulation index on the output voltage are studied through simulation and
prototypes of the inverters are implemented. The simulation and the experimental results are presented in
this paper.

Keywords: Multilevel Inverter(MLI), Dual Inverter(DI), Space vector modulation technique(SVM), Modulation
Index(MI).

. Introduction A Study of MLI and DI fed open end winding

induction motor drive is considered for study, a
The speed control of Induction motor has got simulation study for three level output is to be carried
a lot of importance in industrial applications. Stator out for Dual Inverter using MATLAB/Simulink
voltage speed control is the most commonly used package. Space vector modulation technique is used to
method. Stator voltage of induction motor is generate pulses for the inverters. SVPWM is one of
conventionally controlled by using the conventional the most popular techniques gained interest recently.
PWM inverters. Later development is MLI; it allows This technique results in higher magnitude of
the operation at higher DC voltages using fundamental output voltage available as compared to
semiconductor switches connected in series and sinusoidal PWM. A Simulation model of the scheme
produce voltage waveforms with better harmonic is developed and applied to the Dual [Link]
profile than conventional two level inverters. The prototype model is built in laboratory and tested for
drawback of MLI configuration is complex for higher varying input voltages and loads. The effect of
number of levels and in turn affects the cost of the variation of modulation index is studied and the
system clearly. results are presented. A comparison of the simulation
The drawback of MLI is overcome by feeding results validates using simulink model developed for
the induction motor from both the ends through two three levels output.
three phase inverters with the removal of neutral point
of stator. This configuration is called Dual inverter fed In this paper, a comparative study of the MLI
open end winding induction motor drive. The and Dual inverter topologies are considered. A
advantages of the dual inverter are, it uses less number MATLAB/SIMULINK of the topologies is developed.
of switches therefore it does not have any switching The voltage, current variations are studied for various
losses, absence of neutral point fluctuations, less input voltages. The effects of modulation index are
number of DC voltage sources, it achieves improved also analyzed. The performances of the schemes are
quality of output waveform and reduced system compared in terms of output voltage, total harmonic
complexity and cost. Further it provides output with distortion and the results are presented.
less THD by increasing the number of output levels
when compared to the MLI of same levels. 2. Multilevel Inverter
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Multilevel inverters are increasingly gaining capacitors and choose a fundamental frequency
importance for industrial and utility applications due
to their inherent beneficial features. Due to circuit
complexity and cost inhibit extension of the
conventional three-level neutral-point-clamped
(NPC) [2]-[4] configuration to higher levels. Certain
modifications have been suggested to extend the
conventional NPC three-level inverters for a higher
number of levels. Flying-capacitor and series-
connected H-bridge configurations [5] have also
been suggested as alternative circuit topologies.
However, these configurations are also complex for
higher number of levels. The different techniques
used for generating signals are Pulse Width
Modulation (PWM) Technique [8], Sinusoidal
PWM Technique [9], Space vector PWM
(SVPWM) technique etc. SVPWM is one of the
most popular techniques gained interest recently switching pattern to produce a nearly sinusoidal
[10]. output.
This technique results in higher magnitude of
fundamental output voltage available as compared
to sinusoidal PWM. However, SVPWM
algorithm used in three-level inverters is more
complex because of large number of inverter
switching states.
In this paper, a simplified switching techniques
using Space Vector Modulation strategy has been
presented for MLI and DI [9]. The scheme has been
developed in Embedded Matlab Editor and generated
firing pulses are applied to the Inverters. The output
Voltage, currents and THD are studied for different
modulation indices and the results are presented.
A cascade multilevel inverter is a power
electronic device built to synthesize a desired AC
voltage from several levels of DC voltages. Such
inverters have been the subject of research in the last To operate a cascade multilevel inverter using a single
several years, where the DC levels were considered to DC source, it is proposed to use capacitors as the DC
be identical in that all of them were batteries, solar sources for all but the first source. Consider a simple
cells, etc. In, a multilevel converter was presented in cascade multilevel inverter with two H-bridges as
which the two separate DC sources were the shown in Fig. 1.3. The DC source for the first H-
secondaries of two transformers coupled to the utility bridge (H1) is a DC power source with an output
AC power. In contrast, in this paper, only one source voltage of Vdc, while the DC sourcefor the second H-
is used without the use of transformers. The interest bridge (H2) is a capacitor voltage to be held at Vdc/2.
here is interfacing a single DC power source with a The output voltage of the first H-bridge is denoted by
cascade multilevel inverter where the other DC v1 and the output of the second H-bridge is denoted
sources are capacitors. Currently, each phase of a by v2 so that the output of this two DC source cascade
cascade multilevel inverter requires n DC sources for multilevel inverter is v(t) = v1(t)+v2(t). By opening
2n+1 levels in applications that involve real power and closing the switches of H1 appropriately, the
transfer. In this work, a scheme is proposed that output voltage v1 can be made equal to −Vdc, 0, or
allows the use of a single DC power source (e.g., Vdc while the output voltage of H2 can be made equal
battery or fuel cell stack) with the remaining n − 1 DC to −Vdc/2, 0, or Vdc/2 by opening and closing its
sources being capacitors. It is shown that one can switches appropriately. Therefore, the output voltage
simultaneously maintain the DC voltage level of the
of the inverter can have the values −3Vdc/2, −Vdc,
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−Vdc/2, 0, Vdc/2, Vdc, 3Vdc/2, which is seven Va’b’, Vb’c’, Vc’a’ are the phase voltages of the
levels and is illustrated in Fig. 1.4(a). inverter 2. The dual feeding scheme requires either
harmonic filters or isolation transformer to prevent
currents in the triplen harmonic order flowing in the
motor phases and the semiconductor devices. Unequal
DC link voltages are employed for individual inverters
to achieve some higher levels.

Fig. 1.4 (a) Output waveform of an 7-level cascade

Figure 1
multilevel inverter. (b) H-bridge voltages v1 and v2
which achieve the same output voltage waveform v = v1
+ v2. 4. MODULATION SCHEMES

3. Dual Inverter A. Multilevel inverter

The dual two-level inverter fed open-end A three-level inverter is characterized by 3 3=

winding induction motor drive gives voltage space 27 switching states as indicated in Fig.2 where the
phasor locations similar to a three- level inverter fed space vector diagram for the three-level inverter
induction motor drive. The dual two-level inverter which is divided into the six sectors (A, B, C, D, E
fed open-end winding induction motor drives offer and F) is also shown. There are 24 active states, and
certain advantages compared to the three-level three zero states that lie at the center of the hexagon.
inverter drives such as redundancy of the space Each sector has four regions (1,2,3,4) [2].
vector combinations for the same number of space
vector locations and the absence of neutral point
fluctuations.
In this work two two-level inverters are
used to feed the opposite ends of the open-end
winding induction motor, employing space-vector
based PWM scheme for the dual-inverter driven
open-end winding induction motor drive. In this
scheme, the common mode voltages (the harmonics
of the triplen order) in the phase of the motor were
suppressed by employing an isolated DC-power
supply for each inverter. Thus, this scheme requires
two isolation transformers for realizing two isolated
DC-power supplies.
The schematic diagram of the open-end Figure 2
winding induction motor drive configuration is shown
in the fig.2.1. The open end winding structure is Where V1, V2, and V3 are vectors that define the
realized by opening the neutral-point of stator winding triangle region in which V* is located. T1, T2 and T3
of the conventional squirrel cage induction motor. The are the corresponding vector durations and Ts is the
Open-end winding induction motor is then fed with a sampling time. In a three-level inverter similar to a
two level inverter at both the ends of the motor. .Vab, two-level inverter, each space vector diagram is
Vbc, Vca are the phase voltages of the inverter 1. divided into 6 sectors. For simplicity here only the
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switching patterns for Sector A will be defined so that

calculation technique for the other sectors will be
similar. Sector A is divided into 4 regions as shown in
Fig.3 where all the possible switching states for each
region are given as well. SVPWM for three-level
inverters can be implemented by using the steps of
sector determination, determination of the region in
the sector, calculating the switching times, Ta, Tb, Tc
and finding the switching states.
Figure 5

Table 1 Depicts the switching sequence for

MLI

On-sequence in an Off-sequence in an
Se
equivalent equivalent
c
Figure 3 Sector A and its switching states for MLI single inverter drive single inverter drive
1 000,100,110,111 111,110,100,000
B. Dual inverter 7 0-1-1,1-1-1,10-1,100 100,10-1,1-1-1,0-1-1
The space phasor combinations from the 8 00-1,10-1,100,110 110,100,10-1,00-1
Dual inverters are shown in Fig.3. In all 64 spaces 9 00-1,10-1,11-1,110 110,11-1,10-1,00-1
phasor combinations are possible from both the
inverters. For example, a combination 6-1’ implies
that the switching state for inverter- 1 is (+ - +) and Table 2 Depicts the switching sequence for
that for inverter-2 is (+ - -). A‘+’ means top switch DI
in the inverter is on, a ‘-’ means bottom switch in
the inverter is on. The motor phase voltage can be On-sequence in Off-sequence in
found out from the pole voltages of individual sector
inverters. an equivalent singlean equivalent single
number
inverter drive inverter drive
1 88’-18’-28’-78’ 78’-28’-18’-88’
7 84’-14’-24’-74’ 74’-24’-14’-84’
8 85’-15’-65’-75’ 75’-65’-15’-85’
9 85’-15’-25’-75’ 75’-25’-15’-85’

SIMULATION RESULTS
The Simulink model of MLI and dual inverter fed
open end winding induction motor drive and Space vector
modulation technique are presented. The input voltages for
the combination of Inverter 1 and Inverter 2 both ON are
assumed as Vdc/2 =310 V for an individual inverter
(Vdc=620V).Firing pulses are generated for both topologies
and fed to the corresponding switches of the inverters. The
output voltage of MLI is shown in the figure and the motor
Figure 4 output phase voltage for three level output is shown in the
fig. ant the output current MLI is shown in fig.
Sector A is divided into 4 regions(1,7,8,9) is
shown in the figure but the switching states of DI are
different from [Link] switching states for both the
topologies has been discussed.
 5

inverter has two levels and the Root Mean Square (RMS)
voltages Vab, Vbc, Vca for inverter 1, the Root Mean
Square (RMS) voltages Va’b’, Vb’c’, Vc’a’ for inverter 2,
the net voltage across the motor winding Vo and the Total
Harmonic Distortion THD and currents for modulation
index(MI)=0.9 are observed for both the Inverter ON are
shown in the figure 4a, 4b, 4c & 4d respectively.

It is seen that the output voltage of the individual

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Fig.17 (a) Block diagram (b) Experimental set up of

cascaded five level inverter.

Fig. 18 Firing pulse of cascaded five level inverter.

6. Experimental Results
A. Cascaded five level inverter

Fig. 19 Cascaded five level inverter output voltage for MI

of (a) 0.8 (b) 0.6.

(a)

B. Z-source inverter
CT60AM-18F IGBT is used in the single
phase H bridge inverter.

(b)
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Figure 20 Experimental set up of Z-source inverter. 26.1V and 24.8. The output waveforms are shown in
fig. 19. The Z-parameters used in Z-source inverter
are L=3mH, 5A and C=470micro F, 600V. The firing
pulses to the gate circuit of Z-source inverter is shown
in fig. 21. The Capacitor voltage and DC link voltage
for Vin=40V are 60V and 104V for a shoot through
period of 1.2ms and 0.214ms. The waveforms are
shown in fig. 22 and fig. [Link] output voltage of Z-
Fig. 21 Firing pulse of Z-source inverter. source inverter for the input of 40V at zero shoot
through state and the 1.2ms shoot through period are
24V(peak) and 100V(peak), Vrms=72V. The output
waveforms are shown in figure 24.

7. Conclusion
Based on the simulation and experimental
results, it is found that the Z-source inverter achieves
Fig. 22 Capacitor voltage of Z-source inverter. better performance with a single inverter and reduced
number of panels when compared to the cascaded
MLI. Since the Z-source inverter boost and inverter
the input DC in single stage, its firing circuit is simple.
Therefore, the Z-source inverter is identified to be best
topology for PV inverter.
8. ABBREVIATIONS
M = Modulation index
V0 = Output Voltage in volt
Fig. 23 DC link voltage of Z-source inverter.
n = Number of levels
rms = Root mean square
VDS(max) = Maximum drain-source voltage
ID(max) = Maximum drain current
R DS (on) = Drain–source resistance
tr = Rising time in seconds
tf = Falling time in seconds
Vin = Input voltage in volts
C = Capacitance (µF)
L = Inductance (mH)
RMS=Root Mean Square
PF= Power Factor
mW=milli watt
kVA= Kilo volt ampere
MLI= Multilevel Inverter
Fig. 24 Z-source Inverter output voltage for a shoot through RL= Resistive Inductive load
kHz=kilo Hertz
state (24a) zero second (24b) 1.2 millisecond.
9. APPENDIX
Experimental work on cascaded five level Specification of BP 380 Photovoltaic Module
inverter and Z-source inverter was carried out and the
experimental set ups are shown in fig. 17 and fig. 20.
The procedure is repeated for different voltage for
five, seven, nine and eleven levels and the
corresponding waveforms are shown in fig. 9 to
fig.12. The steady state results for varying solar
intensity and optimum MI to maintain the output
voltage constant is presented in table 2 and 3 and the
total harmonic distortion for different levels of
cascaded multilevel inverter is shown in fig. 13. The
firing pulses to the gate circuit of five level inverter
are shown in fig.18. The output voltage of five level 10. References
inverter for the input of 40V at MI of 0.8 and 0.6 are
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