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D Escriptio S Feature: LT1112/LT1114 Dual/Quad Low Power Precision, Picoamp Input Op Amps

The document summarizes the LT1112 dual op amp and LT1114 quad op amp. Key features include low offset voltage of 60uV max for prime grades and 75uV max for low cost grades, low input bias current of 250pA max, low noise, and 400uA max supply current per amplifier. These precision op amps are well-suited for applications like instrumentation amplification, thermocouple amplification, and battery-powered systems due to their low power consumption and matching specifications.

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Rabah Amidi
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© © All Rights Reserved
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0% found this document useful (0 votes)
187 views12 pages

D Escriptio S Feature: LT1112/LT1114 Dual/Quad Low Power Precision, Picoamp Input Op Amps

The document summarizes the LT1112 dual op amp and LT1114 quad op amp. Key features include low offset voltage of 60uV max for prime grades and 75uV max for low cost grades, low input bias current of 250pA max, low noise, and 400uA max supply current per amplifier. These precision op amps are well-suited for applications like instrumentation amplification, thermocouple amplification, and battery-powered systems due to their low power consumption and matching specifications.

Uploaded by

Rabah Amidi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

LT1112/LT1114

Dual/Quad Low Power


Precision, Picoamp Input Op Amps
U
FEATURES DESCRIPTIO
■ S8 Package – Standard Pinout The LT1112 dual and LT1114 quad op amps achieve a new
■ Offset Voltage – Prime Grade: 60µV Max standard in combining low cost and outstanding precision
■ Offset Voltage – Low Cost Grade specifications.
(Including Surface Mount Dual/Quad): 75µV Max The performance of the selected prime grades matches or
■ Offset Voltage Drift: 0.5µV/°C Max exceeds competitive devices. In the design of the LT1112/
■ Input Bias Current: 250pA Max LT1114 however, particular emphasis has been placed on
■ 0.1Hz to 10Hz Noise: 0.3µVP-P, 2.2pAP-P optimizing performance in the low cost plastic and SO
■ Supply Current per Amplifier: 400µA Max packages. For example, the 75µV maximum offset voltage
■ CMRR: 120dB Min in these low cost packages is the lowest on any dual or
■ Voltage Gain: 1 Million Min
quad non-chopper op amp.
■ Guaranteed Specs with ±1.0V Supplies
■ Guaranteed Matching Specifications The LT1112/LT1114 also provide a full set of matching
■ LT1114 in Narrow Surface Mount Package specifications, facilitating their use in such matching
dependent applications as two and three op amp instru-
UO mentation amplifiers.
APPLICATI S
Another set of specifications is furnished at ±1V supplies.
■ Picoampere/Microvolt Instrumentation This, combined with the low 320µA supply current per
■ Two and Three Op Amp Instrumentation Amplifers amplifier, allows the LT1112/LT1114 to be powered by
■ Thermocouple and Bridge Amplifiers two nearly discharged AA cells.
■ Low Frequency Active Filters
Protected by U.S. Patents 4,575,685; 4,775,884 and 4,837,496
■ Photo Current Amplifiers
■ Battery-Powered Systems

Distribution of Input Offset Voltage


Dual Output, Buffered Reference (On Single 3V Supply) (In All Packages)
3V TOTAL SUPPLY CURRENT = 700µA 30
VS = ±15V
2V REFERENCE: SOURCES 1.7mA, SINKS 5mA
RX TA = 25°C
15k OPTIONAL RX = 300Ω INCREASES SOURCE 25
CURRENT TO 5mA
0.765V REFERENCE: SOURCES 5mA,
PERCENT OF UNITS

SINKS 0.5mA 20
2 – 8
TEMPERATURE COEFFICIENT LIMITED
1 BY REFERENCE = 20ppm/°C 15
1/2 LT1112 2.000V
3 + MINIMUM SUPPLY = 2.7V
75k 10
0.1% LT1004-1.2

5
6 –
7 0
1/2 LT1112 0.765V –70 –50 –30 –10 10 30 50 70
5 + INPUT OFFSET VOLTAGE (µV)
4
46.4k LT1112/14 • TA02

0.1%
LT1112/14 • TA01

1
LT1112/LT1114
W W W U
ABSOLUTE AXI U RATI GS
Supply Voltage ..................................................... ±20V Operating Temperature Range
Differential Input Current (Note 1) ..................... ±10mA LT1112AM/LT1112M
Input Voltage (Equal to Supply Voltage) ............... ±20V LT1114AM/LT1114M ...................... – 55°C to 125°C
Output Short-Circuit Duration ......................... Indefinite LT1112AC/LT1112C/LT1112S8
Storage Temperature Range ................ – 65°C to 150°C LT1114AC/LT1114C/LT1114S .......... – 40°C to 85°C
Lead Temperature (Soldering, 10 sec)................ 300°C

U W U
PACKAGE/ORDER I FOR ATIO
TOP VIEW TOP VIEW
ORDER PART ORDER PART
OUT A 1 8 V +
NUMBER OUT A 1 8 V+ NUMBER
–IN A 2 7 OUT B –IN A 2 7 OUT B
A A
+IN A 3 6 –IN B LT1112AMJ8 +IN A 3 6 –IN B LT1112S8
B B
V– 4 5 +IN B LT1112MJ8 V– 4 5 +IN B
LT1112ACN8
J8 PACKAGE
8-LEAD CERAMIC DIP
N8 PACKAGE
8-LEAD PLASTIC DIP LT1112CN8
S8 PACKAGE
8-LEAD PLASTIC SO
PART MARKING
TJMAX = 160°C, θJA = 100°C/W (J8) TJMAX = 140°C, θJA = 190°C/W 1112
TJMAX = 140°C, θJA = 130°C/W (N8)

TOP VIEW
ORDER PART
TOP VIEW ORDER PART
OUT A 1 14 OUT D
NUMBER OUT A 1 16 OUT D NUMBER
–IN A 2 13 –IN D –IN A 2 15 –IN D
3
A D
LT1114AMJ +IN A 3
A D
14 +IN D
LT1114S
+IN A 12 +IN D
V+ 4 11 V – LT1114MJ V+ 4 13 V –
+IN B 5
B
10 +IN C LT1114ACN +IN B 5
B C
12 +IN C
C
–IN B 6 9 –IN C LT1114CN –IN B 6 11 –IN C
OUT B 7 8 OUT C OUT B 7 10 OUT C
NC 8 9 NC
J PACKAGE N PACKAGE
14-LEAD CERAMIC DIP 14-LEAD PLASTIC DIP
S PACKAGE
TJMAX = 160°C, θJA = 80°C/W (J) 16-LEAD PLASTIC SO (NARROW)
TJMAX = 140°C, θJA = 110°C/W (N) TJMAX = 140°C, θJA = 150°C/W

ELECTRICAL CHARACTERISTICS VS = ±15V, VCM = 0V, TA = 25°C, unless otherwise noted.

LT1112AM/AC LT1112M/C/S8
LT1114AM/AC LT1114M/C/S
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
VOS Input Offset Voltage 20 60 25 75 µV
VS = ±1.0V 40 110 45 130 µV
∆VOS Long Term Input Offset 0.3 0.3 µV/Mo
∆Time Voltage Stability
IOS Input Offset Current 50 180 60 230 pA
LT1114S 75 330 pA
IB Input Bias Current ±70 ±250 ±80 ±280 pA
LT1114S ±100 ±450 pA
en Input Noise Voltage 0.1Hz to 10Hz (Note 9) 0.3 0.9 0.3 0.9 µVP-P

2
LT1112/LT1114

ELECTRICAL CHARACTERISTICS VS = ±15V, VCM = 0V, TA = 25°C, unless otherwise noted.

LT1112AM/AC LT1112M/C/S8
LT1114AM/AC LT1114M/C/S
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
Input Noise Voltage Density fO = 10Hz (Note 9) 16 28 16 28 nV/√Hz
fO = 1000Hz (Note 9) 14 18 14 18 nV/√Hz
in Input Noise Current 0.1Hz to 10Hz 2.2 2.2 pAP-P
Input Noise Current Density fO = 10Hz 0.030 0.030 pA/√Hz
fO = 1000Hz 0.008 0.008 pA/√Hz
VCM Input Voltage Range ±13.5 ±14.3 ±13.5 ±14.3 V
CMRR Common-Mode Rejection Ratio VCM = ±13.5V 120 136 115 136 dB
PSRR Power Supply Rejection Ratio VS = ±1.0V to ±20V 116 126 114 126 dB
Minimum Supply Voltage (Note 4) ±1.0 ±1.0 V
RIN Input Resistance
Differential Mode (Note 3) 20 50 15 40 MΩ
Common Mode 800 700 GΩ
AVOL Large-Signal Voltage Gain VO = ±12V, RL = 10kΩ 1000 5000 800 5000 V/mV
VO = ±10V, RL = 2kΩ 800 1500 600 1300 V/mV
VOUT Output Voltage Swing RL = 10kΩ ±13.0 ±14.0 ±13.0 ±14.0 V
RL = 2kΩ ±11.0 ±12.4 ±11.0 ±12.4 V
SR Slew Rate 0.16 0.30 0.16 0.30 V/µs
GBW Gain-Bandwidth Product fO = 10kHz 450 750 450 750 kHz
IS Supply Current per Amplifier 350 400 350 450 µA
VS = ±1.0V 320 370 320 420 µA
Channel Separation fO = 10Hz 150 150 dB
∆VOS Offset Voltage Match (Note 5) 35 100 40 130 µV
∆IB + Noninverting Bias Current Match 100 450 100 500 pA
(Notes 5, 6) LT1114S 120 680 pA
∆CMRR Common-Mode Rejection Match (Notes 5, 7) 117 136 113 136 dB
∆PSRR Power Supply Rejection Match (Notes 5, 7) 114 130 112 130 dB

ELECTRICAL CHARACTERISTICS VS = ±15V, – 55°C ≤ TA ≤ 125°C, unless otherwise noted.

LT1112AMJ8 LT1112MJ8
LT1114AMJ LT1114MJ
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
VOS Input Offset Voltage ● 35 120 45 150 µV
VS = ±1.2V ● 60 220 70 260 µV
∆VOS Average Input Offset Voltage Drift (Note 8) ● 0.15 0.5 0.20 0.75 µV/°C
∆Temp
IOS Input Offset Current ● 80 400 100 500 pA
IB Input Bias Current ● ±150 ±600 ±170 ±700 pA
VCM Input Voltage Range ● ±13.5 ±14.1 ±13.5 ±14.1 V
CMRR Common-Mode Rejection Ratio VCM = ±13.5V ● 116 130 111 130 dB
PSRR Power Supply Rejection Ratio VS = ±1.2V to ±20V ● 112 124 110 124 dB
AVOL Large-Signal Voltage Gain VO = ±12V, RL = 10kΩ ● 500 2500 400 2500 V/mV
VO = ±10V, RL = 2kΩ ● 200 600 170 500 V/mV

3
LT1112/LT1114

ELECTRICAL CHARACTERISTICS VS = ±15V, – 55°C ≤ TA ≤ 125°C, unless otherwise noted.

LT1112AMJ8 LT1112MJ8
LT1114AMJ LT1114MJ
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
VOUT Output Voltage Swing RL = 10kΩ ● ±13.0 ±13.85 ±13.0 ±13.85 V
SR Slew Rate ● 0.12 0.22 0.12 0.22 V/µs
IS Supply Current per Amplifier ● 380 460 380 530 µA
∆VOS Offset Voltage Match (Note 5) ● 55 200 70 240 µV
Offset Voltage Match Drift (Notes 5, 8) ● 0.2 0.7 0.3 1.0 µV/°C
∆IB+ Noninverting Bias Current Match (Notes 5, 6) ● 150 750 170 850 pA
∆CMRR Common-Mode Rejection Ratio (Notes 5, 7) ● 112 130 106 130 dB
∆PSRR Power Supply Rejection Ratio (Notes 5, 7) ● 109 126 106 126 dB

ELECTRICAL CHARACTERISTICS VS = ±15V, 0°C ≤ TA ≤ 70°C, unless otherwise noted.

LT1112ACN8 LT1112N8/S8
LT1114ACN LT1114CN/S
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
VOS Input Offset Voltage LT1112N8 ● 27 100 30 125 µV
LT1112S8, LT1114N/S ● 35 125 45 150 µV
VS = ±1.2V ● 50 175 65 210 µV
∆VOS Average Input Offset Voltage Drift LT1112N8 ● 0.15 0.5 0.2 0.75 µV/°C
∆Temp (Note 8) LT1112S8, LT1114N/S ● 0.3 1.1 0.4 1.3 µV/°C
IOS Input Offset Current ● 60 220 70 290 pA
LT1114S ● 90 420 pA
IB Input Bias Current ● ±80 ±300 ±90 ±350 pA
LT1114S ● ±115 ±550 pA
VCM Input Voltage Range ● ±13.5 ±14.2 ±13.5 ±14.2 V
CMRR Common-Mode Rejection Ratio VCM = ±13.5V ● 118 133 113 133 dB
PSRR Power Supply Rejection Ratio VS = ±1.2V to ±20V ● 114 125 112 125 dB
AVOL Large-Signal Voltage Gain VO = ±12V, RL = 10kΩ ● 800 4000 650 4000 V/mV
VO = ±10V, RL = 2kΩ ● 500 1300 400 1000 V/mV
VOUT Output Voltage Swing RL = 10kΩ ● ±13.0 ±13.9 ±13.0 ±13.9 V
SR Slew Rate ● 0.14 0.27 0.14 0.27 V/µs
IS Supply Current per Amplifier ● 370 440 370 500 µA
∆VOS Offset Voltage Match LT1112N8 ● 45 170 55 210 µV
(Note 5) LT1112S8, LT1114N/S ● 55 220 70 270 µV
Offset Voltage Match Drift LT1112N8 ● 0.2 0.7 0.3 1.0 µV/°C
(Notes 5, 8) LT1112S8, LT1114N/S ● 0.4 1.6 0.5 1.9 µV/°C
∆IB+ Noninverting Bias Current Match ● 120 530 135 620 pA
(Notes 5, 6) LT1114S ● 160 880 pA
∆CMRR Common-Mode Rejection Ratio (Notes 5, 7) ● 114 134 109 134 dB
∆PSRR Power Supply Rejection Ratio (Notes 5, 7) ● 110 128 108 128 dB

4
LT1112/LT1114

ELECTRICAL CHARACTERISTICS VS = ±15V, – 40°C ≤ TA ≤ 85°C, (Note 10)


LT1112ACN8 LT1112N8/S8
LT1114ACN LT1114CN/S
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
VOS Input Offset Voltage LT1112N8 ● 30 110 35 135 µV
LT1112S8, LT1114N/S ● 40 135 45 160 µV
VS = ±1.2V ● 55 200 60 240 µV
∆VOS Average Input Offset Voltage Drift LT1112N8 ● 0.15 0.50 0.20 0.75 µV/°C
∆Temp LT1112S8, LT1114N/S ● 0.30 1.10 0.40 1.30 µV/°C
IOS Input Offset Current ● 70 330 85 400 pA
LT1114S ● 110 600 pA
IB Input Bias Current ● ±110 ±500 ±120 ±550 pA
LT1114S ● ±150 ±800 pA
VCM Input Voltage Range ● ±13.5 ±14.1 ±13.5 ±14.1 V
CMRR Common-Mode Rejection Ratio VCM = ±13.5V ● 117 132 112 132 dB
PSRR Power Supply Rejection Ratio VS = ±1.2V to ±20V ● 113 125 111 125 dB
AVOL Large-Signal Voltage Gain VO = ±12V, RL = 10kΩ ● 700 3300 600 3300 V/mV
VO = ±10V, RL = 2kΩ ● 400 1100 300 900 V/mV
VOUT Output Voltage Swing RL = 10kΩ ● ±13.0 ±13.85 ±13.0 ±13.85 V
SR Slew Rate ● 0.13 0.24 0.13 0.24 V/µs
IS Supply Current per Amplifier ● 370 450 370 510 µA
∆VOS Offset Voltage Match LT1112N8 ● 50 180 60 225 µV
(Note 5) LT1112S8, LT1114N/S ● 60 230 70 270 µV
Offset Voltage Match Drift LT1112N8 ● 0.2 0.7 0.3 1.0 µV/°C
(Notes 5) LT1112S8, LT1114N/S ● 0.4 1.6 0.5 1.9 µV/°C
∆IB+ Noninverting Bias Current Match ● 140 660 155 770 pA
(Notes 5, 6) LT1114S ● 190 1300 pA
∆CMRR Common-Mode Rejection Ratio (Notes 5, 7) ● 113 133 109 133 dB
∆PSRR Power Supply Rejection Ratio (Notes 5, 7) ● 110 127 107 127 dB

The ● denotes specifications which apply over the operating temperature Note 6: This parameter is the difference between two noninverting
range. input bias currents.
Note 1: Differential input voltages greater than 1V will cause excessive Note 7: ∆CMRR and ∆PSRR are defined as follows: (1) CMRR and
current to flow through the input protection diodes unless limiting PSRR are measured in µV/V on the individual amplifiers. (2) The
resistance is used. difference is calculated between the matching sides in µV/V. (3) The
Note 2: Typical parameters are defined as the 60% yield of parameter result is converted to dB.
distributions of individual amplifiers; i.e., out of 100 LT1114s (or 100 Note 8: This parameter is not 100% tested.
LT1112s) typically 240 op amps (or 120) will be better than the indicated Note 9: These parameters are not tested. More than 99% of the op
specification. amps tested during product characterization have passed the
Note 3: This parameter is guaranteed by design and is not tested. maximum limits. 100% passed at 1kHz.
Note 4: Offset voltage, supply current and power supply rejection ratio are Note 10: The LT1112/LT1114 are not tested and are not quality
measured at the minimum supply voltage. assurance sampled at – 40°C and at 85°C. These specifications are
Note 5: Matching parameters are the difference between amplifiers A and guaranteed by design, correlation and/or inference from – 55°C, 0°C,
D and between B and C on the LT1114; between the two amplifiers on the 25°C, 70°C and/or 125°C tests.
LT1112.

5
LT1112/LT1114
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Input Bias and Offset Current,
Noninverting Bias Current Match Input Bias Current Over Distribution of Input Bias Current
vs Temperature Common-Mode Range (In All Packages Except LT1114S)
200 150 30
INPUT BIAS, OFFSET, MATCH CURRENT (pA)

VS = ±15V VS = ±15V
TA = 25°C TA = 25°C
100
∆IB+ RINCM = 800GΩ

INPUT BIAS CURRENT (pA)


100

PERCENT OF UNITS
IOS 50 20
DEVICE WITH POSITIVE INPUT CURRENT

0 IB (UNDERCANCELLED) 0 DEVICE WITH NEGATIVE INPUT CURRENT

–50 – 10
IB (OVERCANCELLED)
–100
IB +
–100
VCM
VS = ±15V
–200 –150 0
–75 –50 –25 0 25 50 75 100 125 –15 –10 –5 0 5 10 15 –300 –200 –100 0 100 200 300
TEMPERATURE (°C) COMMON-MODE INPUT VOLTAGE (V) INPUT BIAS CURRENT (pA)
LT1112/14 • TPC01 LT1112/14 • TPC02 LT1112/14 • TPC03

Drift with Temperature Drift with Temperature Distribution of Offset Voltage at


LT1112N8/J8, LT1114J LT1112S8, LT1114N/S VS = ±1.0V (In All Packages)
20 25 30
850 OP AMPS TESTED VS = ±15V 960 OP AMPS TESTED VS = ±15V TA = 25°C
100 LT1112J8 240 LT1112S8
165 LT1112N8 80 LT1114N 25
20
15 80 LT1114J 40 LT1114S
PERCENT OF INPUTS

PERCENT OF UNITS

PERCENT OF UNITS
20
15

10 15
10
10
5
5
5

0 0 0
–0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 –1.4 –1.0 –0.6 –0.2 0.2 0.6 1.0 1.4 –80 –60 –40 –20 0 20 40 60 80 100
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) INPUT OFFSET VOLTAGE (µV)
LT1112/14 • TPC04 LT1112/14 • TPC05 LT1112/14 • TPC06

Distribution of Offset Voltage Distribution of Offset Voltage


Distribution of Offset Match Drift (LT1112J8, LT1112N8, Match Drift (LT1112S8, LT1114N,
Voltage Match LT1114J Packages) LT1114S Packages)
25 30 20
VS = ±15V VS = ±15V VS = ±15V
TA = 25°C 342 PAIRS TESTED 364 PAIRS TESTED
25
20
15
PERCENT ON UNITS

PERCENT OF UNITS
PERCENT OF UNITS

20
15
15 10

10
10
5
5 5

0 0 0
–100 –80 –60 – 40 –20 0 20 40 60 80 100 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 –1.6 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6
∆VOS, OFFSET VOLTAGE MATCH (µV) OFFSET VOLTAGE MATCH DRIFT (µV/°C) OFFSET VOLTAGE MATCH DRIFT (µV/°C)
LT1112/14 • TPC07 LT1112/14 • TPC08 LT1112/14 • TPC09

6
LT1112/LT1114
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Noise Spectrum 0.1Hz to 10Hz Noise 0.01Hz to 1Hz Noise
1000
VS = ±1V TO ±20V VS = ±15V VS = ±15V
TA = 25°C TA = 25°C TA = 25°C
VOLTAGE NOISE DENSITY (nV/√Hz)
CURRENT NOISE DENSITY (fA/√Hz)

NOISE VOLTAGE (0.2µV/DIV)

NOISE VOLTAGE (0.2µV/DIV)


100
CURRENT NOISE

VOLTAGE NOISE
10
1/fCORNER
2.5Hz
1/fCORNER
140Hz

1
1 10 100 1000 0 2 4 6 8 10 0 20 40 60 80 100
FREQUENCY (Hz) TIME (SEC) TIME (SEC)
LT1112/14 • TPC10
LT1112/14 • TPC11 LT1112/14 • TPC12

Long Term Stability of Three Supply Current per Amplifier


Warm-Up Drift Representative Units vs Supply Voltage
3 6 600
VS = ±15V VS = ±15V

SUPPLY CURRENT PER AMPLIFIER (µA)


TA = 25°C TA = 25°C 2A
CHANGE IN OFFSET VOLTAGE (µV)
CHANGE IN OFFSET VOLTAGE (µV)

4
500
2 3A
2

LT1112S8, LT1114N/S PACKAGES 2B


0 400
1A TA = 125°C

1 LT1114J PACKAGE –2 3B
TA = 25°C
LT1112J8, N8 PACKAGES 1B 300
–4 TA = –55°C

0 –6 200
0 0.5 1.0 1.5 2.0 2.5 0 1 2 3 4 5 6 0 ±5 ±10 ±15 ±20
TIME AFTER POWER ON (MINUTES) TIME (MONTHS) SUPPLY VOLTAGE (V)
LT1112/14 • TPC13 LT1112/14 • TPC14 LT1112/14 • TPC15

Minimum Supply Voltage vs Temp Common-Mode Range and


Voltage Gain at Minimum Supply Voltage Swing with Respect to Output Voltage Swing
Voltage Supply Voltages vs Load Current
MINIMUM SUPPLY (V)

±1.2 V+ V+
COMMON-MODE RANGE OR OUTPUT SWING (V)

VS = ±1V TO ±20V
±1.1 V + – 0.2 IL < 100µA
V+ – 1
±1.0 V + – 0.4 VS = ±1V TO ± 20V
SWING TA = 25°C
±0.9 V + – 0.6 V+ – 2
OUTPUT SWING (V)

MAX IL AT ±1V = 1.3mA


V + – 0.8 AT ±1.5V = 3mA
CM RANGE V+ – 3
100 V + – 1.0
VOLTAGE GAIN (V/mV)

80 V – + 0.8 V– + 3
SWING
60 V – + 0.6 V– + 2
CM RANGE
40 V – + 0.4
V– + 1
V – + 0.2
V– V–
–50 –25 0 25 50 75 100 125 –75 –25 25 75 125 –9 –6 –3 0 3
6 9
TEMPERATURE (°C) TEMPERATURE (°C) SINK SOURCE
OUTPUT CURRENT (mA)
LT1112/14 • TPC16 LT1112/14 • TPC17 LT1112/14 • TPC18

7
LT1112/LT1114
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Voltage Gain Voltage Gain vs Frequency Gain, Phase Shift vs Frequency
–15 140 40 100
VS = ±15V VS = ±15V VS = ±15V
TA = 25°C 120 TA = 25°C TA = 25°C
CHANGE IN OFFSET VOLTAGE (µV)

–10
30 120
100

VOLTAGE GAIN (dB)

PHASE SHIFT (DEG)


–5 PHASE
80 20 140

GAIN (dB)
RL = 10k
0 60 GAIN

RL = 2k 10 160
40
5
20
0 180
10 PHASE MARGIN = 70°C
0

15 –20 –10 200


–15 –10 –5 0 5 10 15 0.01 0.1 1 10 100 1k 10k 100k 1M 10M 0.01 0.1 1 10
OUTPUT VOLTAGE (V) FREQUENCY (Hz) FREQUENCY (MHz)
LT1112/14 • TPC21
LT1112/14 • TPC19 LT1112/14 • TPC20

Common-Mode Rejection Power Supply Rejection


vs Frequency vs Frequency Channel Separation vs Frequency
140 140 160
VS = ±15V VS = ±15V VS = ±15V
COMMON-MODE REJECTION RATIO (dB)

POWER SUPPLY REJECTION RATIO (dB)

TA = 25°C TA = 25°C TA = 25°C


120 120

CHANNEL SEPARATION (dB)


NEGATIVE 140
100 SUPPLY
100

80 120
80
60 POSITIVE
SUPPLY
60 100
40 AMP 1 IN UNITY-GAIN
20VP-P, RL = 2k
20 40
80 AMP 2 IN GAIN = 1000
RS = 100Ω, RF = 100k
0 20
1 10 100 1k 10k 100k 1M 0.1 1 10 100 1k 10k 100k 1M 1 10 100 1k 10k 100k 1M
FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz)
LT1112/14 • TPC22 LT1112/14 • TPC23 LT1112/14 • TPC24

Slew Rate, Gain-Bandwidth


Product and Phase Margin
vs Temperature Closed-Loop Output Impedance Capacitive Loading Handling
0.4 1000 120
GAIN-BANDWIDTH PRODUCT (kHz) SLEW RATE (V/µs)

VS = ±15V VS = ±15V
TA = 25°C TA = 25°C
SLEW 100 100
0.3
OUTPUT IMPEDANCE (Ω)
PHASE MARGIN (DEG)

80
10 80
OVERSHOOT (%)

0.2
φm AV = 100 AV = +1
70 1 60
800 AV = +1
0.1 40
60
GBW AV = 10
700
0.01 20

600 0.001 0
–50 –25 0 25 50 75 100 125 1 10 100 1k 10k 100k 1M 0.00001 0.0001 0.001 0.01 0.1 1 10
TEMPERATURE (°C) FREQUENCY (Hz) CAPACITIVE LOAD (µF)
LT1112/14 • TPC25 LT1112/14 • TPC26 LT1112/14 • TPC27

8
LT1112/LT1114
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Undistorted Output Voltage
Small-Signal Transient Response Large-Signal Transient Response vs Frequency
28
TA = 25°C

PEAK-TO-PEAK OUTPUT VOLTAGE (V)


24 RL = 10k
VS = ±15V
20
20mV/DIV

5V/DIV
16

12

8
VS = ±5V
4

2µs/DIV 50µs/DIV
0
AV = +1 AV = +1 1 10 100 1000
CL = 500pF RF = 10k
VS = ±15V CF = 100pF FREQUENCY (kHz)
VS = ±15V LT1112/14 • TPC30

UO U W U
APPLICATI S I FOR ATIO
The LT1112 dual and LT1114 quad in the plastic and the input is driven by a fast large-signal pulse (>1V), the
ceramic DIP packages are pin compatible to and directly input protection diodes effectively short the output to the
replace such precision op amps as the OP-200, OP-297, input during slewing, and a current, limited only by the
AD706 duals and OP-400, OP-497, AD704 quads with output short-circuit protection, will flow through the
improved price/performance. diodes.
The LT1112 in the S8 surface mount package has the The use of a feedback resistor is recommended because
standard pin configuration, i.e., the same configuration as this resistor keeps the current below the short-circuit limit,
the plastic and ceramic DIP packages. resulting in faster recovery and settling of the output.
The LT1114 quad is offered in the narrow 16-pin surface The input voltage of the LT1112/1114 should never exceed
mount package. All competitors are in the wide 16-pin the supply voltages by more than a diode drop. However,
package which occupies 1.8 times the area of the narrow the example below shows that as the input voltage exceeds
package. The wide package is also 1.8 times thicker than the common-mode range, the LT1112’s output clips
the narrow package. cleanly, without any glitches or phase reversal. The OP-
297 exhibits phase reversal. The photos also illustrate that
The inputs of the LT1112/1114 are protected with back-to-
both the input and output ranges of the LT1112 are within
back diodes. In the voltage follower configuration, when
Voltage Follower with Input Exceeding the Common-Mode Range (VS = ±5V)

INPUT: ±5.2V Sine Wave LT1112 Output OP-297 Output

9
LT1112/LT1114
UO U W U
APPLICATI S I FOR ATIO
800mV of the supplies. The effect of input and output Input offset current = 100pA
overdrive on the other amplifiers in the LT1112 or Input resistance = 800GΩ
LT1114 packages is negligible, as each amplifier is Input noise = 0.42µVP-P
biased independently.
Three Op Amp Instrumentation Amplifier
Advantages of Matched Dual and Quad Op Amps
R4 R6
In many applications the performance of a system de- IN– + 100Ω 10k
1/2 LT1112 0.5% 0.5%
pends on the matching between two operational amplifi- OR
1/4 LT1114 R1
ers rather than the individual characteristics of the two op – A 10k
1%
amps. Two or three op amp instrumentation amplifiers,
R3 –
tracking voltage references and low drift active filters are 2.1k
R10 LT1097 OR
some of the circuits requiring matching between two op 1%
C1 1M 1/4LT1114 OUTPUT
+B OR C
amps. R8 33pF
200Ω
The well-known triple op amp configuration illustrates R2 R5
– GAIN = 1000
these concepts. Output offset is a function of the differ- 10k 100Ω
TRIM R8 FOR GAIN
1/2 LT1112 1% 0.5%
ence between the offsets of the two halves of the LT1112. OR TRIM R9 FOR DC

This error cancellation principle holds for a considerable + LT1114


1/4 R7 COMMON-MODE REJECTION
IN+ D 9.88k TRIM R10 FOR AC
0.5%
number of input referred parameters in addition to offset COMMON-MODE REJECTION

voltage and its drift with temperature. Input bias current R9


200Ω
will be the average of the two noninverting input currents LT1112/14 • AI02

(IB+). The difference between these two currents (∆IB+) is


the offset current of the instrumentation amplifier. Com- When the instrumentation amplifier is used with high
mon-mode and power supply rejections will be dependent impedance sources, the LT1114 is recommended be-
only on the match between the two amplifiers (assuming cause its CMRR vs frequency performance is better than
perfect resistor matching). the LT1112’s. For example, with two matched 1MΩ source
resistors, CMRR at 100Hz is 100dB with the LT1114, 76dB
The concepts of common-mode and power supply rejec-
with the LT1112.
tion ratio match (∆CMRR and ∆PSRR) are best demon-
strated with a numerical example: This difference is explained by the fact that capacitance
between adjacent pins on an IC package is about 0.25pF
Assume CMRRA = + 1µV/V or 120dB,
(including package, socket and PC board trace capaci-
and CMRRB = + 0.75µV/V or 122.5dB,
tances).
then ∆CMRR = 0.25µV/V or 132dB;
if CMRRB = – 0.75µV/V which is still 122.5dB, On the dual op amp package, positive input A is next to the
then ∆CMRR = 1.75µV/V or 115dB. V – pin (AC ground), while positive input B has no AC
ground pin adjacent to it, resulting in a 0.25pF input
Clearly the LT1112/LT1114, by specifying and guarantee-
capacitance mismatch. At 100Hz, 0.25pF represents a
ing all of these matching parameters, can significantly 6.4 × 109 input impedance mismatch, which is only 76dB
improve the performance of matching-dependent
higher than the 1MΩ source resistors.
circuits.
On the quad package, all four inputs are adjacent to a
Typical performance of the instrumentation amplifier: power supply terminal–therefore, there is no mismatch.
Input offset voltage = 35µV
Offset voltage drift = 0.3µV/°C
Input bias current = 80pA

10
LT1112/LT1114
UO
TYPICAL APPLICATI
Dual Buffered ±0.617V Reference Powered by Two AA Batteries

+1.5V
RX*
15k
*OPTIONAL
+
1/2 LT1112 +0.617V

20k
LT1004-1.2 0.1% TOTAL SUPPLY CURRENT = 700µA
100pF WORKS WITH BATTERIES DISCHARGED
TO ±1.3V
AT ±1.5V: MAXIMUM LOAD CURRENT = 800µA;
– CAN BE INCREASED WITH OPTIONAL RX, RY;
AT RX = RY = 750Ω LOAD CURRENT = 2mA
1/2 LT1112 TEMPERATURE COEFFICIENT LIMITED BY
+ REFERENCE = 20ppm/°C
RY* 20k
0.1%
*OPTIONAL
–1.5V
–0.617V LT1112/14 • TA03

W W
SCHE ATIC DIAGRA (1/2 LT1112, 1/4 LT1114)
V+

20µA
12pF 30k 30k
35µA
Q35 Q34 80µA

Q19
Q22
800Ω 30pF
4k 1.5k

Q33
Q21
Q6
Q5 Q25 Q27
S Q29
Q8
Q4 Q24
28Ω
Q7
3k 90Ω OUT
Q13
INVERTING Q11 Q23 2.5k 30Ω
INPUT S S
S Q20
– Q1 Q2 Q28
Q26
Q3 50k 1.5k J1
Q32
Q9
Q12 Q16
10k
NONINVERTING Q18 Q30
Q10
INPUT Q17
+ 460Ω
Q31
15µA

5µA Q14 Q15

5µA 200Ω 200Ω


V– 460Ω 460Ω

Q1 TO Q4 ARE SUPERGAIN TRANSISTORS LT1112/14 • SD01

11
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of circuits as described herein will not infringe on existing patent rights.
LT1112/LT1114
U
PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.
0.405
(10.287)
0.200 0.005 MAX
0.290 – 0.320
(5.080) (0.127)
(7.366 – 8.128) MAX MIN
8 7 6 5

J8 Package 0.015 – 0.060


(0.381 – 1.524)
8-Lead Ceramic DIP 0.025
(0.635)
0.220 – 0.310
(5.588 – 7.874)
RAD TYP
0.008 – 0.018
0° – 15°
(0.203 – 0.460)
1 2 3 4
0.385 ± 0.025 0.038 – 0.068 0.055
0.125
(9.779 ± 0.635) (0.965 – 1.727) (1.397)
3.175 MAX
0.014 – 0.026 0.100 ± 0.010 MIN
(0.360 – 0.660) (2.540 ± 0.254)

0.400
(10.160)
0.300 – 0.320 0.045 – 0.065 0.130 ± 0.005 MAX
(7.620 – 8.128) (1.143 – 1.651) (3.302 ± 0.127)
8 7 6 5
N8 Package
8-Lead Plastic DIP 0.065
0.250 ± 0.010
(1.651)
0.009 – 0.015 TYP (6.350 ± 0.254)
(0.229 – 0.381) 0.125
(3.175) 0.020
+0.025 0.045 ± 0.015 MIN (0.508) 1 2 3 4
0.325 –0.015

( )
(1.143 ± 0.381) MIN
+0.635
8.255
–0.381 0.100 ± 0.010 0.018 ± 0.003
(2.540 ± 0.254) (0.457 ± 0.076)

0.189 – 0.197
(4.801 – 5.004)
0.010 – 0.020
× 45° 0.053 – 0.069 8 7 6 5
(0.254 – 0.508)
(1.346 – 1.752)
S8 Package 0.008 – 0.010 0.004 – 0.010
(0.101 – 0.254)
(0.203 – 0.254)
8-Lead Plastic SOIC 0.228 – 0.244 0.150 – 0.157
0.016 – 0.050 (5.791 – 6.197) (3.810 – 3.988)
0°– 8° TYP 0.014 – 0.019 0.050
0.406 – 1.270
(0.355 – 0.483) (1.270)
BSC

1 2 3 4

0.785
0.005 (19.939)
0.200
0.290 – 0.320 MAX
(5.080) (0.127)
(7.366 – 8.128) MIN
MAX 14 13 12 11 10 9 8

J Package 0.015 – 0.060

14-Lead Ceramic DIP (0.381 – 1.524) 0.025


(0.635)
0.220 – 0.310
(5.588 – 7.874)
RAD TYP
0.008 – 0.018
0° – 15°
(0.203 – 0.460)
1 2 3 4 5 6 7
0.385 ± 0.025 0.098
0.038 – 0.068 0.100 ± 0.010 0.125 (2.489)
(9.779 ± 0.635)
(0.965 – 1.727) (2.540 ± 0.254) (3.175) MAX
0.014 – 0.026 MIN
(0.360 – 0.660)

0.065 0.770
(1.651) (19.558)
0.300 – 0.325 0.045 – 0.065 TYP MAX
(7.620 – 8.255) 0.015 (1.143 – 1.651)
14 13 12 11 10 9 8
(0.380)
N Package MIN 0.130 ± 0.005

14-Lead Plastic DIP (3.302 ± 0.127)


0.260 ± 0.010
(6.604 ± 0.254)
0.009 – 0.015
(0.229 – 0.381)

+0.025 1 2 3 4 5 6 7
0.325 –0.015

( )
0.075 ± 0.015 0.018 ± 0.003 0.125
+0.635 (1.905 ± 0.381) (0.457 ± 0.076) (3.175)
8.255
–0.381 MIN
0.100 ± 0.010
(2.540 ± 0.254)

0.386 – 0.394
(9.804 – 10.008)
0.010 – 0.020
× 45° 0.053 – 0.069 0.004 – 0.010 16 15 14 13 12 11 10 9
(0.254 – 0.508)
(1.346 – 1.752) (0.101 – 0.254)
S Package 0.008 – 0.010
16-Lead Plastic SOIC (0.203 – 0.254)

0.228 – 0.244 0.150 – 0.157


(5.791 – 6.197) (3.810 – 3.988)
0° – 8° 0.014 – 0.019 0.050
TYP 0.016 – 0.050 (0.355 – 0.483) (1.270)
0.406 – 1.270 TYP

1 2 3 4 5 6 7 8

LT/GP 1292 10K REV 0


Linear Technology Corporation
12 1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977  LINEAR TECHNOLOGY CORPORATION 1992

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