D Escriptio S Feature: LT1112/LT1114 Dual/Quad Low Power Precision, Picoamp Input Op Amps
D Escriptio S Feature: LT1112/LT1114 Dual/Quad Low Power Precision, Picoamp Input Op Amps
SINKS 0.5mA 20
2 – 8
TEMPERATURE COEFFICIENT LIMITED
1 BY REFERENCE = 20ppm/°C 15
1/2 LT1112 2.000V
3 + MINIMUM SUPPLY = 2.7V
75k 10
0.1% LT1004-1.2
5
6 –
7 0
1/2 LT1112 0.765V –70 –50 –30 –10 10 30 50 70
5 + INPUT OFFSET VOLTAGE (µV)
4
46.4k LT1112/14 • TA02
0.1%
LT1112/14 • TA01
1
LT1112/LT1114
W W W U
ABSOLUTE AXI U RATI GS
Supply Voltage ..................................................... ±20V Operating Temperature Range
Differential Input Current (Note 1) ..................... ±10mA LT1112AM/LT1112M
Input Voltage (Equal to Supply Voltage) ............... ±20V LT1114AM/LT1114M ...................... – 55°C to 125°C
Output Short-Circuit Duration ......................... Indefinite LT1112AC/LT1112C/LT1112S8
Storage Temperature Range ................ – 65°C to 150°C LT1114AC/LT1114C/LT1114S .......... – 40°C to 85°C
Lead Temperature (Soldering, 10 sec)................ 300°C
U W U
PACKAGE/ORDER I FOR ATIO
TOP VIEW TOP VIEW
ORDER PART ORDER PART
OUT A 1 8 V +
NUMBER OUT A 1 8 V+ NUMBER
–IN A 2 7 OUT B –IN A 2 7 OUT B
A A
+IN A 3 6 –IN B LT1112AMJ8 +IN A 3 6 –IN B LT1112S8
B B
V– 4 5 +IN B LT1112MJ8 V– 4 5 +IN B
LT1112ACN8
J8 PACKAGE
8-LEAD CERAMIC DIP
N8 PACKAGE
8-LEAD PLASTIC DIP LT1112CN8
S8 PACKAGE
8-LEAD PLASTIC SO
PART MARKING
TJMAX = 160°C, θJA = 100°C/W (J8) TJMAX = 140°C, θJA = 190°C/W 1112
TJMAX = 140°C, θJA = 130°C/W (N8)
TOP VIEW
ORDER PART
TOP VIEW ORDER PART
OUT A 1 14 OUT D
NUMBER OUT A 1 16 OUT D NUMBER
–IN A 2 13 –IN D –IN A 2 15 –IN D
3
A D
LT1114AMJ +IN A 3
A D
14 +IN D
LT1114S
+IN A 12 +IN D
V+ 4 11 V – LT1114MJ V+ 4 13 V –
+IN B 5
B
10 +IN C LT1114ACN +IN B 5
B C
12 +IN C
C
–IN B 6 9 –IN C LT1114CN –IN B 6 11 –IN C
OUT B 7 8 OUT C OUT B 7 10 OUT C
NC 8 9 NC
J PACKAGE N PACKAGE
14-LEAD CERAMIC DIP 14-LEAD PLASTIC DIP
S PACKAGE
TJMAX = 160°C, θJA = 80°C/W (J) 16-LEAD PLASTIC SO (NARROW)
TJMAX = 140°C, θJA = 110°C/W (N) TJMAX = 140°C, θJA = 150°C/W
LT1112AM/AC LT1112M/C/S8
LT1114AM/AC LT1114M/C/S
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
VOS Input Offset Voltage 20 60 25 75 µV
VS = ±1.0V 40 110 45 130 µV
∆VOS Long Term Input Offset 0.3 0.3 µV/Mo
∆Time Voltage Stability
IOS Input Offset Current 50 180 60 230 pA
LT1114S 75 330 pA
IB Input Bias Current ±70 ±250 ±80 ±280 pA
LT1114S ±100 ±450 pA
en Input Noise Voltage 0.1Hz to 10Hz (Note 9) 0.3 0.9 0.3 0.9 µVP-P
2
LT1112/LT1114
LT1112AM/AC LT1112M/C/S8
LT1114AM/AC LT1114M/C/S
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
Input Noise Voltage Density fO = 10Hz (Note 9) 16 28 16 28 nV/√Hz
fO = 1000Hz (Note 9) 14 18 14 18 nV/√Hz
in Input Noise Current 0.1Hz to 10Hz 2.2 2.2 pAP-P
Input Noise Current Density fO = 10Hz 0.030 0.030 pA/√Hz
fO = 1000Hz 0.008 0.008 pA/√Hz
VCM Input Voltage Range ±13.5 ±14.3 ±13.5 ±14.3 V
CMRR Common-Mode Rejection Ratio VCM = ±13.5V 120 136 115 136 dB
PSRR Power Supply Rejection Ratio VS = ±1.0V to ±20V 116 126 114 126 dB
Minimum Supply Voltage (Note 4) ±1.0 ±1.0 V
RIN Input Resistance
Differential Mode (Note 3) 20 50 15 40 MΩ
Common Mode 800 700 GΩ
AVOL Large-Signal Voltage Gain VO = ±12V, RL = 10kΩ 1000 5000 800 5000 V/mV
VO = ±10V, RL = 2kΩ 800 1500 600 1300 V/mV
VOUT Output Voltage Swing RL = 10kΩ ±13.0 ±14.0 ±13.0 ±14.0 V
RL = 2kΩ ±11.0 ±12.4 ±11.0 ±12.4 V
SR Slew Rate 0.16 0.30 0.16 0.30 V/µs
GBW Gain-Bandwidth Product fO = 10kHz 450 750 450 750 kHz
IS Supply Current per Amplifier 350 400 350 450 µA
VS = ±1.0V 320 370 320 420 µA
Channel Separation fO = 10Hz 150 150 dB
∆VOS Offset Voltage Match (Note 5) 35 100 40 130 µV
∆IB + Noninverting Bias Current Match 100 450 100 500 pA
(Notes 5, 6) LT1114S 120 680 pA
∆CMRR Common-Mode Rejection Match (Notes 5, 7) 117 136 113 136 dB
∆PSRR Power Supply Rejection Match (Notes 5, 7) 114 130 112 130 dB
LT1112AMJ8 LT1112MJ8
LT1114AMJ LT1114MJ
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
VOS Input Offset Voltage ● 35 120 45 150 µV
VS = ±1.2V ● 60 220 70 260 µV
∆VOS Average Input Offset Voltage Drift (Note 8) ● 0.15 0.5 0.20 0.75 µV/°C
∆Temp
IOS Input Offset Current ● 80 400 100 500 pA
IB Input Bias Current ● ±150 ±600 ±170 ±700 pA
VCM Input Voltage Range ● ±13.5 ±14.1 ±13.5 ±14.1 V
CMRR Common-Mode Rejection Ratio VCM = ±13.5V ● 116 130 111 130 dB
PSRR Power Supply Rejection Ratio VS = ±1.2V to ±20V ● 112 124 110 124 dB
AVOL Large-Signal Voltage Gain VO = ±12V, RL = 10kΩ ● 500 2500 400 2500 V/mV
VO = ±10V, RL = 2kΩ ● 200 600 170 500 V/mV
3
LT1112/LT1114
LT1112AMJ8 LT1112MJ8
LT1114AMJ LT1114MJ
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
VOUT Output Voltage Swing RL = 10kΩ ● ±13.0 ±13.85 ±13.0 ±13.85 V
SR Slew Rate ● 0.12 0.22 0.12 0.22 V/µs
IS Supply Current per Amplifier ● 380 460 380 530 µA
∆VOS Offset Voltage Match (Note 5) ● 55 200 70 240 µV
Offset Voltage Match Drift (Notes 5, 8) ● 0.2 0.7 0.3 1.0 µV/°C
∆IB+ Noninverting Bias Current Match (Notes 5, 6) ● 150 750 170 850 pA
∆CMRR Common-Mode Rejection Ratio (Notes 5, 7) ● 112 130 106 130 dB
∆PSRR Power Supply Rejection Ratio (Notes 5, 7) ● 109 126 106 126 dB
LT1112ACN8 LT1112N8/S8
LT1114ACN LT1114CN/S
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
VOS Input Offset Voltage LT1112N8 ● 27 100 30 125 µV
LT1112S8, LT1114N/S ● 35 125 45 150 µV
VS = ±1.2V ● 50 175 65 210 µV
∆VOS Average Input Offset Voltage Drift LT1112N8 ● 0.15 0.5 0.2 0.75 µV/°C
∆Temp (Note 8) LT1112S8, LT1114N/S ● 0.3 1.1 0.4 1.3 µV/°C
IOS Input Offset Current ● 60 220 70 290 pA
LT1114S ● 90 420 pA
IB Input Bias Current ● ±80 ±300 ±90 ±350 pA
LT1114S ● ±115 ±550 pA
VCM Input Voltage Range ● ±13.5 ±14.2 ±13.5 ±14.2 V
CMRR Common-Mode Rejection Ratio VCM = ±13.5V ● 118 133 113 133 dB
PSRR Power Supply Rejection Ratio VS = ±1.2V to ±20V ● 114 125 112 125 dB
AVOL Large-Signal Voltage Gain VO = ±12V, RL = 10kΩ ● 800 4000 650 4000 V/mV
VO = ±10V, RL = 2kΩ ● 500 1300 400 1000 V/mV
VOUT Output Voltage Swing RL = 10kΩ ● ±13.0 ±13.9 ±13.0 ±13.9 V
SR Slew Rate ● 0.14 0.27 0.14 0.27 V/µs
IS Supply Current per Amplifier ● 370 440 370 500 µA
∆VOS Offset Voltage Match LT1112N8 ● 45 170 55 210 µV
(Note 5) LT1112S8, LT1114N/S ● 55 220 70 270 µV
Offset Voltage Match Drift LT1112N8 ● 0.2 0.7 0.3 1.0 µV/°C
(Notes 5, 8) LT1112S8, LT1114N/S ● 0.4 1.6 0.5 1.9 µV/°C
∆IB+ Noninverting Bias Current Match ● 120 530 135 620 pA
(Notes 5, 6) LT1114S ● 160 880 pA
∆CMRR Common-Mode Rejection Ratio (Notes 5, 7) ● 114 134 109 134 dB
∆PSRR Power Supply Rejection Ratio (Notes 5, 7) ● 110 128 108 128 dB
4
LT1112/LT1114
The ● denotes specifications which apply over the operating temperature Note 6: This parameter is the difference between two noninverting
range. input bias currents.
Note 1: Differential input voltages greater than 1V will cause excessive Note 7: ∆CMRR and ∆PSRR are defined as follows: (1) CMRR and
current to flow through the input protection diodes unless limiting PSRR are measured in µV/V on the individual amplifiers. (2) The
resistance is used. difference is calculated between the matching sides in µV/V. (3) The
Note 2: Typical parameters are defined as the 60% yield of parameter result is converted to dB.
distributions of individual amplifiers; i.e., out of 100 LT1114s (or 100 Note 8: This parameter is not 100% tested.
LT1112s) typically 240 op amps (or 120) will be better than the indicated Note 9: These parameters are not tested. More than 99% of the op
specification. amps tested during product characterization have passed the
Note 3: This parameter is guaranteed by design and is not tested. maximum limits. 100% passed at 1kHz.
Note 4: Offset voltage, supply current and power supply rejection ratio are Note 10: The LT1112/LT1114 are not tested and are not quality
measured at the minimum supply voltage. assurance sampled at – 40°C and at 85°C. These specifications are
Note 5: Matching parameters are the difference between amplifiers A and guaranteed by design, correlation and/or inference from – 55°C, 0°C,
D and between B and C on the LT1114; between the two amplifiers on the 25°C, 70°C and/or 125°C tests.
LT1112.
5
LT1112/LT1114
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Input Bias and Offset Current,
Noninverting Bias Current Match Input Bias Current Over Distribution of Input Bias Current
vs Temperature Common-Mode Range (In All Packages Except LT1114S)
200 150 30
INPUT BIAS, OFFSET, MATCH CURRENT (pA)
VS = ±15V VS = ±15V
TA = 25°C TA = 25°C
100
∆IB+ RINCM = 800GΩ
PERCENT OF UNITS
IOS 50 20
DEVICE WITH POSITIVE INPUT CURRENT
–50 – 10
IB (OVERCANCELLED)
–100
IB +
–100
VCM
VS = ±15V
–200 –150 0
–75 –50 –25 0 25 50 75 100 125 –15 –10 –5 0 5 10 15 –300 –200 –100 0 100 200 300
TEMPERATURE (°C) COMMON-MODE INPUT VOLTAGE (V) INPUT BIAS CURRENT (pA)
LT1112/14 • TPC01 LT1112/14 • TPC02 LT1112/14 • TPC03
PERCENT OF UNITS
PERCENT OF UNITS
20
15
10 15
10
10
5
5
5
0 0 0
–0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 –1.4 –1.0 –0.6 –0.2 0.2 0.6 1.0 1.4 –80 –60 –40 –20 0 20 40 60 80 100
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) INPUT OFFSET VOLTAGE (µV)
LT1112/14 • TPC04 LT1112/14 • TPC05 LT1112/14 • TPC06
PERCENT OF UNITS
PERCENT OF UNITS
20
15
15 10
10
10
5
5 5
0 0 0
–100 –80 –60 – 40 –20 0 20 40 60 80 100 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 –1.6 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6
∆VOS, OFFSET VOLTAGE MATCH (µV) OFFSET VOLTAGE MATCH DRIFT (µV/°C) OFFSET VOLTAGE MATCH DRIFT (µV/°C)
LT1112/14 • TPC07 LT1112/14 • TPC08 LT1112/14 • TPC09
6
LT1112/LT1114
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Noise Spectrum 0.1Hz to 10Hz Noise 0.01Hz to 1Hz Noise
1000
VS = ±1V TO ±20V VS = ±15V VS = ±15V
TA = 25°C TA = 25°C TA = 25°C
VOLTAGE NOISE DENSITY (nV/√Hz)
CURRENT NOISE DENSITY (fA/√Hz)
VOLTAGE NOISE
10
1/fCORNER
2.5Hz
1/fCORNER
140Hz
1
1 10 100 1000 0 2 4 6 8 10 0 20 40 60 80 100
FREQUENCY (Hz) TIME (SEC) TIME (SEC)
LT1112/14 • TPC10
LT1112/14 • TPC11 LT1112/14 • TPC12
4
500
2 3A
2
1 LT1114J PACKAGE –2 3B
TA = 25°C
LT1112J8, N8 PACKAGES 1B 300
–4 TA = –55°C
0 –6 200
0 0.5 1.0 1.5 2.0 2.5 0 1 2 3 4 5 6 0 ±5 ±10 ±15 ±20
TIME AFTER POWER ON (MINUTES) TIME (MONTHS) SUPPLY VOLTAGE (V)
LT1112/14 • TPC13 LT1112/14 • TPC14 LT1112/14 • TPC15
±1.2 V+ V+
COMMON-MODE RANGE OR OUTPUT SWING (V)
VS = ±1V TO ±20V
±1.1 V + – 0.2 IL < 100µA
V+ – 1
±1.0 V + – 0.4 VS = ±1V TO ± 20V
SWING TA = 25°C
±0.9 V + – 0.6 V+ – 2
OUTPUT SWING (V)
80 V – + 0.8 V– + 3
SWING
60 V – + 0.6 V– + 2
CM RANGE
40 V – + 0.4
V– + 1
V – + 0.2
V– V–
–50 –25 0 25 50 75 100 125 –75 –25 25 75 125 –9 –6 –3 0 3
6 9
TEMPERATURE (°C) TEMPERATURE (°C) SINK SOURCE
OUTPUT CURRENT (mA)
LT1112/14 • TPC16 LT1112/14 • TPC17 LT1112/14 • TPC18
7
LT1112/LT1114
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Voltage Gain Voltage Gain vs Frequency Gain, Phase Shift vs Frequency
–15 140 40 100
VS = ±15V VS = ±15V VS = ±15V
TA = 25°C 120 TA = 25°C TA = 25°C
CHANGE IN OFFSET VOLTAGE (µV)
–10
30 120
100
GAIN (dB)
RL = 10k
0 60 GAIN
RL = 2k 10 160
40
5
20
0 180
10 PHASE MARGIN = 70°C
0
80 120
80
60 POSITIVE
SUPPLY
60 100
40 AMP 1 IN UNITY-GAIN
20VP-P, RL = 2k
20 40
80 AMP 2 IN GAIN = 1000
RS = 100Ω, RF = 100k
0 20
1 10 100 1k 10k 100k 1M 0.1 1 10 100 1k 10k 100k 1M 1 10 100 1k 10k 100k 1M
FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz)
LT1112/14 • TPC22 LT1112/14 • TPC23 LT1112/14 • TPC24
VS = ±15V VS = ±15V
TA = 25°C TA = 25°C
SLEW 100 100
0.3
OUTPUT IMPEDANCE (Ω)
PHASE MARGIN (DEG)
80
10 80
OVERSHOOT (%)
0.2
φm AV = 100 AV = +1
70 1 60
800 AV = +1
0.1 40
60
GBW AV = 10
700
0.01 20
600 0.001 0
–50 –25 0 25 50 75 100 125 1 10 100 1k 10k 100k 1M 0.00001 0.0001 0.001 0.01 0.1 1 10
TEMPERATURE (°C) FREQUENCY (Hz) CAPACITIVE LOAD (µF)
LT1112/14 • TPC25 LT1112/14 • TPC26 LT1112/14 • TPC27
8
LT1112/LT1114
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Undistorted Output Voltage
Small-Signal Transient Response Large-Signal Transient Response vs Frequency
28
TA = 25°C
5V/DIV
16
12
8
VS = ±5V
4
2µs/DIV 50µs/DIV
0
AV = +1 AV = +1 1 10 100 1000
CL = 500pF RF = 10k
VS = ±15V CF = 100pF FREQUENCY (kHz)
VS = ±15V LT1112/14 • TPC30
UO U W U
APPLICATI S I FOR ATIO
The LT1112 dual and LT1114 quad in the plastic and the input is driven by a fast large-signal pulse (>1V), the
ceramic DIP packages are pin compatible to and directly input protection diodes effectively short the output to the
replace such precision op amps as the OP-200, OP-297, input during slewing, and a current, limited only by the
AD706 duals and OP-400, OP-497, AD704 quads with output short-circuit protection, will flow through the
improved price/performance. diodes.
The LT1112 in the S8 surface mount package has the The use of a feedback resistor is recommended because
standard pin configuration, i.e., the same configuration as this resistor keeps the current below the short-circuit limit,
the plastic and ceramic DIP packages. resulting in faster recovery and settling of the output.
The LT1114 quad is offered in the narrow 16-pin surface The input voltage of the LT1112/1114 should never exceed
mount package. All competitors are in the wide 16-pin the supply voltages by more than a diode drop. However,
package which occupies 1.8 times the area of the narrow the example below shows that as the input voltage exceeds
package. The wide package is also 1.8 times thicker than the common-mode range, the LT1112’s output clips
the narrow package. cleanly, without any glitches or phase reversal. The OP-
297 exhibits phase reversal. The photos also illustrate that
The inputs of the LT1112/1114 are protected with back-to-
both the input and output ranges of the LT1112 are within
back diodes. In the voltage follower configuration, when
Voltage Follower with Input Exceeding the Common-Mode Range (VS = ±5V)
9
LT1112/LT1114
UO U W U
APPLICATI S I FOR ATIO
800mV of the supplies. The effect of input and output Input offset current = 100pA
overdrive on the other amplifiers in the LT1112 or Input resistance = 800GΩ
LT1114 packages is negligible, as each amplifier is Input noise = 0.42µVP-P
biased independently.
Three Op Amp Instrumentation Amplifier
Advantages of Matched Dual and Quad Op Amps
R4 R6
In many applications the performance of a system de- IN– + 100Ω 10k
1/2 LT1112 0.5% 0.5%
pends on the matching between two operational amplifi- OR
1/4 LT1114 R1
ers rather than the individual characteristics of the two op – A 10k
1%
amps. Two or three op amp instrumentation amplifiers,
R3 –
tracking voltage references and low drift active filters are 2.1k
R10 LT1097 OR
some of the circuits requiring matching between two op 1%
C1 1M 1/4LT1114 OUTPUT
+B OR C
amps. R8 33pF
200Ω
The well-known triple op amp configuration illustrates R2 R5
– GAIN = 1000
these concepts. Output offset is a function of the differ- 10k 100Ω
TRIM R8 FOR GAIN
1/2 LT1112 1% 0.5%
ence between the offsets of the two halves of the LT1112. OR TRIM R9 FOR DC
10
LT1112/LT1114
UO
TYPICAL APPLICATI
Dual Buffered ±0.617V Reference Powered by Two AA Batteries
+1.5V
RX*
15k
*OPTIONAL
+
1/2 LT1112 +0.617V
20k
LT1004-1.2 0.1% TOTAL SUPPLY CURRENT = 700µA
100pF WORKS WITH BATTERIES DISCHARGED
TO ±1.3V
AT ±1.5V: MAXIMUM LOAD CURRENT = 800µA;
– CAN BE INCREASED WITH OPTIONAL RX, RY;
AT RX = RY = 750Ω LOAD CURRENT = 2mA
1/2 LT1112 TEMPERATURE COEFFICIENT LIMITED BY
+ REFERENCE = 20ppm/°C
RY* 20k
0.1%
*OPTIONAL
–1.5V
–0.617V LT1112/14 • TA03
W W
SCHE ATIC DIAGRA (1/2 LT1112, 1/4 LT1114)
V+
20µA
12pF 30k 30k
35µA
Q35 Q34 80µA
Q19
Q22
800Ω 30pF
4k 1.5k
Q33
Q21
Q6
Q5 Q25 Q27
S Q29
Q8
Q4 Q24
28Ω
Q7
3k 90Ω OUT
Q13
INVERTING Q11 Q23 2.5k 30Ω
INPUT S S
S Q20
– Q1 Q2 Q28
Q26
Q3 50k 1.5k J1
Q32
Q9
Q12 Q16
10k
NONINVERTING Q18 Q30
Q10
INPUT Q17
+ 460Ω
Q31
15µA
11
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of circuits as described herein will not infringe on existing patent rights.
LT1112/LT1114
U
PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.
0.405
(10.287)
0.200 0.005 MAX
0.290 – 0.320
(5.080) (0.127)
(7.366 – 8.128) MAX MIN
8 7 6 5
0.400
(10.160)
0.300 – 0.320 0.045 – 0.065 0.130 ± 0.005 MAX
(7.620 – 8.128) (1.143 – 1.651) (3.302 ± 0.127)
8 7 6 5
N8 Package
8-Lead Plastic DIP 0.065
0.250 ± 0.010
(1.651)
0.009 – 0.015 TYP (6.350 ± 0.254)
(0.229 – 0.381) 0.125
(3.175) 0.020
+0.025 0.045 ± 0.015 MIN (0.508) 1 2 3 4
0.325 –0.015
( )
(1.143 ± 0.381) MIN
+0.635
8.255
–0.381 0.100 ± 0.010 0.018 ± 0.003
(2.540 ± 0.254) (0.457 ± 0.076)
0.189 – 0.197
(4.801 – 5.004)
0.010 – 0.020
× 45° 0.053 – 0.069 8 7 6 5
(0.254 – 0.508)
(1.346 – 1.752)
S8 Package 0.008 – 0.010 0.004 – 0.010
(0.101 – 0.254)
(0.203 – 0.254)
8-Lead Plastic SOIC 0.228 – 0.244 0.150 – 0.157
0.016 – 0.050 (5.791 – 6.197) (3.810 – 3.988)
0°– 8° TYP 0.014 – 0.019 0.050
0.406 – 1.270
(0.355 – 0.483) (1.270)
BSC
1 2 3 4
0.785
0.005 (19.939)
0.200
0.290 – 0.320 MAX
(5.080) (0.127)
(7.366 – 8.128) MIN
MAX 14 13 12 11 10 9 8
0.065 0.770
(1.651) (19.558)
0.300 – 0.325 0.045 – 0.065 TYP MAX
(7.620 – 8.255) 0.015 (1.143 – 1.651)
14 13 12 11 10 9 8
(0.380)
N Package MIN 0.130 ± 0.005
+0.025 1 2 3 4 5 6 7
0.325 –0.015
( )
0.075 ± 0.015 0.018 ± 0.003 0.125
+0.635 (1.905 ± 0.381) (0.457 ± 0.076) (3.175)
8.255
–0.381 MIN
0.100 ± 0.010
(2.540 ± 0.254)
0.386 – 0.394
(9.804 – 10.008)
0.010 – 0.020
× 45° 0.053 – 0.069 0.004 – 0.010 16 15 14 13 12 11 10 9
(0.254 – 0.508)
(1.346 – 1.752) (0.101 – 0.254)
S Package 0.008 – 0.010
16-Lead Plastic SOIC (0.203 – 0.254)
1 2 3 4 5 6 7 8