Unit-5:
Logic Families
1. INTRODUCTION
Logic gates are available in the form of Integrated circuit(
IC’s)
As per the level of integration, IC’s can accommodate more
number of logic gates and digital functions.
These forms are referred as logic family.
2.CLASSIFICATION OF LOGIC FAMILIES
3. IMPORTANT POINTS
The digital familiy is categorized by two types
(i) Bipolar and (ii) Unipolar
In Saturated Bipolar logic families, Transistor in the IC driven in
to saturation.
In Non Saturated Bipolar logic families, Transistor in the
IC not driven in to saturation.
In PMOS & NMOS Unipolar logic family only P & N channel
MOSFETs are used.
CMOS Unipolar logic family both P & N- channel
MOSFETs are used.
Logic Families
OBSOLETE ONES:
1.Diode Logic.
2.Diode Transistor Logic (DTL).
3.Resistor Transistor Logic (RTL).
CURRENT ONES:
1.TTL (Transistor Transistor Logic)
2. ECL (Emitter Coupled Logic)
3.CMOS (Complementary Metal Oxide Semiconductor)
5
4. LEVEL OF INTEGRATION
Number of gates fabricated in single IC
There are 4 generation
Small Scale Integration (SSI) = 3-30 gates in 1 Chip ( around 10
-100 transistor)
Medium Scale Integration (MSI) = 30 to 300 gates
Large Scale Integration(LSI)= 300 to 3000 gates
Very Large Scale Integration(VLSI)= more than 3000 gates (
20000- 50000 transistor)
Ultra Large Scale Integration- 50,000 to billions of transistors
are fabricated on a single chip
SSI- These ICs are used to make flip-flops and logic gate ICs.
MSI- Used to make multiplexers, decoders, counters, and
registers.
LSI- Used to make RAM, ROM, and microprocessors.
VLSI- Used to design digital signal processors (DSP), RISC
processors, 16-bit and 32-bit microprocessors and
microcontrollers.
ULSI- Mainly used for designing 64-bit and higher
microprocessors and controllers.
Characteristics of digital logic family
Propagation delay
• It is an important characteristic of the digital logic
family.
• It is the time interval between the application of the
input pulse and the occurrence of the output.
• If the propagation delay is less, then the speed at
which the IC operates will be faster.
Fan in and Fan out
Fan-in refers to the number of inputs in a digital logic gate family.
The EX-OR gate has three inputs. So fan-in for the given EX-OR
gate is 3.
Fan-out refers to the number of inputs that is driven by the output of another
logic gates.
For example, the following circuit has an EX-OR gate, which
drives 4 NOT gates. So fan-out of EX-OR gate is 4.
Power dissipation
• It is the amount of power that digital circuit dissipates.
• The power dissipated is determined by the average current, that is
drawn from the supply voltage.
The average current is the average value of the current at LOW
gate output (logic ‘o’) and the current at HIGH gate output(logic ‘1’).
TRANSISTOR –TRANSISTOR LOGIC (TTL)
CIRCUIT
TTL is an integrated circuit that performs a logic function to
provide a switching function by using bipolar transistors.
High Speed(tp= 10 ns)
Low power dissipation
Fan – In from 12 -14
Fan out equals to 10 or more
TTL NAND GATES
The multi emitter transistor T1 is used to drive the output of T2
Inputs are given in Emitter of T1& output is taken from Collector
of T2.
OPERATION
If one of the input is ‘0’(LOW), the corresponding Emitter juction is forward
biased (VE< VB) So T1 is in Saturation region (ON) & collector also biased
to conduct but the voltage is low(0.3V) , this forces T2 OFF. Because the
collector voltage of T1 is Base voltage of T2. So the output taken from the
collector of T2 is HIGH ie “1”
If both the input is HIGH then both emitter reverse bias so T1 is in CutOff
(OFF) region , this increases collector voltage of T1 that Pulls T2 to Saturation
(ON) thus the output is LOW(0)
EMITTER T1 T2 COLLECTOR
INPUT OUTPUT
0,0 SATURATION OFF HIGH= 1
0,1 ON HIGH= 1
1,0 HIGH= 1
1,1 CUT OFF SATURATION LOW = 0
OFF ON
MOS/ CMOS CIRCUIT
Metal Oxide Semiconductor(MOS) field effect transistor. There
are 3 types
P MOS- P- Channel MOSFET – slowest
N MOS – N Channel MOSFET – Microprocessor & Memories
C MOS (Complementary MOS) – both N& P Channel
ADVANTAGES:
LOW POWER DISSIPATION
LOW NOISE
HIGH FAN OUT
HIGH SWITCHING SPEED
BETTER COMPATIBILITY
TTL vs CMOS
MOS as a Switch
CMOS
CMOS Inverter
CMOS NAND GATE
CMOS NAND GATE OPERATION
T1 & T2 are p-channel MOSFET
T3 & T4 are n-channel MOSFET
If inputs are high ‘1’ then p-channel MOSFET (T1 & T2 – OFF), n-channel
MOSFET (T3& T4 – ON), so the output is low.
CMOS NAND GATE OPERATION
If any one of the input is high then the pmos transistor is OFF & its
Combinational nmosTransistor is On.
For Eg: INPUT T1 T2 T3 T4 OUTPUT
0,0 ON ON OFF OFF 1/HIGH
0,1 ON OFF ON OFF 1/HIGH
1,0 OFF ON OFF ON 1/HIGH
1,1 OFF OFF ON ON 0/ LOW
CMOS as a NOR Gate
COMPARISON OF TTL and CMOS LOGIC FAMILY
MCQ
