Finite State Machines

Hakim Weatherspoon
CS 3410
Computer Science
Cornell University

[Weatherspoon, Bala, Bracy, McKee, and Sirer]

Stateful Components
Combinationial logic
• Output computed directly from inputs
• System has no internal state
• Nothing depends on the past!

Inputs Combinational
circuit Outputs
N M
Need:
• To record data
• To build stateful circuits
• A state-holding device

Sequential Logic & Finite State Machines

2
Goals for Today
• Finite State Machines (FSM)
• How do we design logic circuits with state?
• Types of FSMs: Mealy and Moore Machines
• Examples: Serial Adder and a Digital Door Lock

3
Next Goal
• How do we design logic circuits with state?

4
Finite State Machines

5
Finite State Machines
An electronic machine which has
• external inputs
• externally visible outputs
• internal state

Output and next state depend on

• inputs
• current state

6
Abstract Model of FSM
Machine is
M = (S, I, O, δ )
S: Finite set of states
I: Finite set of inputs
O: Finite set of outputs
δ: State transition function

Next state depends on present input and

present state

7
Automata Model
Finite State Machine
Current

Registers
State Comb.
Output
Logic
Input Next State

• inputs from external world

• outputs to external world
• internal state
• combinational logic

8
FSM Example
down/on
input/output up/off down/on
A B
state start
state

Legend up/off up/off

up/off
C D
down/off
Input: up or down down/off
Output: on or off
States: A, B, C, or D

9
FSM Example
1/1
i0i1i2…/o0o1o2… 0/0 1/1
00 01
S1S0 S1S0

Legend 0/0 0/0

0/1
10 11
1/0
Input: 0=up or 1=down 1/0
Output: 1=on or 0=off
States: 00=A, 01=B, 10=C, or 11=D

10
Mealy Machine
General Case: Mealy Machine
Current

Registers
State Comb.
Output
Logic
Input Next State

Outputs and next state depend on both

current state and input

11
Moore Machine
Special Case: Moore Machine
Current

Registers
Comb. Output
State Logic

Comb.
Input Logic Next State

Outputs depend only on current state

12
Moore Machine FSM Example
down
input up down
A B
state start
off on
out out

Legend up up
up
C D
off off
down
Input: up or down down
Output: on or off
States: A, B, C, or D

13
Mealy Machine FSM Example
down/on
input/output up/off down/on
A B
state start
state

Legend up/off up/off

up/off
C D
down/off
Input: up or down down/off
Output: on or off
States: A, B, C, or D

14
Activity#2: Create a Logic Circuit for a Serial Adder

Add two infinite input bit streams

• streams are sent with least-significant-bit (lsb) first

…10110 Sum: output

…00101
…01111

15
Activity#2: Create a Logic Circuit for a Serial Adder

Add two infinite input bit streams

• streams are sent with least-significant-bit (lsb) first

Carry-out
1
…10110 Sum: output
…00101
…01111

16
Activity#2: Create a Logic Circuit for a Serial Adder

Add two infinite input bit streams

• streams are sent with least-significant-bit (lsb) first

Carry-in
1
…10110 Sum: output
…00101
…01111

17
Activity#2: Create a Logic Circuit for a Serial Adder

Add two infinite input bit streams

• streams are sent with least-significant-bit (lsb) first

Carry-out
11
…10110 Sum: output
…00101
…01111

18
iClicker Question
Add two infinite input bit streams
• streams are sent with least-significant-bit (lsb) first

…10110
…00101
…01111
How many states are needed to represent FSM
a) 0
b) 1
c) 2
d) 3
e) 4 19
Strategy for Building an FSM
(1) Draw a state diagram (e.g. Mealy Machine)
(2) Write output and next-state tables
(3) Encode states, inputs, and outputs as bits
(4) Determine logic equations for next state
and outputs
(5) Draw the Circuit

20
FSM: State Diagram

…10110
…00101
…01111

2 states ___ and ___

Inputs: ___ and ___
Output: ___
21
 FSM: State Diagram

a…10110
…00101 z
b …01111

Two states: S0 (no carry in), S1 (carry in)

Inputs: a and b
Output: z
• z is the sum of inputs a, b, and carry-in (one bit at a time)
• A carry-out is the next carry-in state. 22
 FSM: State Diagram
__/_

__/_ S0 S1 __/_
__/_

__/_ __/_ __/_ __/_

a…10110
…00101 z
b …01111

Two states: S0 (no carry in), S1 (carry in)

Inputs: a and b
Output: z
• z is the sum of inputs a, b, and carry-in (one bit at a time)
• A carry-out is the next carry-in state.
• Arcs labeled with input bits a and b, and output z 23
 FSM: State Diagram
11/0

00/0 S0 S1 11/1
00/1

10/1 01/1 10/0 01/0

a…10110
…00101 z
b …01111

Two states: S0 (no carry in), S1 (carry in)

Inputs: a and b
Output: z
• z is the sum of inputs a, b, and carry-in (one bit at a time)
• A carry-out is the next carry-in state.
• Arcs labeled with input bits a and b, and output z 24
iClicker Question
11/0

00/0 S0 S1 11/1
00/1

10/1 01/1 10/0 01/0

Is this a Moore or Mealy Machine?

a) Moore
b) Mealy
c) Cannot be determined

25
iClicker Question
11/0

00/0 S0 S1 11/1
00/1

10/1 01/1 10/0 01/0

Is this a Moore or Mealy Machine?

a) Moore
b) Mealy
c) Cannot be determined

26
Serial Adder: State Table
11/0

00/0 S0 S1 11/1
00/1

10/1 01/1 10/0 01/0

a b Current z Next
state state

(2) Write down all input and

state combinations

27
Serial Adder: State Table
11/0

00/0 S0 S1 11/1
00/1

10/1 01/1 10/0 01/0

a b Current z Next
state state
0 0 S0 0 S0
(2) Write down all input and
0 1 S0 1 S0
1 0 S0 1 S0
state combinations
1 1 S0 0 S1
0 0 S1 1 S0
0 1 S1 0 S1
1 0 S1 0 S1
1 1 S1 1 S1 28
Serial Adder: State Assignment
11/0

00/0 S0 S1 11/1
00/1

10/1 01/1 10/0 01/0

a b s z s'
0 0 0 0 0 (3) Encode states, inputs, and
0 1 0 1 0
outputs as bits
1 0 0 1 0
1 1 0 0 1
0 0 1 1 0
Two states, so 1-bit is sufficient
0 1 1 0 1
• A single flip-flop will encode the
1 0 1 0 1
state
1 1 1 1 1 29
Serial Adder: Circuit
Next Current
Output
State State
z
s' s
D Q
a
b Next State
Input s'

a b s z s'
0 0 0 0 0 (4) Determine logic equations for
0 1 0 1 0 next state and outputs
1 0 0 1 0
1 1 0 0 1 Combinational Logic Equations
0 0 1 1 0
0 1 1 0 1
z = a�b�s + abs + abs + abs
� + abs
s’ = ab�s + a� bs + abs
1 0 1 0 1
1 1 1 1 1 30
Serial Adder: Circuit
Next Current
Output
State State
z
s' s Comb.
D Q
Logic
a
b Next State
Input s'

a b s z s'
0 0 0 0 0 (4) Determine logic equations
0 1 0 1 0 for next state and outputs
1 0 0 1 0
1 1 0 0 1 Combinational Logic
0 0 1 1 0 Equations
z = a�bs̅ + abs + abs + abs
0 1 1 0 1 � + abs
s’ = abs̅ + a�bs + abs
1 0 1 0 1
1 1 1 1 1 31
Sequential Logic Circuits
Next Current
Output
State State
z
s' s Comb.
D Q
Logic
a
b Next State
Input s'

z = a�bs̅ + abs + abs + abs

� + abs
s’ = abs̅ + a�bs + abs
Strategy:
(1) Draw a state diagram (e.g. Mealy Machine)
(2) Write output and next-state tables
(3) Encode states, inputs, and outputs as bits
(4) Determine logic equations for next state and outputs
32
Which statement(s) is true
(A) In a Moore Machine output depends on
both current state and input
(B) In a Mealy Machine output depends on
both current state and input
(C) In a Mealy Machine output depends on
next state and input
(D) All the above are true
(E) None are true

33
Which statement(s) is true
(A) In a Moore Machine output depends on
both current state and input
(B) In a Mealy Machine output depends on
both current state and input
(C) In a Mealy Machine output depends on
next state and input
(D) All the above are true
(E) None are true

34
Mealy Machine
General Case: Mealy Machine
Current

Registers
State Comb.
Output
Logic
Input Next State

Outputs and next state depend on both

current state and input

35
Moore Machine
Special Case: Moore Machine
Current

Registers
Comb. Output
State Logic

Comb.
Input Logic Next State

Outputs depend only on current state

36
Example: Digital Door Lock
Digital Door Lock
Inputs:
• keycodes from keypad
• clock
Outputs:
• “unlock” signal
• display how many keys pressed so
far

37
Door Lock: Inputs
Assumptions:
• signals are synchronized to
clock
• Password is B-A-B
K A B Meaning
K 0 0 0 Ø (no key)
A 1 1 0 ‘A’ pressed
B 1 0 1 ‘B’ pressed

38
 Door Lock: Outputs
Assumptions:
• High pulse on U unlocks door

4 LED 8
D3D2D1D0 dec
U

Strategy:
(1) Draw a state diagram (e.g. Moore Machine)
(2) Write output and next-state tables
(3) Encode states, inputs, and outputs as bits
(4) Determine logic equations for next state and outputs
39
Door Lock: Simplified State Diagram

(1) Draw a state diagram (e.g. Moore Machine) 40

Door Lock: Simplified State Diagram
Ø Ø
G1 “A” G2 “B” G3
”1” ”2” ”3”, U

“B” else else any

Idle
”0”

Ø else any
B1 else B2 else B3
”1” ”2” ”3”

Ø Ø
(1) Draw a state diagram (e.g. Moore Machine) 41
Door Lock: Simplified State Diagram
Ø Ø
G1 “A” G2 “B” G3
”1” ”2” ”3”, U

“B” else else any

Idle
”0”
else
Ø else
B1 else B2
”1” ”2”

Ø Ø
(1) Draw a state diagram (e.g. Moore Machine) 42
Door Lock: Simplified State Diagram
Ø Ø
G1 “A” G2 “B” G3
”1” ”2” ”3”, U

“B” else else any

Cur.
Output
State
Idle Idle “0”
”0”
G1 “1”
else
Ø else G2 “2”
B1 B2
G3 “3”, U
else
”1” ”2” B1 “1”
B2 “2”
Ø Ø
(2) Write output and next-state tables 43
Door Lock: Simplified State Diagram
Cur.
Ø Ø State
Input Next State

G1 “A” G2Idle “B” Ø G3 Idle

”1” ”2”Idle ”3”, U
“B” G1
Idle “A” B1
“B” else else any G1
G1 Ø
G1 “A” G2
G1 “B” B2
Idle
”0” G2 Ø G2
else G2 “B” G3
Ø else G2 “A” Idle
B1 else B2 G3 any Idle
”1” ”2” B1 Ø B1
B1 K B2
Ø ØB2 Ø B2
(2) Write output and next-stateB2 tables K Idle
44
State Table Encoding
S
Cur.
2 SState
1 S0 D3 DOutput
2 D1 D0 U S2Cur.
S1 S0 K Input
A B S’2 S’State
Next 1 S’0
0 Idle
0 0 0 0 “0”
0 0 0 0State
0 0 0 0 0 0 0 0
Idle Ø Idle
0 G1 0 1 0 0 “1”
0 1 0 0 0 0 1 0 1 0 0 1
Idle “B” G1
0 G2 1 0 0 0 “2”
1 0 0 0 0 0 1 1 0 1 0 0
Idle “A” B1
0 G3 1 1 0 0“3”,
1 U1 1 0 0 1 0 0 0 0 0 1
G1 Ø G1
1 B1 0 0 0 0 “1”
0 1 0 0 0 1 1 1 0 0 1 0
G1 “A” G2
1 B2 0 1 0 0 “2”
1 0 0 0 0 1 1 0 1 1 0 1
G1 “B” B2
0 1 0 0 0 0 0 1 0
State 4 SMeaning
2 S8
1 S0 G2 Ø B2
D3D2D1D0K A B dec 0 1 0 1 0 1 0 1 1
Idle
0U 0 0 0Ø (no
0 key)
0 G2
0 1 0 1
“B”
1 0 0 0 0
G3
G1 G2 “A” Idle
1 1 0 0‘A’ pressed
0 1
K
0 1 1 x
G3
x
any
x 0 0 0
Idle
G2 1 0 0 0 0 0 1 0 0
1 0 1 0‘B’ pressed
1 0
A B1 Ø B1
1 0 0 1 x x 1 0 1
G3 0 1B 1 B1 K B2
1 0 1 0 0 0 1 0 1
B1 1 0 0 B2
1 0 1 1
Ø
x x 0 0 0
B2
(3) Encode
B2 states,
1 0 inputs,
1 B2
and outputs K
as bits Idle
45
 Door Lock: Implementation
4

dec
D3-0
3bit S2-0
Reg U

clk
S2-0
K S’2-0 S2 S1 S0 D3 D2 D1 D0 U
A 0 0 0 0 0 0 0 0
B 0 0 1 0 0 0 1 0
0 1 0 0 0 1 0 0
U = S�2S1S0 0 1 1 0 0 1 1 1

D0 = S2S1S0 + S�2S1S0 + S2 S1S0 1 0 0 0 0 0 1 0

D1 = S�2S1S0 + S�2S1S0 + S�2S1S0

1 0 1 0 0 1 0 0

(4) Determine logic equations for next state and outputs 46

Door Lock: Implementation
S2 S1 S0 K A B S’2 S’1 S’0
4

dec
D03-0 0 0 0 0 0 0 0 0
3bit S2-0 0 0 0 1 0 1 0 0 1
Reg U
0 0 0 1 1 0 1 0 0
0 0 1 0 0 0 0 0 1
clk
0 0 1 1 1 0 0 1 0
S2-0 0 0 1 1 0 1 1 0 1
K 0S’2-0
1 0 0 0 0 0 1 0
A 0 1 0 1 0 1 0 1 1
B 0 1 0 1 1 0 0 0 0
0 1 1 x x x 0 0 0
1 0 0 0 0 0 1 0 0
1 0 0 1 x x 1 0 1
1 0 1 0 0 0 1 0 1
S0’ = ? 1 0 1 1 x x 0 0 0
S1’ = ?
S2’ = S2S1S0KAB �B + S2S1S2KAB + S�2S1S0K + S2 S�1S0 KAB
� + S2S1S0KA 47
Door Lock: Implementation
4

dec
D3-0
3bit S2-0
Reg U

clk
S2-0
K S’2-0
A
B
Strategy:
(1) Draw a state diagram (e.g. Moore Machine)
(2) Write output and next-state tables
(3) Encode states, inputs, and outputs as bits
(4) Determine logic equations for next state and outputs48
Door Lock: Implementation
Current

Registers
Comb. Output
State Logic

Comb.
Input Logic Next State

Strategy:
(1) Draw a state diagram (e.g. Moore Machine)
(2) Write output and next-state tables
(3) Encode states, inputs, and outputs as bits
(4) Determine logic equations for next state and outputs49
Summary
We can now build interesting devices with
sensors
• Using combinational logic

We can also store data values

• Stateful circuit elements (D Flip Flops, Registers, …)
• State Machines or Ad-Hoc Circuits

50