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HCF4007UB MOSFET Datasheet Overview

The HCF4007UB is an integrated circuit containing three n-channel and three p-channel enhancement type MOS transistors. It provides a dual complementary pair plus inverter. It is available in DIP and SOP packages and operates with medium speed, with a typical propagation delay of 30ns at 10V. It has standardized symmetrical output characteristics and has quiescent current specified up to 20V supply voltage.

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0% found this document useful (0 votes)
419 views9 pages

HCF4007UB MOSFET Datasheet Overview

The HCF4007UB is an integrated circuit containing three n-channel and three p-channel enhancement type MOS transistors. It provides a dual complementary pair plus inverter. It is available in DIP and SOP packages and operates with medium speed, with a typical propagation delay of 30ns at 10V. It has standardized symmetrical output characteristics and has quiescent current specified up to 20V supply voltage.

Uploaded by

Charlie Davids
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

HCF4007UB

DUAL COMPLEMENTARY PAIR PLUS INVERTER

■ STANDARDIZED SYMMETRICAL OUTPUT


CHARACTERISTICS
■ MEDIUM SPEED OPERATION
tPD = 30ns (Typ.) AT 10V
■ QUIESCENT CURRENT SPECIFIED UP TO
20V
( s )
ct
■ 5V, 10V AND 15V PARAMETRIC RATINGS DIP SOP
■ INPUT LEAKAGE CURRENT
II = 100nA (MAX) AT VDD = 18V TA = 25°C
d u
■ 100% TESTED FOR QUIESCENT CURRENT ORDER CODES
r o
DESCRIPTION
PACKAGE

e P TUBE T&R

The HCF4007UB is a monolithic integrated circuit


fabricated in Metal Oxide Semiconductor
DIP
SOP
l e tHCF4007UBEY
HCF4007UBM1 HCF4007UM013TR
technology available in DIP and SOP packages.
The HCF4007UB type is comprised of three
s o
n-channel and three p-channel enhancement type
MOS transistors. The transistor elements are
O b
applications. More complex functions are possible
using multiple packages. Number shown in
parentheses indicate terminals that are connected

) -
accessible through the package terminals to together to form the various configuration listed.

(s
provide a convenient means for constructing the

t
various typical circuits as shown in typical

c
d u
r o
e P
l e t
s o
O b
PIN CONNECTION

March 2004 1/9


HCF4007UB

INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION

PIN N° SYMBOL NAME AND FUNCTION


Source Connections to
2, 11 SP2, SP3 2nd and 3rd p-channel
transistors
Drain Connections from
13, 1 DP1, DP2 the 1st and 2nd p-channel
transistors
Drain Connections from
8, 5 DN1, DN2 the 1st and 2nd n-channel
transistors
Source Connections to
4, 9 SN2, SN3
)
the 2nd and 3rd n-channel

( s
ct
Common connection to
DN/P3 the 3rd p-channel and
12
LOGIC DIAGRAM
d u
n-channel transistor
drains

r oGate connections to
n-channel and p-channel
6, 3, 10

e P
G1 to G3
of the three transistor
pairs
7
l e t VSS Negative Supply Voltage

s o
14 VDD Positive Supply Voltage

ABSOLUTE MAXIMUM RATINGS


O b
Symbol
)
Parameter - Value Unit
VDD
VI
Supply Voltage
DC Input Voltage
c t (s -0.5 to +22
-0.5 to VDD + 0.5
V
V
II DC Input Current
d u ± 10 mA
PD
r o
Power Dissipation per Package 200 mW

Top P
Power Dissipation per Output Transistor
Operating Temperature
e
100
-55 to +125
mW
°C
Tstg

l e t
Storage Temperature -65 to +150 °C

s
not implied.
o
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is

O b
All voltage values are referred to VSS pin voltage.

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Value Unit


VDD Supply Voltage 3 to 20 V
VI Input Voltage 0 to VDD V
Top Operating Temperature -55 to 125 °C

2/9
HCF4007UB

DC SPECIFICATIONS

Test Condition Value

Symbol Parameter TA = 25°C -40 to 85°C -55 to 125°C Unit


VI VO |IO| VDD
(V) (V) (µA) (V) Min. Typ. Max. Min. Max. Min. Max.
IL Quiescent Current 0/5 5 0.01 0.25 7.5 7.5
0/10 10 0.01 0.5 15 15
µA
0/15 15 0.01 1 30 30
0/20 20 0.02 5 150 150
VOH High Level Output 0/5 <1 5 4.95 4.95 4.95
Voltage 0/10 <1 10 9.95 9.95 9.95 V
0/15 <1 15 14.95 14.95 14.95

( s )
ct
VOL Low Level Output 5/0 <1 5 0.05 0.05 0.05
Voltage 10/0 <1 10 0.05 0.05 0.05 V
15/0 <1 15 0.05
d
0.05
u 0.05
VIH High Level Input 0.5/4.5 <1 5 4 4
o 4

Pr
Voltage 1/9 <1 10 8 8 8 V
1.5/13.5 <1 15 12.5 12.5 12.5
VIL Low Level Input 4.5/0.5 <1 5

e t e
1 1 1
Voltage 9/1
13.5/1.5
<1
<1
10
15
o l 2
2.5
2
2.5
2
2.5
V

IOH Output Drive


Current
0/5 2.5 <1 5
b s
-1.36 -3.2 -1.15 -1.1

-O
0/5 4.6 <1 5 -0.44 -1 -0.36 -0.36
mA
0/10 9.5 <1 10 -1.1 -2.6 -0.9 -0.9

IOL Output Sink


0/15
0/5
13.5
0.4
( s ) <1
<1
15
5
-3.0
0.44
-6.8
1
-2.4
0.36
-2.4
0.36

ct
Current 0/10 0.5 <1 10 1.1 2.6 0.9 0.9 mA

II Input Leakage
d u
0/15 1.5 <1 15 3.0 6.8 2.4 2.4

Current
r o 0/18 Any Input 18 ±10-5 ±0.1 ±1 ±1 µA

CI

e P
Input Capacitance Any Input 5 7.5
The Noise Margin for both "1" and "0" level is: 1V min. with VDD=5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V
pF

l e t
DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25°C, CL = 50pF, RL = 200KΩ, tr = tf = 20 ns)
o
bs
Test Condition Value (*) Unit
Symbol Parameter

O tPLH tPHL Propagation Delay Time


VDD (V)
5
Min. Typ.
55
Max.
110
10 30 60 ns
15 25 50
tTLH tTHL Transition Time 5 100 200
10 50 100 ns
15 40 80
(*) Typical temperature coefficient for all VDD value is 0.3%/°C.

3/9
HCF4007UB

TYPICAL APPLICATIONS

TRIPLE INVERTERS: (14, 2, 11); (8,13); (1, 5); (4, 3-INPUT NOR GATE: (13, 2); (1, 11); (12, 5, 8); (4,
7, 9) 7, 9)

( s )
u ct
o d
P r
3-INPUT NAND GATE: (1, 12, 13); (2, 14, 11);
(4, 8); (5, 9)
t e
DUAL BIDIRECTIONAL TRASMISSION
GATING: (1, 5, 12); (2, 9); (11, 4); (8,13,10); (6, 3)
e
o l
b s
- O
(s )
c t
d u
r o
e P
l e t
s o
O b

4/9
HCF4007UB

TEST CIRCUIT

( s )
uct
o d
CL = 50pF or equivalent (includes jig and probe capacitance)
RL = 200KΩ
RT = ZOUT of pulse generator (typically 50Ω)
P r
WAVEFORM: PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
e te
o l
b s
- O
(s )
c t
d u
r o
e P
l e t
s o
O b

5/9
HCF4007UB

Plastic DIP-14 MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.

a1 0.51 0.020

B 1.39 1.65 0.055 0.065

b 0.5 0.020

b1 0.25 0.010

( s )
D 20

u ct 0.787

E 8.5
d
0.335

o
Pr
e 2.54 0.100

e3 15.24

e t e 0.600

ol
F 7.1 0.280

bs
I 5.1 0.201

L 3.3

- O 0.130

Z 1.27

( s ) 2.54 0.050 0.100

c t
d u
r o
e P
l e t
s o
O b

P001A

6/9
HCF4007UB

SO-14 MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
( s )
c1
D 8.55 8.75
45˚ (typ.)
0.336
u ct 0.344

o d
Pr
E 5.8 6.2 0.228 0.244
e 1.27 0.050

ete
e3 7.62 0.300

ol
F 3.8 4.0 0.149 0.157
G
L
4.6
0.5
5.3

b
1.27s 0.181
0.019
0.208
0.050
M
- O
0.68 0.026
S

(s ) 8 ˚ (max.)

c t
du
r o
e P
l e t
so
O b

PO13G

7/9
HCF4007UB

Tape & Reel SO-14 MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.

A 330 12.992

C 12.8 13.2 0.504 0.519

D 20.2 0.795

N 60 2.362

( s )
ct
T 22.4 0.882

du
Ao 6.4 6.6 0.252 0.260

ro
Bo 9 9.2 0.354 0.362

Ko 2.1 2.3 0.082

e P 0.090

let
Po 3.9 4.1 0.153 0.161

so
P 7.9 8.1 0.311 0.319

O b
) -
c t(s
du
r o
e P
l e t
s o
O b

8/9
HCF4007UB

( s )
u ct
o d
P r
e t e
o l
b s
- O
(s )
c t
d u
r o
e P
l e t
s o
O b
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
All other names are the property of their respective owners

© 2004 STMicroelectronics - All Rights Reserved


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