CHAPTER 6
INPUT/OUTPUT UNIT
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OUTLINE
Introduction
Input/output Modules
I/O Module Function
I/O Module Structure
Input/output Techniques
Programmed I/O
Interrupt Driven I/O
Direct Memory Access
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INTRODUCTION
I/O modules
Third key element of a computer system, next to
processor and memory
Interfaces to a system bus and controls one or more
peripheral devices
Contains logic/intelligence
To perform communication function b/n the peripherals and
the bus
Definition : Peripheral device/ Peripheral
An external device connected to an I/O module
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INTRODUCTION…
Why peripheral devices not connected directly to the system
bus ?
Reasons
Wide variety of peripherals with different method of operation
Impractical to incorporate the necessary logic within the processor to
control a range of devices
Delivering different amounts of data
At different speeds
In different formats
All slower than CPU and RAM
Hence, an I/O module is required
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INTRODUCTION…
Input/output module has two functions:
Interface to CPU and Memory via the system bus
Interface to one or more peripherals via data links
Generic model of I/O
module
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INTRODUCTION…
External devices
Used to accomplish I/O operations
Provides a means of exchanging data between
External environment
Computer
Attached to a computer by a link to an I/O module
The link is used to exchange
Control, status and data
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INTRODUCTION…
External devices broadly classified into three
categories:
Human readable devices
Suitable for communicating with the computer user
E.g., Screen, printer, keyboard
Machine readable devices
Suitable for communicating with equipment
E.g., magnetic disk and tape system
Communication devices
Allow the computer to exchange data with a remote device
E.g., Modem, Network Interface Card (NIC)
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I/O MODULE FUNCTION
The major functions performed by I/O module fall into
the following categories
Control & Timing
Processor Communication
Device Communication
Data Buffering
Error Detection
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I/O MODULE STRUCTURE
A block diagram of an I/O module
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I/O MODULE STRUCTURE…
Module connects to the rest of the computer through a set of signal lines –
system bus
Data transferred to and from the module are buffered in one or more data
registers
Status information provided through status registers
Status registers may also function as control registers, to accept detailed control
information from the processor
Module logic interacts with processor via a set of control signal lines
Processor uses control signal lines to issue commands to the I/O module
Some of the control lines may be used by the I/O module, for arbitration and status
signals
Module must recognize and generate addresses for devices it controls
The I/O module contains logic specific to the interface with each device that it 10
controls
INPUT OUTPUT TECHNIQUES
Three techniques exist for I/O operations:
Programmed I/O
The processor issues an I/O command to the I/O module and
waits until the I/O operation is complete
If the processor is faster than the I/O module, it wastes
processor time
Interrupt driven I/O
The processor issues an I/O command, continues to execute
other instructions and is interrupted by the I/O module
when the latter has completed its work
Direct Memory Access (DMA)
The I/O module and main memory exchange data directly,
without the processor involvement
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PROGRAMMED I/O…
Overview of Programmed I/O
CPU issues an I/O command to the appropriate I/O
module
I/O module performs the requested operation
I/O module sets status bits in the I/O status register
CPU checks status bits periodically
I/O module does not inform/interrupt CPU directly
CPU waits for I/O module to complete operation
Wastes CPU time
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INTERRUPT DRIVEN I/O…
Overview of Interrupt Driven I/O
The CPU issues an I/O command to the I/O module,
and then continue to do some other useful work
The I/O module will interrupt the processor to
request service when it is ready to exchange data
with the processor
The processor executes the data transfer and then
resumes its former processing
Interrupt Driven I/O Features
Overcomes CPU waiting
No repeated CPU checking of device 13
I/O module interrupts when ready
INTERRUPT DRIVEN I/O…
Basic Operation (for input)
CPU issues read command
I/O module gets data from peripheral while CPU does other
work
I/O module interrupts CPU
CPU requests data
I/O module transfers data
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INTERRUPT DRIVEN I/O…
CPU Viewpoint (for input)
Issue read command
Do other work
Check for interrupt at end of each instruction cycle
If interrupted:
Save context (registers) of the current program
Process the interrupt
Read a data from the I/O module and store it in memory
I/O module viewpoint (for input)
I/O module receives read command from the CPU
I/O module reads data from associated peripheral
I/O module puts the data in its data registers
The module signals an interrupt over control line
The module places the data on the data bus when requested
by the processor
The module is ready for another I/O operation 15
COMPARISON
Comparison of the three techniques used when a block of
data is read from a peripheral device into a memory
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DIRECT MEMORY ACCESS…
The need for Direct Memory Access
Interrupt driven I/O efficient than programmed I/O
But both, interrupt driven and programmed I/O,
require active CPU intervention
Any data transfer traverses a path through the processor
Both forms of I/O suffer from two inherent drawbacks
I/O transfer rate is limited by speed of the processor to test
and service a device
CPU is tied up in managing an I/O transfer
A no of instructions must be executed for each I/O
transfer
DMA is the solution
More efficient technique to move large blocks of data 17
DIRECT MEMORY ACCESS…
DMA Function
DMA involves an additional module on the system
bus
DMA module/controller
DMA module/ Controller
Can take over control of the system bus from the processor
When the processor does not need it OR
Force the processor to suspend operation temporarily
Often called cycle stealing, as the DMA module in effect
steals a bus cycle
Why ? to transfer data to/from memory over the system bus
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DIRECT MEMORY ACCESS…
Typical DMA Module Diagram
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DIRECT MEMORY ACCESS…
DMA Operation
When the processor wants to read/write a block of data. It tells the
DMA controller the following information:
Whether Read/Write is requested
Using the read/write control line b/n the processor and the DMA module
The address of the I/O device involved
Communicated over data bus
Starting location in memory to read from or write to
Communicated over data lines and stored by the DMA in its data register
Amount of data to be transferred
Communicated via data lines and stored in the data count register
CPU carries on with other work
DMA controller deals with transfer
DMA controller sends interrupt when finished
The processor is involved only
At the beginning
At end of the transfer
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DIRECT MEMORY ACCESS…
DMA Transfer Cycle Stealing
DMA controller takes over bus for a cycle
Transfer one word of data
Not an interrupt
CPU does not switch context
CPU suspended just before it accesses bus
i.e. before an operand or data fetch or a data write
Slows down CPU but not as much as CPU doing
transfer
DMA and Interrupt
Breakpoints During
an Instruction Cycle 21
End of Chapter 6
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