10/26/2019

1.1 Computer Architecture and Organization

Computer Organization and Architecture
What is Computer Architecture?
Chapter One
• It is concerned with the structure and behavior of various
Digital Logic and Digital Systems functional modules (HW and SW) of a digital computer as well as
how these modules interact to meet the requirement of the user
• Computer organization and architecture • Deals with interface between hardware and software
• Basic components of Digital computer • Computer Architecture helps us to understand the functionalities
• Logic Gates of a system. (deals with high-level design issues)
• Combinational Circuits  Describes WHAT the computer does (logical view)
• Flip-Flops • Examples:

• Sequential Circuits  the instruction set (what operations can be performed?)

• Common Digital Components  the number of bits used to represent various data types
 methods used for input-output (I/O mechanism), etc.
10/26/2019 1 10/26/2019 2

Computer Architecture and Organization Computer Architecture and Organization

Computer Organization Computer Design:
• It is concerned with ways in which the hardware • Is concerned with the hardware design of the computer.
components operate and the way they are interconnected
together to form a computer system • Once the computer specification is formulated, it is the task of
• Concerned with information flow between components and the designer to develop hardware for the system.
means by which such information flow is controlled • While designing a computer architecture is considered first. An
• It covers the hardware units and their connection details
organization is done on the basis of architecture.
• Describes how it does it (how does a computer work)
• A computer's organization expresses the realization of the
architecture or how the physical aspects of a computer systems are
implemented.
• Eg. Circuit design, Control Signals, Memory types, peripherals, etc

10/26/2019 3 10/26/2019 4

1
 10/26/2019

1.2 Basic Components of Computer Organization of the computer

• The digital computer is a digital system that performs
various computational tasks.
• Computer is made up of the following HW components:
– A Central Processing Unit
• Arithmetic & Logic Unit
• Control Unit
• Registers
– Memory
• any physical device capable of storing information
temporarily or permanently
– Primary Memory (Usually called RAM)
– Secondary Memory or Mass Storage (Disk drives)
– Input and Output Devices
• allow the computer system to interact with the outside world by
moving data into and out of the system. Block Diagram of a digital Computer
10/26/2019 5 10/26/2019 6

1.3 Logic Gates Logic Gates

• The building blocks used to create digital circuits are
• The seven basic logic gates includes: AND,
logic gates
OR, NOT, NAND, NOR, XOR, and XNOR.
– Gates are used as the building blocks in the design of more
complex digital logic circuits 1. The AND gate
• There are three elementary logic gates and a range of
other simple gates
• Each gate has its own logic symbol which allows
complex functions to be represented by a logic diagram
• The function of each gate can be represented by a truth
table or using Boolean notation

10/26/2019 7 10/26/2019 8

2
 10/26/2019

Logic Gates Logic Gates

2. The OR gate 3. The NOT gate (or inverter)

10/26/2019 9 10/26/2019 10

Logic Gates Logic Gates

4. The NAND gate 5. The NOR gate
– Is the complement of AND gate – Is the complement of OR gate

10/26/2019 11 10/26/2019 12

3
 10/26/2019

Logic Gates Logic Gates

6. The Exclusive OR gate 7. The Exclusive NOR gate

C=A’B+AB’

10/26/2019 13 10/26/2019 14

1.4 Combinational Circuits 1.4 Combinational Circuits

• A combinational circuit is a connected arrangement of logic
gates with a set of inputs and outputs. Combinational logic
• The state of the output at any instant is entirely  where the outputs are determined solely by the
determined by the states of the inputs at that time. current states of the inputs
• Gates are basic combinational circuits themselves, and gates
used to construct more complex combinational functions.
• Combinational circuits are employed in digital computers:
– For generating binary control decisions and
Examples
– For providing digital components required for data • Adders (Half adder and Full adder)
processing • Decoders /Encoders
• Multiplexers/ Demultiplexers
• Comparator
Used to implement comparison operators (= , > , < ,  , )
10/26/2019 15 10/26/2019 16

4
 10/26/2019

Half-Adder Full-Adder
• The most basic digital arithmetic circuit. • A full-adder performs the addition of three binary digits.
• Performs the addition of two binary digits. • Two half-adders can be combined to form a full-adder.
• Full adder has three inputs and two outputs
• The input variables of a half-adder are called the augends
• The full adder circuit contains two half adders and an OR gate.
• The output variables of a half-adder are called the sum (S) and
the carry (C).

half adder
S = x’y+xy’=x ⊕ y
C=xy

10/26/2019 17 10/26/2019 18

Decoder Decoder
• A decoder is a combinational circuit that converts binary
information from the n coded inputs to a maximum of 2n unique Logic Diagram for 3-to-8 Decoder
outputs.
• Consists of: n Inputs and 2n Outputs (numbered from 0 - 2n - 1)
• The truth table of 3-to-8 Decoder is shown below:

Decoders typically include one or more enable inputs

to control (turn on/off) the operation of a circuit.

10/26/2019 19 10/26/2019 20

5
 10/26/2019

Multiplexer (MUX)/selector Multiplexers

• It is a combinational circuit that receives input from • Multiplexer 4-data input MUX
one of 2n input data lines and directs it to a single – data inputs
2n
output line. – n selection
• The selection of a particular input data line for a inputs
particular output is determined by a set of selection – a single output
inputs.
• A 2n-to-1 multiplexer has 2n input data lines and n • Selection input
input selection lines. determines the
input that should
be connected to
the output

10/26/2019 21 10/26/2019 22

Multiplexers 1.5 Flip-Flops

• Like encoders, Multiplexers can have an enable • It is a binary cell capable of storing just one bit of
input to control the operation of the unit. information (it contains 0 or 1)
• Flip flops are the smallest temporary storage units
/memory/of a computer
• It is a bistable device (i.e. it has two stable states: its
output remains either high (1) or low (0))
Function Table • The high state ,i.e, 1 is called Set and the low state, i.e,
0 is called the Reset or clear state

4-to-1 multiplexer

10/26/2019 23 10/26/2019 24

6
 10/26/2019

1.5 Flip-Flops 1.5 Flip-Flops

 All flip flops have two outputs, one for the normal • SR (set-reset) Flip- Flop
value (Q) and other giving a value opposite to the
– Can be constructed using two NOR gates
value stored in the flip flop (Q’)
 Flip flops are of many types depending on the – There are two inputs (S & R) and two outputs (Q &
number of inputs they have and how these inputs Q’)
affect the outputs.
 The most common types of flip flops are: S R Q
R 0 0 hold
• SR Flip- Flop Q
0 1 0
• D Flip- Flop 1 0 1
Q' 1 1 disallow
• JK Flip- Flop S

• T Flip- Flop

10/26/2019 25 10/26/2019 26

1.5 Flip-Flops 1.5 Flip-Flops

• SR Flip Flops S R Q0 Q Q’
0 0 0 0 1
Q = Q0 • SR Flip- Flop
0 0 1 1 0
0 1 0 0 1
R 1
Q=0
10 0 1 1 0 1
Q 1 0 0 1 0
Q=1
1 0 1 1 0
1 1 0 0 0 Q = Q’
1 1 1 0 0 Q = Q’
S Q
1 0

10/26/2019 27 10/26/2019 28

7
 10/26/2019

1.5 Flip-Flops 1.5 Flip-Flops

• Disadvantages of SR flip flop D Flip Flop
1. It needs two data inputs a high S to store a 1 bit • The D (Data) flip flop is a slight modification of SR flip flop
and a high R to store 0 bit • SR flip flop is converted to D flip flop by inserting an
• Generation of two signals to drive a flip flop is difficult in inverter b/n S and R and assigning the symbol D to the
many applications signal input
2. The SR flip flop puts a forbidden(invalid)
condition that both S and R can not be high at the
same time

10/26/2019 29 10/26/2019 30

1.5 Flip-Flops 1.5 Flip-Flops

JK Flip Flop JK Flip Flop
• Is a refinement of the SR flip flop in that the • Instead of the indeterminate condition, the JK
indeterminate condition of the SR type is define flip flop has a complement condition
in the JK type
• Inputs J and K behave like inputs S and R to set
and clear the flip flop, respectively
• When inputs J and K are both equal to 1, a clock
transition switches the outputs of the flip flop to
their complement state.

10/26/2019 31 10/26/2019 32

8
 10/26/2019

1.5 Flip-Flops 1.6 Sequential Circuits

T Flip Flop • Is an interconnection of flip flops and gates
• T(Toggle) flip flop is obtained from a JK flip flop when /combinational circuits/
inputs J and K are connected to provide a signal input
designated by T. (both J and K inputs are always equal) • the current output of a sequential circuit depends on the
• When T=0 (J=K=0) a clock transition does not change the current input and the current state of that circuit.
state of the flip flop • Remembering the past is the key feature of
• When T=1 (J=K=1) a clock transition complements the sequential circuits.
state of the flip flop

10/26/2019 33 10/26/2019 34

1.6 Sequential Circuits Registers

The two major uses of Sequential circuits in digital • An n-bit register has a group of n flip-flops and is capable
systems are: of storing any binary information of n bits.
 As memories to store information while processing • In addition to flip-flops, registers can have combinational
 As control circuits to generate control signals which gates that perform certain data-processing tasks.
are essential to select and enable a sequence of data – The gates control how and when new information is
transfer or data processing steps in the execution of transferred into the registers.
multistep tasks • The transfer of new information into a register is referred
Examples to as a loading the register.
 Registers • If the loading occurs simultaneously at a common clock
 Counter pulse transition, we say that the load is done in parallel.

10/26/2019 35 10/26/2019 36

9
 10/26/2019

Registers 1.7. Integrated Circuits (IC)

• The load input in a register determines the action to be • Digital circuits are constructed with integrated circuits
taken with each clock pulse. • The various gates are interconnected inside the chip to form
• When the load input is 1, the data from the input lines is the required IC
transferred into the register's flip-flops. • An IC is a piece (also called a chip) of silicon on which
• When the load input is 0, the data inputs are inhibited and multiple gates or transistors have been embedded
the flip-flop maintains its present state. • These silicon pieces are mounted on a plastic or ceramic
package with pins along the edges that can be soldered onto
circuit boards or inserted into appropriate sockets
• 4 bit register

• SSI chip contains independent NAND gates

• The inputs and outputs of the gates are connected directly to the pins in the package
10/26/2019 37 10/26/2019 38

1.7. Integrated Circuits (IC) Chapter Two:

• As the technology of ICs has improved , the number of gates
Data Representation
that can be put in a single chip has increased considerably. • Data representation refers to the form in which data is
stored, processed, and transmitted
Abbreviation Name Number of Gates Examples • In computers instructions and data are stored in binary
SSI Small Scale Less then 10 number system consists of 0 and 1.
Integration
• The computer is required to store the following types of
MSI Medium Scale 10 to 200 decoders, adders,
Integration registers
data:
LIS Large Scale between 200 and a Processors, Memory
1. Numbers used in arithmetic computations
Integration few thousand chips 2. Alphabets used in symbolic instructions
VLSI Very large Scale Thousands large memory arrays, 3. Special Characters and symbols
Integration complex microcomputer  Computers internally store all data in binary form, i.e,
chips
as strings of 0’s and 1’s.

10/26/2019 39 10/26/2019 40

10
 10/26/2019

Data Representation Data Representation

• Since binary numbers are awful to see and work • BIT for Binary Digit -- each 0 or 1 in the binary system
– Single bit is not overly useful
with, octal and hexadecimal numbers are most
widely used to compress long string of binary data. • Bits commonly stored and manipulated in groups
i.e, • BYTE – a group of bits (8 bits = 1 byte)
– Each byte represents one character of data
– It is difficult for a human to work with long strings
• Numbers, letters, special characters (%, $, # etc.)
of 0’s and 1’s • Letter, numbers and symbols are the form we use to
– Octal and Hexadecimal are ways to group bits represent information.
together • WORD – the number of bits that can be processed at one time by
the central processing unit of the computer. (4 bytes = 1 word (in
many systems)
– Early computers – Apple II – 8 bit Words,
– Modern machines – can process up to 64 bits/word

10/26/2019 41 10/26/2019 42

Common Number Systems: Decimal

0
Binary
0
Octal
0
Hexa
0
The base of number system represents the number of 1 1 1 1
2 10 2 2
digits that are used in the system. 3 11 3 3
The digits always begin with 0 and continue through one 4 100 4 4
less than the base 5 101 5 5
6 110 6 6
System Base Symbols 7 111 7 7
8 1000 10 8
Decimal 10 0, 1, … 9 9 1001 11 9
Binary 2 0, 1 10 1010 12 A
11 1011 13 B
Octal 8 0, 1, … 7 12 1100 14 C
Hexa- 16 0, 1, … 9, 13 1101 15 D
14 1110 16 E
decimal A, B, … F 15 1111 17 F
16 10000 20 10
10/26/2019 43 10/26/2019 44

11
 10/26/2019

Conversion Among Bases Base Conversion

Converting a decimal number into binary
• The possibilities: (decimal  binary)
 Divide the decimal number by 2 and take its remainder
Decimal Octal
 The process is repeated until it produces the result of 0
 The binary number is obtained by taking the remainder
from the bottom to the top

Binary Hexadecimal

10/26/2019 45 10/26/2019 46

Example: Decimal  Binary 0.8110  binary???

0.1100112
5310 => 53 / 2 = 26 remainder 1 0.8110 => 0.81 x 2 = 1.62
26 / 2 = 13 remainder 0 0.62 x 2 = 1.24
Read from
13 / 2 = 6 remainder 1
the bottom 0.24 x 2 = 0.48
6 / 2 = 3 remainder 0 to the top
3 / 2 = 1 remainder 1 0.48 x 2 = 0.96
1 / 2 = 0 remainder 1 0.96 x 2 = 1.92
0.92 x 2 = 1.84
= 1101012 (6 bits) = 0.1100112 (approximately)
= 001101012 (8 bits)
(note: bit = binary digit)

10/26/2019 47 10/26/2019 48

12
 10/26/2019

Converting a binary number into decimal

Binary to octal
• Multiply each bit in the binary number with the weight (or – 3 digits in binary is equivalent to 1
position) digit in octal
• Add up all the results of the multiplication performed Binary Octal
• The desired decimal number is the total of the multiplication 000 0 In a computer
results performed 001 1 system, the
Example: Binary  Decimal 010 2
conversion from
binary to octal or
a)1110012 (6 bits) 011 3 otherwise is based
(1x25) + (1x24) + (1x23) + (0x22) + 100 4 on the conversion
table above.
(0x21) + (1x20) 101 5
= 32 + 16 + 8 + 0 + 0 + 1=5710 110 6
b)000110102 (8 bits) 111 7

= 24 + 23 +21 3 digits in base-2 (binary) is equivalent to 1 digit in base-8 (octal)

= 16 + 8 + 2=2610
10/26/2019 49 10/26/2019 50

Example: Binary  Octal

Binary − Hexadecimal Conversion
Hex Binary
• Each group of 4 bits represents 0
1
0000
0001
Convert these binary numbers into octal a hexadecimal digit 2 0010
numbers: 3
4
0011
0100
(a) 001011112 (8 bits) (b) 111101002 (8 bits) 5 0101
Assume Zeros 6 0110
Example: 7 0111
8 1000
Refer to the binary- Refer to the binary- ( 1 0 1 1 0 . 0 1 )2 9 1001
octal conversion table octal conversion table A 1010
B 1011
000 101 111 011 110 100 C 1100
D 1101
(1 6 . 4 )16 E 1110
0 5 7 3 6 4 F 1111

= 578 = 3648 Works both ways (Binary to Hex & Hex to Binary)
10/26/2019 51 10/26/2019 52

13
 10/26/2019

Example: Octal  Hexadecimal Example: Hexadecimal  Binary

Convert the following octal numbers
into hexadecimal numbers (16 bits) Convert the following hexadecimal
(a) 658 (b) 1238 numbers into binary numbers
Refer to the binary-octal conversion table Refer to the binary-octal conversion table (a) 12B16 (b) ABDE16

68 58 18 28 38
Refer to the binary-hexadecimal Refer to the binary-hexadecimal
110 101 001 010 011 conversion table conversion table

0000 0000 0011 01012 0000 0000 0101 00112 1 2 B16 A B D E16
0 0 3 5 0 0 5 3
0001 0010 10112 (12 bits) 1010 1011 1101 11102
= 3516 = 5316
= 0001001010112 = 10101011110111102
octal  binary  hexadecimal
10/26/2019 53 10/26/2019 54

Signed Integer Representation

1. Sign-Magnitude

• Signed integers are usually used by programmers • The easiest representation

• Unsigned integers are used for addressing purposes • The leftmost bit in the binary number represents the
in the computer (especially for assembly language
programmers) sign of the number. 0 if positive and 1 if negative
• Three representations of signed integers: • The balance bits represent the magnitude of the
number.
1. Sign-Magnitude
2. Ones Complement
3. Twos Complement

10/26/2019 55 10/26/2019 56

14
 10/26/2019

Examples:
ii) 6 bits binary number
i) 8 bits binary number __ __ __ __ __ __
__ __ __ __ __ __ __ __ 5 bits for magnitude (value)
Sign bit
7 bits for magnitude (value) 0 => +ve 1 => –ve
Sign bit
0 => +ve 1 => –ve a) +7 = 0 0 0 1 1 1
(–7 = 1 0 0 1 1 12)
b) –10 = 1 0 1 0 1 0
a) +7 = 0 0 0 0 0 1 1 1 (+10 = 0 0 1 0 1 02)
(–7 = 100001112)
b) –10 = 1 0 0 0 1 0 1 0
(+10 = 000010102)
10/26/2019 57 10/26/2019 58

2. Ones Complement Example:

• In the ones complement representation, positive

numbers are same as that of sign-and-magnitude Convert –5 into ones complement
representation (8 bit)
Example: +5 = 00000101 (8 bit)
Solution:
 as in sign-magnitude representation
• First, obtain +5 representation
• Sign-magnitude and ones complement use the same
representation above for +5 with 8 bits and all positive in 8 bits  00000101
numbers. • Change every bit in the number
from 0 to 1 and vice-versa.
• For negative numbers, their representation are obtained
by changing bit 0 → 1 and 1 → 0 from their positive • –510 in ones complement is
numbers 111110102

10/26/2019 59 10/26/2019 60

15
 10/26/2019

Exercise: 3. Twos complement

Get the representation of ones • Similar to ones complement, its positive number is same as
complement (6 bit) for the following sign-magnitude
numbers: • Representation of its negative number is obtained by adding 1
to the ones complement of the number.
i) +710 ii) –1010 Example: Convert –5 into twos complement representation
and give the answer in 8 bits.
Solution:
Solution: Solution:  First, obtain +5 representation in 8 bits 
000001012
(+7) = 0001112 (+10)10 = 0010102  Obtain ones complement for –5  111110102
 Add 1 to the ones complement number:
So,  111110102 + 12 = 111110112
(-10)10 = 1101012  –5 in twos complement is 111110112

10/26/2019 61 10/26/2019 62

Exercise: Exercise:
Obtain representation for the following
• Obtain representation of twos numbers
complement (6 bit) for the Decimal Sign-magnitude Twos complement
following numbers +7
+6
i) +710 ii)–1010 4 bits
-4
Solution: Solution:
-6

(+7) = 0001112 (+10) 10 = 0010102 -7

(same as sign-magnitude) +18
(-10) 10 = 1101012 + 12 -18
8 bits

= 1101102 -13
So, twos compliment
for –10 is 1101102
10/26/2019 63 10/26/2019 64

16
 10/26/2019

Solution: Floating point representation

Obtain representation for the following
numbers
• Floating-Point Numbers are useful for applications
Decimal Sign-magnitude Twos complement where very large and very small numbers are needed
+7 0111 0111 simultaneously
+6 0110 0110
-4 1100 1100
• The signed magnitude, 1’s complement, and 2’s
-6 1110 1010
complement representations as such are not useful
-7 1111 1001
in scientific or business applications that deal with
real number values over a wide range.
+18 00010010 00010010
-18 10010010 11101110 • Floating-point representation solves this problem.
-13 11110010 11110011

10/26/2019 65 10/26/2019 66

Floating point representation Floating point representation

• Computers use a form of scientific notation for floating-
point representation • Floating numbers “normalized” to utilize
• Numbers written in scientific notation have three maximum precision possible
components:
– number arranged so that first bit of mantissa
always a non-zero digit.
• Computer representation of a floating-point number – For binary, this means the first digit must be a 1
consists of three fixed-size fields:
• A fixed place is chosen for the binary point of
the mantissa, say immediately after the first
digit.
• This is the standard arrangement of these fields.

10/26/2019 67 10/26/2019 68

17
 10/26/2019

Floating point representation

Floating point representation
example
Biased Exponent Notation
• The value actually stored for the exponent made always
positive which simplifies implementation of floating
point operations.
• the bias is a fixed positive constant big enough to make
all “biased exponents” positive.
• Two reasons quoted for using baised notation:
– easier to design hardwrae for floating point arthmetic
– Easier to sort numbers as can sort simply on bit patterns.

10/26/2019 69 10/26/2019 70

Floating point representation Floating point representation

• The IEEE has established a standard for floating-point numbers
• IEEE (Institute of Electrical and Electronics Engineers) Standard
Floating-Point Format (IEEE 754)
Short (32-bit) format
Short exponent range is –127 to 128
but the two extreme values
8 bits, 23 bits for fractional part are reserved for special operands
bias = 127, (plus hidden 1 in integer part)
–126 to 127
(similarly for the long format)

Sign Exponent Significand

11 bits,
bias = 1023, 52 bits for fractional part
–1022 to 1023 (plus hidden 1 in integer part)

Long (64-bit) format

• A bias is a number that is approximately midway in the range of
Fig. The two IEEE standard floating-point formats. values expressible by the exponent.

10/26/2019 71 10/26/2019 72

18
 10/26/2019

Floating point representation Floating point representation

• To increase the precision of the significand, the IEEE 754

Standard uses a normalized significand which implies that
its most significant bit is always 1.
• As this is implied, it is assumed to be on the left of the
(virtual) binary point of the significand.
10/26/2019 73 10/26/2019 74

Floating point representation Floating point representation

Exercises:
1. Express the decimal number -3.75 as a floating point
number using IEEE single precision (32 bit format).
2. Represent 10101010.010101 in the floating point
representation,
Assume we use the following figure to represent floating
point number in a 32 bit system: (Exponent Bias=2n-1-1 for
an n bit exponent)

10/26/2019 75 10/26/2019 76

19