Addressing Modes and Instruction Cycle
The operation field of an instruction specifies the operation to be performed. This
operation will be executed on some data which is stored in computer registers or the
main memory. The way any operand is selected during the program execution is
dependent on the addressing mode of the instruction.
The purpose of using addressing modes is as follows:
• To give the programming versatility to the user.
• To reduce the number of bits in addressing field of instruction.
Types of Addressing Modes
[Link] Mode
In this mode, the operand is specified in the instruction itself. An immediate mode
instruction has an operand field rather than the address field.
For example: ADD 7, which says Add 7 to contents of accumulator. 7 is the operand
here.
[Link] Mode
In this mode the operand is stored in the register and this register is present in CPU.
The instruction has the address of the Register where the operand is stored.
Advantages
• Shorter instructions and faster instruction fetch.
• Faster memory access to the operand(s)
Disadvantages
• Very limited address space
• Using multiple registers helps performance but it complicates the
instructions.
[Link] Indirect Mode
In this mode, the instruction specifies the register whose contents give us the address
of operand which is in memory. Thus, the register contains the address of operand
rather than the operand itself.
[Link] Increment/Decrement Mode
In this the register is incremented or decremented after or before its value is used.
[Link] Addressing Mode
In this mode, effective address of operand is present in instruction itself.
• Single memory reference to access data.
• No additional calculations to find the effective address of the operand.
For Example: ADD R1, 4000 - In this the 4000 is effective address of operand.
Effective Address is the location where operand is present.
[Link] Addressing Mode
In this, the address field of instruction gives the address where the effective address is
stored in memory. This slows down the execution, as this includes multiple memory
lookups to find the operand.
[Link] Addressing Mode
In this the contents of the indexed register is added to the Address part of the
instruction, to obtain the effective address of operand.
EA = A + (R), In this the address field holds two values, A(which is the base value)
and R(that holds the displacement), or vice versa.
[Link] Addressing Mode
It is a version of Displacement addressing mode.
In this the contents of PC(Program Counter) is added to address part of instruction
to obtain the effective address.
EA = A + (PC), where EA is effective address and PC is program counter.
The operand is A cells away from the current cell(the one pointed to by PC)
[Link] Register Addressing Mode
It is again a version of Displacement addressing mode. This can be defined as EA =
A + (R), where A is displacement and R holds pointer to base address.
[Link] Addressing Mode
In this mode, operand is at the top of the stack. For example: ADD, this instruction
will POP top two items from the stack, add them, and will then PUSH the result to
the top of the stack.
Instruction Formats (Zero, One, Two and Three Address Instruction)
• Computer perform task on the basis of instruction provided.
• A instruction in computer comprises of groups called fields.
• These field contains different information as for computers every thing is in 0 and
1 so each field has different significance on the basis of which a CPU decide what
so perform.
The most common fields are:
• Operation field which specifies the operation to be performed like addition.
• Address field which contain the location of operand, i.e., register or memory
location.
• Mode field which specifies how operand is to be founded.
A instruction is of various length depending upon the number of addresses it
contain. Generally CPU organization are of three types on the basis of number of
address fields:
1. Single Accumulator organization
2. General register organization
3. Stack organization
On the basis of number of address instruction are classified as:
We will use X = (A+B)*(C+D) expression to showcase the procedure.
[Link] Address Instructions –
1. A stack based computer do not use address field in instruction. To evaluate a
expression first it is converted to revere Polish Notation i.e. Post fix Notation.
2. Expression: X = (A+B)*(C+D)
3. Postfixed : X = AB+CD+*
4. TOP means top of stack
M[X] is any memory location
One Address Instructions –
This use a implied ACCUMULATOR register for data manipulation. One operand is
in accumulator and other is in register or memory location. Implied means that the
CPU already know that one operand is in accumulator so there is no need to specify
it.
Expression: X = (A+B)*(C+D)
AC is accumulator
M[] is any memory location
M[T] is temporary location
LOAD A AC = M[A]
ADD B AC = AC + M[B]
STORE T M[T] = AC
LOAD C AC = M[C]
ADD D AC = AC + M[D]
MUL T AC = AC * M[T]
STORE X M[X] = AC
[Link] Address Instructions –
This is common in commercial computers. Here two address can be specified in the
instruction. Unlike earlier in one address instruction the result was stored in
accumulator here result can be stored at different location rather than just
accumulator, but require more number of bit to represent address.
Here destination address can also contain operand.
Expression: X = (A+B)*(C+D)
R1, R2 are registers
M[] is any memory location
MOV R1, A R1 = M[A]
ADD R1, B R1 = R1 + M[B]
MOV R2, C R2 = C
ADD R2, D R2 = R2 + D
MUL R1, R2 R1 = R1 * R2
MOV X, R1 M[X] = R1
Three Address Instructions
This has three address field to specify a register or a memory location. Program
created are much short in size but number of bits per instruction increase. These
instructions make creation of program much easier but it does not mean that
program will run much faster because now instruction only contain more
information but each micro operation (changing content of register, loading
address in address bus etc.) will be performed in one cycle only.
Expression: X = (A+B)*(C+D)
R1, R2 are registers
M[] is any memory location
ADD R1, A, B R1 = M[A] + M[B]
ADD R2, C, D R2 = M[C] + M[D]
MUL X, R1, R2 M[X] = R1 * R2
