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Logic Gates Lab Report - Fall 2024

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26 views3 pages

Logic Gates Lab Report - Fall 2024

Uploaded by

mchips2000
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Bahria University, Islamabad

Department of Software Engineering

CALD Lab (Fall-2024)


Teacher: Engr. Aamir

Student : Muhammad Jibran


Enrollment : 01-131232-062

Lab: 2
Date: 24-09-2024

Comments:

Signature
Muhammad Jibran CALD Engr. Aamir
01-131232-062 Lab # 02 Dept of SE, BUIC

Lab No: 2 - Introduction and Implementation of Gates - II

Introduction
To study and verify the Truth Tables of AND, OR, NOT, NAND, NOR, XOR, XNOR logic gates for
positive logic.
Tools Used
Digital Logic Electrical Trainer

Lab Task:
Screenshot

Truth Tables:
OR Gate:

X Y X+Y

0 0 0

0 1 1

1 0 1

1 1 1

2
Muhammad Jibran CALD Engr. Aamir
01-131232-062 Lab # 02 Dept of SE, BUIC

NAND Gate:

X Y ~ (X . Y)

0 0 1

0 1 0

1 0 0

1 1 0

NOT Gate:

X ~X

0 1

1 0

XOR Gate:

X Y X⊕Y

0 0 0

0 1 1

1 0 1

1 1 0

Conclusion
From this lab, we learnt more logic gate ICs and how they do in certain conditions.

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