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Memory Organization and Hierarchy Explained

data architecture
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0% found this document useful (0 votes)
32 views43 pages

Memory Organization and Hierarchy Explained

data architecture
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Chapter -7

Memory organization

1
Outline
Memory hierarchy

Main memory

Auxiliary memory

Associated memory

Cache memory

Virtual memory

2
Memory hierarchy
 Memory is used for storing programs and data that are required to perform

a specific task

 For CPU to operate at its maximum speed, it required an uninterrupted and

high speed access to these memories that contain programs and data

 Some of the criteria need to be taken into consideration while deciding

which memory is to be used


Cost
 Speed
Memory access time
Data transfer rate
Reliability
3
Memory Hierarchy….
 Memory Hierarchy is to obtain the highest possible access
speed while minimizing the total cost of the memory system
 Get the performance of fast expensive memory for the price
of slow cheap memory!
 GP Registers (2-5 ns)

 Cache

 Level 1 Cache (2-10 ns)


 Level 2 Cache (5-20 ns)
 Main Memory (40–80 ns)

 Disk (10 ms seek, 5-100 Mb/s throughput)


Memory hierarchy….

5
Main memory
 Central storage unit in a computer system

 Relatively large and fast memory used to store program and data during

computer operation

 Made up of semiconductor Integrated chips

 Types:

RAM (Random access memory)

ROM (Read only memory)

6
Random access memory (RAM)
 Random access memory (RAM) is the best known form of computer

memory

 RAM is considered "random access" because you can access any memory

cell directly if you know the row and column that intersect at that cell

 Types of RAM:-

Static RAM (SRAM)

Dynamic RAM (DRAM)

7
Random access memory (RAM)…..
 Static RAM (SRAM)

 A bit of data is stored using the state of a flip-flop

 Retains value indefinitely, as long as it is kept powered

 Mostly uses to create cache memory of CPU

 Faster and more expensive than DRAM

 Dynamic RAM (DRAM)

 Each cell stores bit with a capacitor and transistor

 Large storage capacity

 Needs to be refreshed frequently

 Used to create main memory

 Slower and cheaper than SRAM


8
Read only memory (ROM)
 ROM is used for storing programs that are Permanently resident in the

computer and for tables of constants that do not change in value once the
production of the computer is completed

 The ROM portion of main memory is needed for storing an initial program

called bootstrap loader, which is to start the computer software operating


when power is turned on

 There are five basic ROM types:


 ROM - Read Only Memory
 PROM - Programmable Read Only Memory
 EPROM - Erasable Programmable Read Only Memory
 EEPROM - Electrically Erasable Programmable Read Only Memory
 Flash EEPROM memory
9
RAM and ROM chips
 RAM and ROM chips are available in variety of size
 A RAM chip is better suited for communication with the CPU if it has one
or more control inputs that select the chip when needed

10
RAM and ROM chips…
 A RAM chip is better suited for communication with the CPU if it has one

or more control inputs that select the chip when needed

11
Memory Address Map
 Memory Address Map is a pictorial representation of assigned address space

for each chip in the system

 To demonstrate an example, assume that a computer system needs 512

bytes of RAM and 512 bytes of ROM


The RAM have 128 byte and need seven address lines

The ROM have 512 bytes and need 9 address lines

 The hexadecimal address assigns a range of hexadecimal equivalent address

for each chip


 Line 8 and 9 represent four distinct binary combination to specify which
RAM we chose
 When line 10 is 0, CPU selects a RAM. And when it’s 1, it selects the ROM
12
Memory Address Map…

13
Memory connection to CPU
 RAM and ROM are connected to CPU through address bus and data bus
 2x4 decoder is used to select among four RAM chips for memory address
map shown above

14
Memory connection to CPU

15
Auxiliary memory
 The auxiliary memory is at the bottom and is not connected with the CPU

directly

 However, being slow, it is present in large volume in the system due to its

low pricing

 This memory is basically used for storing the programs that are not needed

in the main memory

 This helps in freeing the main memory which can be utilized by other

programs that needs main memory

 The main function of this memory is to provide parallel searching that can

be used for performing a search on an entire word


16
Auxiliary memory…
 The most common auxiliary memory used in computer system are

magnetic disk and magnetic tape

 Others are magnetic drums, magnetic bubble memory and optical disk

 The physical mechanism is based on the concept of magnetic, electronics

and electromechanical

Example: Magnetic disk

 Magnetic disk is a circular plate constructed of metal or plastic coated with

magnetized material

 Bits are stored in the magnetized surface in spots along concentric circle

17
called track
Auxiliary memory…
 Stored bits are detected by a change in magnetic field produced by
recorded spot
 Tracks are divided into section called sectors
 In most system, the minimum quantity of information which can be
transferred is sector
 Disk that permanently attached to the unit assembly and does not removed
by occasional user is called hard disk

18
Associative memory
 Associative memory is a memory unit which accessed through content

rather than through a specific address

 Associative memory is also known as associative storage, associative array or

content-addressable memory (CAM)


 When memory is write no address is required, only empty location is searched

 When memory is read the content of word is compared against memory content,

valid match is subject for reading

 Associative memory is expensive than address searchable memory such as

RAM

 Associative memory is used for application where searching time is very


19
critical and must be very short
Associative memory…
Hardware organization

 It consists of a memory array and logic from words with n bits per word

 It connected with 3 external registers:

 Argument register: holds a word going to be search and have size n bits for n bits
word memory array associative memory

 Match register: has m bits for m words size of associative memory


 Key register: hold bits used to mask bits of argument register for selecting bits in
argument register and have similar length with argument register

 The cells in the array are specifies the bit in the word

 It consists of a flipflop storage element Fij and the circuits for reading,
20 writing, and matching the cell
Associative memory…
Associative memory of m word, n cells per word

Block diagram of associative memory

21
Associative memory…
Example:
 Argument register: 101 111100
 key register: 111 000000
 Word 1: 100 111100 …………..>no match
 Word 2: 101 000001…………….>match
Procedures:

 Only the three leftmost bits of A are compared with memory words

because K has 1’s in these positions

 A bits in the argument register is compared with all the bits in the word

based on their column position such that Key register bits = 1


 The words that match the bits of the argument register set a corresponding
22 bit in the match register
Cache memory
 Analysis of a large number of typical programs has shown that, the

references to memory at any given interval of time tend to be confined


within a few localized areas in memory

 The phenomenon is known as the property of locality of reference

 If the active portions of the program and data are placed in a fast small

memory, the average memory access time can be reduced

 Thus reducing the total execution time of the program

 Such a fast small memory is referred to as a cache memory

23
Cache memory….
 The cache is the fastest component in the memory hierarchy and

approaches the speed of CPU component

 It is placed between the CPU and main memory

 Stores program segments currently being executed and data frequently

accessed

Basic operation of the cache


ϗ When CPU needs to access memory, the cache is examined

ϗ If the word is found in the cache, it is read from the fast memory

ϗ If the word addressed by the CPU is not found in the cache, the main memory

is accessed to read the word


24
Cache memory….
 When the CPU refers to memory and finds the word in cache, it is said to

produce a hit Otherwise, it is a miss

 The performance of cache memory is frequently measured in terms of a

quantity called hit ratio

 Hit ratio = hit / (hit+miss)

 If the hit ratio is high enough so that most of the time, the CPU accesses the

cache instead of main memory

 The basic characteristic of cache memory is its fast access time

 Therefore, very little or no time must be wasted when searching the words

in the cache
25
Cache memory….
 The transformation of data from main memory to cache memory is
referred to as a mapping process
 There are three types of mapping
 Associative mapping
 Direct mapping
 Set-associative mapping
 To help understand the mapping procedure, we have the following example

26
Cache memory….
Associative mapping
 The fastest and most flexible cache organization uses an associative memory

 The associative memory stores both the address and data of the memory word

 This permits any location in cache to store any word from main memory

 The address value of 15 bits is shown as a five digit octal number and its

corresponding 12bit word is shown as a four-digit octal number

 A CPU address of 15 bits is places in the argument register and the

associative memory searched for a matching address

 If the address is found, the corresponding 12bits data is read and sent to the
27 CPU
Cache memory….
 If not, the main memory is accessed for the word

 If the cache is full, an address-data pair must be displaced to make room for a

pair that is needed and not presently in the cache

28
Cache memory….
Direct mapping
 Associative memory is expensive compared to RAM

 In general case, there are 2k words in cache memory and 2n words in main

memory (in our case, k=9, n=15)

 The n bit memory address is divided into two fields: k-bits for the index and

n-k bits for the tag field

 The direct mapping cache organization uses the n-bit address to access the

main memory and the k-bit index to access the cache

 Each word in cache consists of the data word and its associated tag

29
Cache memory….
Direct mapping
Direct mapping operation
 When a new word is first brought into the cache, the tag bits are stored
alongside the data bits
 When the CPU generates a memory request, the index field is used for the
address to access the cache
 The tag field of the CPU address is compared with the tag in the word read
from the cache
 If the two tags match, there is a hit and the desired data word is in cache
 If there is no match, there is a miss and the required word is read from
main memory
 It is then stored in the cache together with the new tag, replacing the
previous value
30
Cache memory….
Direct mapping
 Example:

31
Cache memory….
Direct mapping
Example: continue….
✓ Suppose that the CPU now wants to access the word at address 02000
✓ The index address is 000, so it is sued to access the cache
✓ The two tags are then compared
✓ The cache tag is 00 but the address tag is 02, which does not produce a
match
✓ Therefore, the main memory is accessed and the data word 5670 is
transferred to the CPU
✓ The cache word at index address 000 is then replaced with a tag of 02
and data of 5670

32
Cache memory….
Set associative mapping
 The disadvantage of direct mapping is that two words with the same

index in their address but with different tag values cannot reside in
cache memory at the same time

 Set-Associative Mapping is an improvement over the direct-mapping in

that each word of cache can store two or more word of memory under
the same index address

 Each data word is stored together with its tag

 The number of tag-data items in one word of cache is said to form a set
33
Cache memory….
Set associative mapping

34
Virtual memory
 Virtual memory is a concept used in some large computer systems that

permit the user to construct programs as though a large memory space were
available, equal to the totality of auxiliary memory

 Virtual memory is used to give programmers the illusion that they have a

very large memory at their disposal, even though the computer actually has a
relatively small main memory

 A virtual memory system provides a mechanism for translating program-

generated addresses into correct main memory locations

35
Virtual memory….
 This is done dynamically, while programs are being executed in

the CPU

 The translation or mapping is handled automatically by the

hardware by means of a mapping table

 An address used by a programmer will be called a virtual address

 The set of such addresses the address space

 An address in main memory is called a location or physical address

 The set of such locations is called the memory space


36
Address mapping using pages
o Divide physical memory into fixed-sized blocks called frames.

o Divide Process into blocks of same size called pages

o Size is power of 2, between 512 bytes and 8,192 bytes

o Use a page table which contains base address of each page in physical memory

o To run a program of size n pages, need to find n free frames and load

program

o Set up a page table to translate logical to physical addresses

37
Address mapping using pages….
Basic operation
o When a process arrives the size in pages is examined

o Each page of process needs one frame

o If n frames are available, these are allocated, and page table is updated with frame

number

38
Address mapping using pages…
Address translation
o Address generated by CPU is divided into:
▪ Page number (p) – used as an index into a page table which contains base
address of each page in physical memory.
▪ Page offset (d) – combined with base address to define the physical memory
address that is sent to the memory unit
o Page number is an index to the page table.

o The page table contains base address of each page in physical memory.

o The base address is combined with the page offset to define the physical

address that is sent to the memory unit

39
Address mapping using pages…

40
Address mapping using pages…
 Assume:-

o page size=4 bytes


o physical memory = 32 bytes (8 pages)

➢ How a logical memory address can be mapped into physical memory?


 Example : Logical address 0(containing ‘a’)

 00000---→address of a.

▪ Page number=000(the 3 higher order bit)

▪ Offset number=00( the last 2 least bit)

o address a exist:

o on page 0.
41 • at offset 0.
Address mapping using pages…
 Then Indexing into the page table using page number, you can get page 0 is

in frame 5.
✓ Page number is changed into frame number; offset number is used as it is.

➔ Finally logical address 0 is mapped to physical 20, i.e. 20=[(5x4)+0]

42
?
Many thanks!!!
43

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