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MP8862

The MP8862 is a synchronous, integrated buck-boost converter with a wide input voltage range of 2.8V to 22V and a maximum output current of 2A. It features an I2C interface for programmable output voltage and current limits, along with multiple protection mechanisms including over-voltage and over-temperature protection. The device is available in a compact QFN-16 package and is suitable for various applications such as industrial systems and personal medical products.

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0% found this document useful (0 votes)
34 views32 pages

MP8862

The MP8862 is a synchronous, integrated buck-boost converter with a wide input voltage range of 2.8V to 22V and a maximum output current of 2A. It features an I2C interface for programmable output voltage and current limits, along with multiple protection mechanisms including over-voltage and over-temperature protection. The device is available in a compact QFN-16 package and is suitable for various applications such as industrial systems and personal medical products.

Uploaded by

Nguyen Hue
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

MP8862

2.8V-22V VIN, 2A IOUT, 4-Switch,


Integrated Buck-Boost Converter
with I2C Interface

DESCRIPTION FEATURES
The MP8862 is a synchronous, 4-switch,  Wide 2.8V to 22V Operating Input Voltage
integrated buck-boost converter capable of Range
regulating the output voltage across a 2.8V to  1V (1) to 20.47V Output Voltage Range (5V
22V wide input voltage range with high Default) with 10mV Resolution through I2C
efficiency.  2A Output Current or 4A Input Current
 Four Low RDS(ON) Internal Buck Power
The MP8862 uses constant-on-time (COT)
MOSFETs
control in buck mode and constant-off-time
control in boost mode, providing fast load  Adjustable Accurate CC Output Current
transient response and smooth buck-boost Limit with Internal Sensing MOSFET via I2C
mode transient. The MP8862 provides auto  500kHz (1) Switching Frequency
PFM/PWM or forced PWM switching modes,  Output Over-Voltage Protection (OVP)
and programmable output constant current (CC) Hiccup
current limit, which support flexible design for  Output Short-Circuit Protection (SCP) with
different applications. Hiccup Mode
 Over-Temperature Warning and Shutdown
Full protection features include over-current  I2C Interface with ALT Pin
protection (OCP), over-voltage protection
 Four Programmable I2C Addresses
(OVP), under-voltage protection (UVP),
 One-Time Programmable (OTP) Non-
programmable soft start, and thermal shutdown.
Volatile Memory
The MP8862 is available in a 16-pin QFN  I2C Programmable Line Drop Compensation,
(3mmx3mm) package. PFM/PWM Mode, Soft Start, and OCP, etc.
 EN Shutdown Discharge Programmable
 Available in a QFN-16 (3mmx3mm)
Package
APPLICATIONS
 Buck-Boost Bus Supplies
 Industrial Systems
 Personal Medical Products
 DSLR Cameras
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For
MPS green status, please visit the MPS website under Quality Assurance.
“MPS,” the MPS logo, and “Simple, Easy Solutions” are registered trademarks of
Monolithic Power Systems, Inc. or its subsidiaries.

Note:
1) For VOUT < 3V applications, the switching frequency decreases.

MP8862 Rev 1.0 www.MonolithicPower.com 1


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© 2019 MPS. All Rights Reserved.
MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

TYPICAL APPLICATION
C4 100nF
Efficiency
VIN = 12V, VOUT = 5V to 20V, L = 4.7µH,
VIN L1 4.7µH RDC = 19.5mΩ, forced PWM mode
12V BST1 SW1
100
IN C5 100nF
+ BST2
C1 C1A 95
100µF 22µF SW2
R3
499kΩ 90

EFFICIENCY (%)
VOUT
OUT
EN
C2A
+
C2 85
VCC
C7
22nF
MP8862 10µFx2 100µF
80
R4
499kΩ
ADD ALT 75
R5 VCC 2 SCL
Vo=12V
301kΩ I C slave 70
C3 SDA Vo=20V
1µF
Vo=9V
AGND GND OC 65
Vo=5V
C6
60
R1
21.5kΩ 22nF 0.01 0.1 1 10
OUTPUT CURRENT (A)

MP8862 Rev 1.0 www.MonolithicPower.com 2


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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

ORDERING INFORMATION
Part Number* Package Top Marking
MP8862GQ-xxxx** QFN-16 (3mmx3mm) See Below
MP8862GQ-0000 QFN-16 (3mmx3mm) See Below
EVKT-MP8862 Evaluation kit
* For Tape & Reel, add suffix –Z (e.g. MP8862GQ-XXXX–Z).
** “xxxx” is the configuration code identifier for the register setting stored in the OTP. The default number is “0000”.
Each “x” can be a hexadecimal value between 0 and F. Please work with an MPS FAE to create this unique
number, even if ordering the “0000” code. MP8862GQ-0000 is the default version.

TOP MARKING

BJT: Product code of MP8862GQ


Y: Year code
LLL: Lot number

EVALUATION KIT EVKT-MP8862


EVKT-MP8862 kit contents (items below can be ordered separately):

# Part Number Item Quantity

1 EV8862-Q-00A MP8862GQ-0000 evaluation board 1


Includes one USB to I2C communication interface, one
2 EVKT-USBI2C-02 1
USB cable, and one ribbon cable

Order directly from MonolithicPower.com or our distributors.

Input Power
Supply

Input

GUI USB Cable USB to I2C Ribbon Cable


Communication EV8862-Q-00A
Interface

Output

Load

Figure 1: EVKT-MP8862 Evaluation Kit Set-Up

MP8862 Rev 1.0 www.MonolithicPower.com 3


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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

PACKAGE REFERENCE
TOP VIEW
BST1 SW1 SW2 BST2
16

IN 1 OUT

GND GND

EN AGND

ADD VCC

SCL SDA OC ALT

QFN-16 (3mmx3mm)

PIN FUNCTIONS
Pin # Name Description
Supply voltage. IN is the drain of the internal power device and provides power to the
entire chip. The MP8862 operates from a 2.8V to 22V input voltage. A capacitor (CIN) is
1 IN
required to prevent large voltage spikes from appearing at the input. Place CIN as close to
the IC as possible.
Power ground. GND is the reference ground of the regulated output voltage. GND
2, 11 GND
requires extra care during PCB layout. Connect GND with copper traces and vias.
On/off control for entire chip. Drive EN high to turn on the chip. Drive EN low or float
3 EN
EN to turn off the device. EN has an internal 2MΩ pull-down resistor to ground.
I2C slave addresses program pin. Connect a resistor divider from VCC to ADD to set
4 ADD
four different I2C slave addresses.
5 SCL Clock pin of the I2C interface. SCL can support an I2C clock up to 3.4MHz.
6 SDA Data pin of the I2C interface.
7 OC Output constant current limit set pin.
8 ALT Alert output. ALT pulling to logic low indicates that a fault or warning has occurred.
9 VCC Internal 3.65V LDO regulator output. Decouple VCC with a 1µF capacitor.
10 AGND Analog ground. Connect AGND to GND.
12 OUT Output power pin. Place the output capacitor close to OUT and GND.
Bootstrap. Connect a 0.1µF capacitor between SW2 and BST2 to form a floating supply
13 BST2
across the high-side switch driver.
Switching node of the second half-bridge. Connect one end of the inductor to SW2 for
14 SW2
the current to run through the bridge.
Switching node of the first half-bridge. Connect one end of the inductor to SW1 for the
15 SW1
current to run through the bridge.
Bootstrap. Connect a 0.1µF capacitor between SW1 and BST1 to form a floating supply
16 BST1
across the high-side switch driver.

MP8862 Rev 1.0 www.MonolithicPower.com 4


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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

ABSOLUTE MAXIMUM RATINGS (2) Thermal Resistance θJA θJC


Supply voltage (VIN, VOUT) ........................... 24V QFN-16 (3mmx3mm)
VSW1, SW2 ............................ -0.3V (-7V for <10ns) EV8862-Q-00A (5) .................. 26 ........ 3.... °C/W
to VIN + 0.3V (26V for <10ns) JESD51-7 (6) .......................... 50 ....... 12 ... °C/W
VBST1, BST2 .............. VSWx + 4V (VSWx + 5V < 10ns)
VEN .................................................. -0.3V to 24V Notes:
2) Exceeding these ratings may damage the device.
VALT ..............................................-0.3V to +5.5V 3) The maximum allowable power dissipation is a function of
All other pins ...................................-0.3V to +4V the maximum junction temperature TJ (MAX), the junction-to-
Continuous power dissipation (TA = +25°C) (3) (5) ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
................................................................... 4.8W any ambient temperature is calculated by PD (MAX) = (TJ
Junction temperature ................................150°C (MAX) - TA) / θJA. Exceeding the maximum allowable power
Lead temperature .....................................260°C dissipation produces an excessive die temperature, and the
regulator goes into thermal shutdown. Internal thermal
Storage temperature ............... -65°C to +150°C shutdown circuitry protects the device from permanent
damage.
Recommended Operating Conditions (4) 4) The device is not guaranteed to function outside of its
operating conditions.
Operation input voltage range ......... 2.8V to 22V 5) Measured on EV8862-Q-00A, 4-layer PCB, 64mmx64mm.
Output voltage range ..................... 1V to 20.47V 6) Measured on JESD51-7, 4-layer PCB. The value of θJA given
Output current .................. 2A continuous current in this table is only valid for comparison with other packages
and cannot be used for design purposes. These values were
or 4A input current calculated in accordance with JESD51-7, and simulated on a
Operating junction temp (TJ). ... -40°C to +125°C specified JEDEC board. They do not represent the
performance obtained in an actual application.

MP8862 Rev 1.0 www.MonolithicPower.com 5


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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

OTP E-Fuse Selection Table by Default (MP8862GQ-0000)

OTP Items Default Value

Output voltage 5V

IOUT_LIMIT 3A (for 21.5kΩ OC resistor)

Switching frequency 500kHz

Mode Forced PWM mode

Soft-start time 900μs

Line drop compensation No line drop compensation

Output voltage discharge mode Enabled

OCP_OVP protection mode Hiccup mode

OTP configure code (ID1) 0x00

MP8862 Rev 1.0 www.MonolithicPower.com 6


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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

ELECTRICAL CHARACTERISTICS
VIN = 12V, VEN = 5V, TJ = -40°C to +125°C (7), typical value is tested at TJ = +25°C, unless otherwise
noted.
Parameter Symbol Condition Min Typ Max Units
Supply current (shutdown) IIN VEN = 0V 0 3 μA
Supply current (quiescent) IQ Non-switching, I2C sets PFM mode 1 mA
EN rising threshold VEN_Rising 1.00 1.10 1.20 V
EN hysteresis VEN_Falling 65 110 160 mV
EN to ground resistance REN VEN = 2V 2 MΩ
EN on to VOUT > 90% delay TDelay See Figure 8 900 μs
VCC regulator VCC 3.3 3.65 4 V
VCC load regulation VCC_LOG ICC = 10mA 1 %
VIN under-voltage lockout
VIN_UVLO 2.50 2.65 2.8 V
threshold rising
VIN under-voltage lockout
VUVLO_HYS 95 160 205 mV
threshold hysteresis
Power Converter
HS switch on resistance RDSON_HS Switch A, D 35 80 mΩ
LS switch on resistance RDSON_LSB Switch B, C 30 70 mΩ
Output voltage VOUT -1.5% 5.0 +1.5% V
Output discharge
RDIS 60 100 Ω
resistance
VEN = 0V, VSW1, SW2 = 22V, TJ = +25°C 1
Switch leakage SWLKG VEN = 0V, VSW1, SW2 = 22V, μA
5
TJ = -40°C to +125°C
Oscillator frequency Fs TJ = +25°C -20% 530 20% kHz
Minimum on time (8) TON_MIN1 Switch A, B, C, D 160 ns
Maximum duty cycle DMAX Buck mode, fREQ = 500kHz 85 %
Minimum duty cycle (8) DMIN Boost mode, fREQ = 500kHz 15 %
Protection
Output over-voltage
VOVP_R 150 160 170 %
protection
Output OVP recovery VOVP_F 130 140 150 %
Low-side B valley limit ILIMIT2 Switch B 6 8 10 A
Low-side C peak current
ILIMIT3 Switch C 10 A
limit
IOUT_LIM1 VOUT = 5V, over 0-125°C temp range 0.85 1 1.15 A
Output average current (8)
IOUT_LIM2 VOUT = 5V, over 0-125°C temp range -7.5% 3 7.5% A
Output UV threshold VUVP 20µs deglitch, UV falling 45% 50% 55% VREF

MP8862 Rev 1.0 www.MonolithicPower.com 7


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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

ELECTRICAL CHARACTERISTICS (continued)


VIN = 12V, VEN = 5V, TJ = -40°C to +125°C (7), typical value is tested at TJ = +25°C, unless otherwise
noted.
Parameter Symbol Condition Min Typ Max Units
ALT sink current capability ALT_LOW Sink 4mA 0.2 0.4 V
ALT leakage ALT_LKG VPULL = 5V 1 μA
Thermal shutdown rising
TSTD 150 °C
threshold (8)
Thermal hysteresis (8) TSTD_HYS 20 °C
2
I C Specification (8)

ADD voltage threshold 1 VADD_1 ADD pin float 69H


ADD voltage threshold 2 VADD_2 R4 = 499kΩ, R5 = 301kΩ 6BH
ADD voltage threshold 3 VADD_3 R4 = 301kΩ, R5 = 499kΩ 6DH
ADD voltage threshold 4 VADD_4 R4 = 100kΩ 6FH
ADD to GND pull-down
RADD 2 MΩ
resistor
Input logic high VIH I2C pull-up VDD can be 1.8V to 5V 1.4 V
Input logic low VIL 0.4 V
Output voltage logic low VOUT_L 0.4 V
SCL clock frequency fSCL 400 3400 kHz
SCL high time tHIGH 60 ns
SCL low time tLOW 160 ns
Data set-up time tSU.DAT 10 ns
Data hold time tHD.DAT 0 60 ns
Set-up time for (repeated)
tSU.STA 160 ns
start condition
Hold time for (repeated)
tHD.STA 160 ns
start condition
Bus free time between a
tBUF 160 ns
start and a stop condition
Set-up time for stop
TSU.STO 160 ns
condition
Rise time of SCL and SDA tR 10 300 ns
Fall time of SCL and SDA tF 10 300 ns
Pulse width of suppressed
tSP 0 50 ns
spike
Capacitance for each bus
CB 400 pF
line
Notes:
7) All min/max parameters are tested at TJ = 25°C. Limits over temperature are guaranteed by design, characterization, and correlation.
8) Guaranteed by engineering sample characterization.

MP8862 Rev 1.0 www.MonolithicPower.com 8


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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

TYPICAL PERFORMANCE CHARACTERISTICS


VIN = 12V, VOUT = 5V, L = 4.7µH, TA = 25°C, unless otherwise noted.
Load Regulation vs. Output Current Line Regulation vs. Input Voltage
VIN = 12V, VOUT = 5V/9V/12V/20V, VIN = 3V to 22V, VOUT = 5V, IOUT = 0A to 2A
IOUT = 0A to 2A, no line drop compensation
0.3 0.3
Vo=5V
LOAD REGULATION (%)

0.2 Vo=9V 0.2

LINE REGULATION (%)


Vo=12V
0.1 Vo=20V 0.1

0 0

-0.1 -0.1
Io=0A
-0.2 -0.2 Io=1A
Io=2A
-0.3 -0.3
0 0.5 1 1.5 2 3 6 9 12 15 18 21
OUTPUT CURRENT (A) INPUT VOLTAGE (V)

Line Regulation vs. Input Voltage Line Regulation vs. Input Voltage
VIN = 3V to 22V, VOUT = 9V, IOUT = 0A to 2A VIN = 3V to 22V, VOUT = 12V, IOUT = 0A to 2A
0.3 0.3
0.2
LINE REGULATION (%)

0.2
LINE REGULATION (%)

0.1
0.1
0
-0.1 0
-0.2
-0.1
-0.3 Io=0A Io=0A
Io=1A -0.2 Io=1A
-0.4 Io=2A Io=2A
-0.5 -0.3
3 6 9 12 15 18 21 3 6 9 12 15 18 21
INPUT VOLTAGE (V) INPUT VOLTAGE (V)

Line Regulation vs. Input Voltage Thermal Rising


VIN = 3V to 22V, VOUT = 20V, IOUT = 0A to 2A VIN = 12V, IOUT = 0A to 2A
0.4 14
0.3 12 Vout=5V
THERMAL RISE (℃)
LINE REGULATION (%)

0.2 Vout=9V
10
0.1
8
0
6
-0.1
Io=0A 4
-0.2
Io=1A 2
-0.3 Io=2A
-0.4 0
3 6 9 12 15 18 21 0 0.4 0.8 1.2 1.6 2
INPUT VOLTAGE (V) OUTPUT CURRENT (A)

MP8862 Rev 1.0 www.MonolithicPower.com 9


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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

TYPICAL PERFORMANCE CHARACTERISTICS (continued)


VIN = 12V, VOUT = 5V, L = 4.7µH, TA = 25°C, unless otherwise noted.
Recommended Maximum IOUT vs. VIN Recommended VIN, VOUT, IOUT
and VOUT with 120μF Low-ESR COUT Operation Range with 22μFx5
Capacitor Ceramic COUT Capacitor
2.5 2.5

2 2
IO_MAX (A)

IO_MAX (A)
1.5 1.5

1 Vo=5V 1
Vo=9V Vo=5V
0.5 Vo=12V 0.5 Vo=9V
Vo=20V Vo=12V
0 0
0 2 4 6 8 10 12 14 16 18 20 22 24 0 2 4 6 8 10 12 14 16 18 20 22 24
INPUT VOLTAGE (V) INPUT VOLTAGE (V)
Efficiency Efficiency
VIN = 12V, VOUT = 5V to 20V, L = 4.7µH, VIN = 12V, VOUT = 5V to 20V, L = 4.7µH,
RDC = 19.5mΩ, forced PWM mode RDC = 19.5mΩ, PFM mode
100 100
95 95
90 90
EFFICIENCY (%)

EFFICIENCY (%)

85 85
80 80
75 75
Vo=12V Vo=12V
70 Vo=20V 70 Vo=20V
Vo=9V Vo=9V
65 65 Vo=5V
Vo=5V
60 60
0.01 0.1 1 10 0.01 0.1 1 10
OUTPUT CURRENT (A) OUTPUT CURRENT (A)
Output Voltage vs. Temperature VIN UVLO Rising and Falling
Threshold vs. Temperature
6 3
VIN UVLO RISING AND FALLING

5.8
OUTPUT VOLTAGE (V)

5.6 2.5
5.4
THRESHOLD (V)

2
5.2
5 1.5
4.8
4.6 1
4.4
0.5 Rising
4.2
Falling
4 0
-60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
TEMPERATURE (°C)

MP8862 Rev 1.0 www.MonolithicPower.com 10


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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

TYPICAL PERFORMANCE CHARACTERISTICS (continued)


VIN = 12V, VOUT = 5V, L = 4.7µH, TA = 25°C, unless otherwise noted.

EN Rising and Falling Threshold vs. Output Voltage UVP Threshold vs.
Temperature Temperature
2 100
90
EN RISING AND FALLING

80

OUTPUT VOLTAGE UVP


1.5
THRESHOLD (V)

70

THRESHOLD (%)
60
1 50
40
0.5 30
Rising 20
Rising
Falling 10 Falling
0
0
-60 -40 -20 0 20 40 60 80 100
-60 -40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
TEMPERATURE (°C)

MP8862 Rev 1.0 www.MonolithicPower.com 11


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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

TYPICAL PERFORMANCE CHARACTERISTICS (continued)


VIN = 12V, VOUT = 5V, L = 4.7µH, TA = 25°C, test waveform is based on Figure 13, unless otherwise
noted.
EN Bit Enable through I2C EN Bit Enable through I2C
Command Command
Load = 0A Load = 2A

CH1: VOUT CH1: VOUT


5V/div. 5V/div.

CH2: VSW1 CH2: VSW1


10V/div. 10V/div.
CH3: VSW2 CH3: VSW2
10V/div. 20V/div.
CH4: IL CH4: IL
5A/div. 5A/div.

400μs/div. 2ms/div.

EN Bit Disable through I2C EN Bit Disable through I2C


Command Command
Load = 0A Load = 2A

CH1: VOUT CH1: VOUT


5V/div. 5V/div.

CH2: VSW1 CH2: VSW1


10V/div. 10V/div.
CH3: VSW2 CH3: VSW2
10V/div. 20V/div.
CH4: IL CH4: IL
2A/div. 5A/div.

20ms/div. 1ms/div.

VIN Power Off VIN Power Off


Load = 0A Load = 2A

CH1: VOUT CH1: VOUT


5V/div. 5V/div.

CH2: VSW1
CH2: VSW1
10V/div.
10V/div.
CH3: VSW2
CH3: VSW2
10V/div.
5V/div.
CH4: IL
1A/div. CH4: IL
5A/div.
20ms/div. 2ms/div.

MP8862 Rev 1.0 www.MonolithicPower.com 12


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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

TYPICAL PERFORMANCE CHARACTERISTICS (continued)


VIN = 12V, VOUT = 5V, L = 4.7µH, TA = 25°C, test waveform is based on Figure 13, unless otherwise
noted.
VIN Start-Up VIN Start-Up
Load = 10mA Load = 2A

CH1: VOUT CH1: VOUT


5V/div. 5V/div.

CH2: VSW1 CH2: VSW1


10V/div. 10V/div.
CH3: VSW2 CH3: VSW2
10V/div. 10V/div.

CH4: IL CH4: IL
2A/div. 5A/div.

1ms/div. 1ms/div.

EN Pin Enable EN Pin Enable


Load = 0A Load = 2A

CH1: VOUT CH1: VOUT


5V/div. 5V/div.

CH2: VSW1 CH2: VSW1


10V/div. 10V/div.
CH3: VSW2 CH3: VSW2
10V/div. 20V/div.

CH4: IL CH4: IL
5A/div. 5A/div.

400μs/div. 400μs/div.

EN Pin Disable EN Pin Disable


Load = 0A Load = 2A

CH1: VOUT CH1: VOUT


5V/div. 5V/div.
CH2: VSW1
10V/div. CH2: VSW1
10V/div.
CH3: VSW2 CH3: VSW2
5V/div. 20V/div.

CH4: IL CH4: IL
5A/div. 2A/div.

2ms/div. 400μs/div.

MP8862 Rev 1.0 www.MonolithicPower.com 13


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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

TYPICAL PERFORMANCE CHARACTERISTICS (continued)


VIN = 12V, VOUT = 5V, L = 4.7µH, TA = 25°C, test waveform is based on Figure 13, unless otherwise
noted.
Steady State Steady State
VOUT = 5V, load = 0A VOUT = 5V, load = 2A

CH1: CH1:
VOUT/AC VOUT/AC
50mV/div. 20mV/div.
CH2: VSW1 CH2: VSW1
10V/div. 10V/div.
CH3: VSW2
CH3: VSW2 20V/div.
5V/div.
CH4: IL CH4: IL
1A/div. 2A/div.

1μs/div. 2μs/div.

Steady State Steady State


VOUT = 9V, load = 0A VOUT = 9V, load = 2A

CH1:
CH1: VOUT/AC
VOUT/AC 20mV/div.
50mV/div.
CH2: VSW1 CH2: VSW1
10V/div. 10V/div.
CH3: VSW2
CH3: VSW2 20V/div.
10V/div.
CH4: IL
CH4: IL
1A/div.
2A/div.
1μs/div. 2μs/div.

Steady State Steady State


VOUT = 12V, load = 0A VOUT = 12V, load = 2A

CH1:
CH1: VOUT/AC
VOUT/AC 100mV/div.
50mV/div.
CH2: VSW1 CH2: VSW1
10V/div. 10V/div.
CH3: VSW2
CH3: VSW2 20V/div.
10V/div.
CH4: IL
CH4: IL
2A/div.
2A/div.
2μs/div. 2μs/div.

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

TYPICAL PERFORMANCE CHARACTERISTICS (continued)


VIN = 12V, VOUT = 5V, L = 4.7µH, TA = 25°C, test waveform is based on Figure 13, unless otherwise
noted.
Load Transient Load Transient
VIN = 12V, VOUT = 5V, no line drop VIN = 12V, VOUT = 5V, no line drop
compensation, 0A to 2A, 150mA/μs compensation, 0A to 1A, 150mA/μs

CH1:
VOUT/AC CH1:
200mV/div. VOUT/AC
100mV/div.

CH4: IOUT
1A/div. CH4: IOUT
500mA/div.

400μs/div. 400μs/div.

Load Transient OCP Entry


VIN = 12V, VOUT = 5V, no line drop VIN = 12V, VOUT = 5V, latch-off mode
compensation, 1A to 2A, 150mA/μs

CH1: VOUT
5V/div.
CH1:
VOUT/AC
CH2: VSW1
100mV/div. 10V/div.

CH3: VSW2
CH4: IOUT 5V/div.
1A/div. CH4: IL
5A/div.
400μs/div. 4ms/div.

OCP Entry OCP Recovery


VIN = 12V, VOUT = 5V, hiccup mode VIN = 12V, VOUT = 5V, hiccup mode

CH1: VOUT
5V/div. CH1: VOUT
5V/div.
CH2: VSW1
10V/div. CH2: VSW1
10V/div.
CH3: VSW2 CH3: VSW2
10V/div. 20V/div.

CH4: IL CH4: IL
5A/div. 10A/div.

10ms/div. 2ms/div.

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

TYPICAL PERFORMANCE CHARACTERISTICS (continued)


VIN = 12V, VOUT = 5V, L = 4.7µH, TA = 25°C, test waveform is based on Figure 13, unless otherwise
noted.
SCP Entry SCP Entry
VIN = 12V, VOUT = 5V, latch-off mode VIN = 12V, VOUT = 5V, hiccup mode

CH1: VOUT CH1: VOUT


5V/div. 5V/div.

CH2: VSW1 CH2: VSW1


10V/div. 10V/div.
CH3: VSW2 CH3: VSW2
10V/div. 10V/div.
CH4: IL CH4: IL
10A/div. 10A/div.

200μs/div. 2ms/div.

SCP Recovery SCP Steady


VIN = 12V, VOUT = 5V, hiccup mode VIN = 12V, VOUT = 5V, hiccup mode

CH1: VOUT CH1: VOUT


5V/div. 5V/div.

CH2: VSW1 CH2: VSW1


10V/div. 10V/div.
CH3: VSW2 CH3: VSW2
10V/div. 10V/div.
CH4: IL CH4: IL
10A/div. 5A/div.

2ms/div. 1ms/div.

CC Current Limit Steady State OVP


VIN = 12V, VOUT = 5V, IOUT = 0A, hiccup mode

CH1: VOUT CH1: VOUT


5V/div. 5V/div.

CH2: VSW1 CH2: VSW1


10V/div. 10V/div.
CH3: VSW2
CH3: VSW2 10V/div.
10V/div. CH4: IL
CH4: IL 5A/div.
2A/div.
1μs/div. 1s/div.

TYPICAL PERFORMANCE CHARACTERISTICS (continued)


VIN = 12V, VOUT = 5V, L = 4.7µH, TA = 25°C, test waveform is based on Figure 13, unless otherwise
noted.

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

OVP I2C VID


VIN = 12V, VOUT = 5V, IOUT = 0A, latch-off mode VIN = 12V, VOUT = 9V to 5V, IOUT = 0A

CH1: VOUT
5V/div.
CH1: VOUT
CH2: VSW1 5V/div.
10V/div. CH2: VSW1
10V/div.
CH3: VSW2
CH3: VSW2
5V/div.
10V/div.
CH4: IL
CH4: IL
2A/div.
2A/div.
1s/div. 20ms/div.

I2C VID I2C VID


VIN = 12V, VOUT = 5V to 9V, IOUT = 0A VIN = 12V, VOUT = 9V to 5V, IOUT = 2A

CH1: VOUT
5V/div.
CH1: VOUT
5V/div. CH2: VSW1
CH2: VSW1 10V/div.
10V/div.
CH3: VSW2 CH3: VSW2
10V/div. 10V/div.
CH4: IL CH4: IL
2A/div. 2A/div.

20ms/div. 20ms/div.

I2C VID
VIN = 12V, VOUT = 5V to 9V, IOUT = 2A

CH1: VOUT
5V/div.

CH2: VSW1
10V/div.

CH3: VSW2
10V/div.
CH4: IL
2A/div.
20ms/div.

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

FUNCTIONAL BLOCK DIAGRAM

IN

OUT Bootstrap
Regulator BST1
VCC
On A
Timer
SCL DAC
I2C/OTP
SW1
IF &
SDA A, B, C, D
Register
FET Sensing B
ALT
ADD GND
Buck-Boost IN
Control Bootstrap
EN Regulator OUT
2MΩ Logic
COMP BST2
Rup

OUT D
Rdown

SW2
SS

PG & OVP C
OV

GND

OC AGND

Figure 2: Functional Block Diagram

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

OPERATION
The MP8862 is a 4-switch, integrated buck- SWA turns on. SWA turns on for a fixed on-time
boost converter that works in constant-on-time period before turning off. Then SWB turns on
(COT) mode with fixed frequency, which again, and the operation repeats. The COMP
provides fast transient response for buck, signal is the error amplifier (EA) output from the
boost, and buck-boost modes. One special VOUT feedback and internal FB reference
buck-boost control strategy provides high voltage (see Figure 5).
efficiency over the full input range and smooth SW1
transient between different modes.
SW2
Buck-Boost Operation
The MP8862 can regulate the output to be IL
above, equal to, or below the input voltage. tON COMP
Figure 3 shows that the 1-inductor, 4-switch
Control by COMP
power structure can operate in buck mode,
boost mode, or buck-boost mode with different Figure 5: Buck Waveform
VIN inputs (see Figure 4).
Boost Mode (VIN < VOUT)
VIN VOUT
When the input voltage is significantly lower
than the output voltage, the MP8862 works in
SWA SWD
boost mode. In boost mode, SWC and SWD
switch for boost regulation. SWB is off, and
SW1 SW2
SWA remains on to conduct the inductor
current.
SWB SWC
SWC remains off with COT control in each
period, while SWD turns on as a complement to
SWC to boost the inductor current to the output.
In each cycle, SWC turns on to conduct the
Figure 3: Buck-Boost Topology inductor current. When the inductor current
rises and reaches VCOMP, SWC turns off and
Boost Buck-Boost Buck SWD turns on. SWC turns off with a fixed off-
SWA On, SWB Off, All FET D On, C Off, time before turning on again. During this period,
SWC and SWD Switching A and B Switching SWD turns on for the current freewheel (see
Switching Figure 6).
VO-SET
VIN Voltage
Boost Boost Buck Buck
DMAX DMIN DMAX DMIN
Figure 4: Buck-Boost Operation Range
Buck Mode (VIN > VOUT)
When the input voltage is significantly higher
than the output voltage, the MP8862 works in
buck mode. In buck mode, SWA and SWB Figure 6: Boost Waveform
switch for buck regulation. SWC is off, and
Buck-Boost Mode (VIN ≈ VOUT)
SWD remains on to conduct the inductor
current. When VIN is close to VOUT, the converter may be
unable to provide enough energy to operate in
SWA works with COT control logic, and SWB buck mode due to SWA’s minimum off time, or
turns on as a complement to SWA. In each the converter may supply too much power to
cycle, SWB turns on to conduct the inductor
current. When the inductor current drops to the
COMP voltage (VCOMP), SWB turns off, and
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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

VOUT in boost mode due to SWC’s minimum on SW1 tBuck-Min


time. The MP8862 uses buck-boost control to
regulate the output in these conditions.
SW2
In buck mode, if VIN falls and the SWA off
period is close to the buck minimum off time, Boo st Min On Time
COMP
buck-boost mode is engaged. When the next IL
cycle starts after the SWA and SWD on period
(buck high-side MOSFET (HS-FET) on period), Boo st Buck-Boo st
tBuck-Boo st
boost starts with SWA and SWC on (boost low-
side MOSFET (LS-FET) on). SWA and SWD Boost to Buck-Boost Transient
turn on again for the rest of the boost period Figure 7: Buck-Boost Waveform
(boost HS-FET on). After the boost period In buck-boost mode, if VIN exceeds 130% of
elapses, the buck period starts, and SWB and VOUT, the MP8862 switches from buck-boost
SWD remain on until the inductor current drops mode to buck mode. If VIN is below 20% of VIN,
to VCOMP. Then SWA and SWD turn on until the it switches from buck-boost mode to boost
next boost period begins. Buck and boost mode.
switching work with a one-interval period. This
is called buck-boost mode. Working Mode Selection
The MP8862 works with a fixed frequency in
In boost mode, if VIN rises and the SWC on
heavy-load condition. When the load current
period is close to the boost minimum on time,
decreases, the MP8862 can work in forced
buck-boost mode is engaged. After the boost
continuous conduction mode (FCCM) or pulse-
constant-off-time period (SWA and SWD on),
skip mode (PSM) based on the MODE register
SWB and SWD remain on until the inductor
setting.
current signal drops to VCOMP, just like a buck off
period control. After the inductor current signal FCCM (or Forced PWM)
triggers VCOMP, SWA and SWD turn on for the In FCCM condition, the buck on time and boost
buck on time, which is followed by a boost off time are determined by the internal circuit to
switching (SWA and SWC on). Buck and boost achieve a fixed frequency based on the VIN/VOUT
switching work with a one-interval period. ratio. When the load decreases, the average
Figure 7 shows the buck-boost waveform for input current drops, and the inductor current
both VIN > VOUT and VIN < VOUT. may go negative from VOUT to VIN during the off
time (SWD on). This forces the inductor current
SW1
to work in continuous mode with a fixed
frequency, producing a lower VOUT ripple than in
SW2 tBoo st-Min PSM mode.
PSM (Auto PFM/PWM Mode)
Buck Min Off Time
In PSM condition, once the inductor current
IL
COMP
drops to 0A, SWD turns off to prevent the
current from flowing from VOUT to VIN, forcing the
Buck Buck-Boo st
tBuck-Boo st inductor current to work in discontinuous
Buck to Buck-Boost Transient conduction mode (DCM). Simultaneously, the
internal off-time clock stretches once the
MP8862 enters DCM mode. The frequency
drops when the inductor current conduction
period decreases, helping to save power loss
and reduce the VOUT ripple.
If VCOMP drops to the PSM threshold, even if the
IC stretches the frequency, the MP8862 stops
switching to decrease switching power loss.

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

The MP8862 recovers switching once VCOMP Internal Soft Start (SS)
rises above the PSM threshold. The switching Soft start (SS) prevents the converter output
pulse skips based on VCOMP in very light-load voltage from overshooting during start-up.
condition. PSM has a much higher efficiency When the chip starts up, the internal circuitry
than FCCM mode in light load, but the VOUT generates a SS voltage that ramps up from 0V
ripple may be higher due to the group switching to 3.6V. When SS is lower than VREF, the error
pulse. amplifier uses SS as the reference. When SS is
Internal VCC Regulator higher than VREF, the error amplifier uses VREF
as the reference.
The 3.65V internal regulator powers most of the
internal circuitries. This regulator takes VIN and If the output of the MP8862 is pre-biased to a
operates in the full VIN range. When VIN certain voltage during start-up, the IC disables
exceeds 3.65V, the output of the regulator is in the switching of both the high-side and low-side
full regulation. If VIN is less than 3.65V, the switches until the voltage on the internal SS
output decreases with VIN. VCC requires an capacitor exceeds the internal feedback voltage
external 1µF ceramic capacitor for decoupling. (see Figure 9).
Enable Control (EN)
The MP8862 has an enable control pin (EN). EN
Pull EN high to enable the IC. Pull EN low or 90%
VOUT
float EN to disable the IC.
tDELA Y
If EN is pulled down when the output discharge
function is enabled, the MP8862 completely Figure 9: EN On to VOUT > 90% Delay
shuts down after 55ms. The MP8862’s I2C
register value is reset to default only after the Output Constant Current Limit (OCP)
MP8862 completely shuts down. If EN is pulled The MP8862 has a constant-current limit
high within 55ms, the I2C register is not reset, control loop to limit the output average current.
and the MP8862 enables the output with The current information is sensed from switches
previous register setting. A, B, C, and D. Then an average algorithm is
used to calculate the output current.
If the output discharge function is disabled, the
MP8862 completely shuts down once EN is When the output current exceeds the current-
pulled down for more than 100µs, and the limit threshold, the output voltage starts to drop.
MP8862 I2C register is reset after a 100µs If VOUT drops below the under-voltage (UV)
delay. threshold (typically 50% below the reference),
VOUT = 12V (I2C Setting) VOUT = 12V (I2C Setting)
the MP8862 enters hiccup mode or latch-off
mode, according to the I2C setting.
VOUT = 5V (I2C Reset)
In hiccup mode, the MP8862 stops switching
and recovers automatically with 12.5% duty
EN EN Off
< 55ms
cycles. In latch-off mode, the MP8862 stops
EN Off > 55ms switching until the IC restarts (VIN, EN, or EN bit
toggle).
Figure 8: EN On/Off Logic for I2C Register Reset
Over-Voltage Protection (OVP)
Under-Voltage Lockout (UVLO) The MP8862 monitors a resistor-divided
Under-voltage lockout (UVLO) protects the chip feedback voltage to detect output over-voltage.
from operating at an insufficient supply voltage. When the feedback voltage exceeds 160% of
The UVLO comparator monitors the input the target voltage, the over-voltage protection
voltage and enables or disables the entire IC. (OVP) comparator output goes high, and the
output-to-ground discharge resistor turns on.

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

The OUT pin has an absolute OVP function. I2C INTERFACE


Once VOUT is higher than the absolute OVP
I2C Serial Interface Description
threshold (23V), the MP8862 stops switching
and turns on the OUT-to-ground discharge The I2C is a 2-wire, bidirectional, serial interface
resistor. consisting of a data line (SDA) and a clock line
(SCL). The lines are pulled to a bus voltage
Start-Up and Shutdown externally when they are idle. When connecting
If both VIN and EN exceed their respective to the line, a master device generates the SCL
thresholds, the chip is enabled. The reference signal and device address, and arranges the
block starts first, generating a stable reference communication sequence. The MP8862
voltage and current, and then the internal interface is an I2C slave that supports fast mode
regulator is enabled. The regulator provides a (400kHz) and high-speed mode (3.4MHz). The
stable supply for the remaining circuitries. I2C interface adds flexibility to the power supply
solution. The output voltage, transition slew
Three events can shut down the chip: EN low,
rate, and other parameters can be controlled
VIN low, and thermal shutdown. During
via the I2C interface. When the master sends
shutdown, the signaling path is blocked to avoid
the address as an 8-bit value, the 7-bit address
any fault triggering. Then VCOMP and the internal
should be followed by a 0 or 1 to indicate a
supply rail are pulled down. The floating driver
write or read operation.
is not subject to this shutdown command.
Start and Stop Conditions
Output Discharge
The start and stop conditions are signaled by
The MP8862 has an output discharge function
the master device, which signifies the beginning
that provides a resistive discharge path for the
and end of an I2C transfer. The start condition is
external output capacitor. The function is active
defined as the SDA signal transitioning from
when the part is disabled (input voltage is under
high to low while the SCL is high. The stop
UVLO or EN is off), and the discharge path is
condition is defined as the SDA signal
turned off when VOUT < 50mV or the 50ms
transitioning from low to high while the SCL is
maximum timer passes. This function can also
high (see Figure 10). The master then
be disabled via the I2C.
generates the SCL clocks and transmits the
Over-Temperature Warning (OTW) and device address and read/write direction bit
Thermal Shutdown (TSD) (R/W) on the SDA line.
Thermal warning and thermal shutdown prevent Transfer Data
the part from operating at exceedingly high
Data is transferred in 8-bit bytes by an SDA
temperatures. When the silicon die temperature
line. Each byte is followed by an acknowledge
exceeds 120°C, the MP8862 sets the OTW
bit.
bit[D5] to 1. When the temperature falls below
its lower threshold (typically 100°C), the OTW I2C Update Sequence
bit[D5] is 0. The MP8862 requires a start condition, a valid
When the silicon die temperature exceeds I2C address, a register address byte, and a data
150°C, the entire chip shuts down. When the byte for a single data update. The MP8862
temperature falls below its lower threshold acknowledges the receipt of each byte by
(typically 130°C), the chip is enabled. This is a pulling the SDA line low during the high period
non-latch protection. of a single clock pulse. A valid I2C address
selects the part. It performs an update on the
falling edge of the LSB byte. Page 23 shows
examples of an I2C write and read sequence.
I2C Start-Up Timing
The I2C function is enabled when VIN > UVLO
and EN is active. The function continues to
work during OCP, OVP, and thermal shutdown.

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

Figure 10: Start and Stop Condition

8 bits 8 bits 8 bits

S Slave Address WR A Register Address K A Write Data A P

Master to Slave A = Acknowledge (SDA = LOW) S = Start Condition WR Write = 0

Slave to Master NA = NOT Acknowledge (SDA = HIGH) P = Stop Condition RD Read = 1

I2C Write Example – Write Single Register

8 bits 8 bits 8 bits

S Slave Address WR A Register Address K A Write Data K A Write Data K+1 A Write Data K+N A P

Multi-byte write executed from current register location


(the read-only register will be skipped)
Master to Slave A = Acknowledge (SDA = LOW) S = Start Condition WR Write = 0

Slave to Master NA = NOT Acknowledge (SDA = HIGH) P = Stop Condition RD Read = 1


I2C Write Example – Write Multi Register

8 bits 8 bits 8 bits 8 bits

S Slave Address WR A Register Address K A Sr Slave Address RD A Read Data K NA P

Register address to read specified Read register data from current register location

Master to Slave A = Acknowledge (SDA = LOW) S = Start Condition Sr = Repeat WR Write = 0


Start Condition
Slave to Master NA = NOT Acknowledge (SDA = HIGH) P = Stop Condition RD Read = 1

I2C Read Example – Read Single Register

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

I2C REGISTER MAP


ADD
NAME R/W D7 D6 D5 D4 D3 D2 D1 D0
(HEX)

00 VOUT_L R/W Reserved VOUT DATA BIT LOW [2:0]*

01 VOUT_H R/W VOUT DATA BIT HIGH [10:3]*


PG_
GO_
02 VOUT_GO R/W RESERVED DELAY_
BIT
EN*
OUTPUT CURRENT LIMIT THRESHOLD (0A-4A/50mA STEP FOR 21.5K OC
03 IOUT_LIM R/W Reserved
RESISTOR)*
HICCUP DISCHG
04 CTL1 R/W EN* MODE* FREQ Reserved
OCP_OVP* _EN*
05 CTL2 R/W LINE DROP COMP* SS* Reserved
06 RESERVED R Reserved, ALL “0” Reserved
07 RESERVED R Reserved
08 RESERVED R Reserved
09 Status R PG OTP OTW CC_CV Reserved
OT OT PG_
OTEMPP_ OC_ OC_ UVP_ OTEMP
0A Interrupt W1C WARNING_ WARNING RISING
ENTER ENTER RECOVER FALLING P_EXIT
ENTER _EXIT
RESERVED OTWMSK* OC_ UVP_ PG_
0B Mask R/W OTPMSK*
MSK* MSK* MSK*
0C ID1 R OTP configure code. "0x00" means standard MP8862, “0x01” means MP8862-0001 part number*
27 MFR_ID R MANUFACTURER ID: b ‘0000 1001’
28 DEV_ID R DEVICE ID: b ‘0101 1000’
29 IC_REV R IC REVISION: b ‘0000 0001’

Note:
* These items have one-time programmable (OTP) non-volatile memory. The OTP is reloaded to the I2C register during VIN > UVLO or EN
shutdown.

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

REGISTER DESCRIPTION
I2C Bus Slave Address
A resistor-divider from VCC to GND can achieve an accurate reference voltage. Connect ADD to this
reference voltage to set different I2C addresses. The internal circuit changes the I2C address
accordingly. Table 1 shows the four voltage thresholds for the four I2C addresses, and recommended
resistor settings.
Table 1: I2C Address Setting via ADD Voltage
ADD Upper ADD Lower I2C Address
ADD Voltage Resistor R4 Resistor R5
(kΩ) (kΩ) Binary Hex
<25%VCC No connection No connection 1101 001 69H
25% to 50% VCC 499 301 1101 011 6BH
50% to 75% VCC 301 499 1101 101 6DH
>75% VCC 100 No connection 1101 111 6FH

VOUT Setting
The registers VOUT_L and VOUT_H set the output voltage and follow the 11-bit direct format below.
Name VOUT
Format Direct, unsigned binary integer
Register Name N/A VOUT_H D[7:0] VOUT_L D[2:0]
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Access N/A R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Function N/A Data bit high Data bit low
Default Value
N/A 500 integer
(5V)
The output voltage can be calculated with Equation (1):
VOUT (V) = V / 100 (1)
Where V is an 11-bit unsigned binary integer of VOUT[10:0], and V ranges from 0 to 2047. The VOUT
resolution is 10mV/LSB.
Inside the MP8862, there is a feedback resistor network from OUT to the internal FB reference voltage.
The feedback resistor ratio is VOUT / VFB = 12.5. The output voltage change slew rate is fixed at 1mV/µs.
Refer to the GO_BIT bit when implementing the output voltage change.
VOUT_GO Register
GO_BIT D[0]
The MP8862 can be controlled when to VOUT begins to change. Set GO_BIT to 1 to start the output
change based on the VOUT register. When the VOUT change is complete (internal VREF steps to the goal
of VREF), GO_BIT auto-resets to 0. This prevents a false operation of the VOUT scaling.
Write the output voltage (0x00 and 0x01 registers) first, and then write GO_BIT = 1. VOUT changes
based on the new register setting. GO_BIT resets to 0 when VOUT reaches a new value. The host can
read GO_BIT to determine if the VOUT scaling is finished or not.
The VOUT-to-ground discharge function is enabled when GO_BIT is 1. This can help ramp VOUT from
high to low in light-load condition.
When GO_BIT is 0, VOUT will not change. When GO_BIT is 1, VOUT changes based on the VOUT register
setting. After VOUT scaling finishes, GO_BIT is reset to 0 automatically.

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

PG_DELAY_EN D[1]
When PG_DELAY_EN D[1] is 0, there is no delay on PG. When PG_DELAY_EN D[1] is 1, PG
experiences a 100µs rising delay. The default value is 0.
IOUT_LIM Register
Set the output current limit threshold.
Name IOUT_LIM
Format Direct, unsigned binary integer
Bit 7 6 5 4 3 2 1 0
Access N/A R/W R/W R/W R/W R/W R/W R/W
Default Value (3A) N/A 60 integer

IOUT_OC can be calculated with Equation (2):


IOUT_OC (A) = IOUT_LIM * 0.05 (2)
Where IOUT_LIM is a 7-bit unsigned binary integer of IOUT_LIM D[6:0]. The IOUT_OC resolution is
50mA/LSB (maximum value is 4A or 0x50).
The OC pin-to-ground resistor should be 21.5kΩ when using the above IOUT_LIM register. A 22nF
(C6) filter capacitor should be added on OC to keep the CC loop stable. The MP8862 directly supports
the I2C setting IOUT_LIM. If the CC threshold needs to be changed dynamically after the MP8862 has
already entered the CC limit operation state, it is recommended to change the CC threshold step-by-
step (e.g. 50mA per step) instead of changing the current value directly to the final value.
CTL1 Register
NAME BITS DEFAULT DESCRIPTION
I2C-controlled, turns the part on or off. When the external EN pin is low, the
converter is off, and the I2C shuts down. When EN is high, the EN bit takes over.
EN D[7] 1
1: Part is turned on. Default
0: Part is turned off. I2C register does not reset
Over-current and over-voltage protection mode selection.
HICCUP
D[6] 1 1: Hiccup mode
OCP_OVP
0: Latch-off mode
Output discharge enable bit.
DISCHG_EN D[5] 1 1: Output discharge function during EN or VIN shutdown
0: No discharge output during shutdown
Default is PWM mode for light load.
MODE D[4] 1 0: Enables auto PFM/PWM mode
1: Sets forced PWM mode
Sets the switching frequency.
FREQ D[3:2] 00 00: 500kHz
01, 10, 11: Reserved

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

CTL2 Register
NAME BITS DEFAULT DESCRIPTION
Sets the output voltage compensation vs. the load feature.
00: No compensation
LINE 01: VOUT compensates 100mV @ 2A IOUT
DROP D[7:6] 00 10: VOUT compensates 200mV @ 2A IOUT
COMP 11: VOUT compensates 400mV @ 2A IOUT
The above compensation amplitude is fixed for any output voltage. Line drop
compensation is only enabled for VOUT ≥ 5V.
Sets the output start-up soft-start timer (from 0 to 100%). For 5V output voltage:
00: 300µs
01: 500µs
SS D[5:4] 11 10: 700µs
11: 900µs
The SS slew rate is constant, but changes for different VOUT values.

Status Register
NAME BITS DEFAULT DESCRIPTION
Output power good indication.
PG D[7] X 0: Output power is not good
1: Output power is good
Over-temperature protection indication.
OTP D[6] X 0: Normal state
1: Chip is in over-temperature protection state These status bits
Over-temperature warning indication. indicate instantaneous
value.
OTW D[5] X 0: Normal state
1: Chip is in-over temperature warning state
The chip works in constant-current output mode or constant-
CC_ voltage output mode.
D[4] X
CV 0: CV mode
1: CC mode

Interrupt Register
NAME BITS DESCRIPTION
Over-temperature protection entry indication. When this bit is high,
OTEMPP_ the IC enters thermal shutdown. This bit is not masked, even if
D[7] OTPMSK = 1. OTPMSK = 1 only masks the interrupt pin’s output
ENTER
(ALT).
Die temperature early warning entry bit. When this bit is high, the die
OTWARNING_ temperature is above 120˚C. This bit is not masked, even if
D[6] OTWMSK = 1. OTWMSK = 1 only masks the interrupt pin’s output
ENTER
(ALT). This bit is latched once
Entry of OC or CC current-limit mode. The OC_MSK bit can enable triggered.
OC_ENTER D[5] or disable OC_ENTER and OC_RECOVER alert output.
Write 0xFF to this
Recovery from CC current-limit mode. Recovering from a hiccup will
OC_RECOVER D[4] not trigger this interrupt signal.
register to reset the
interrupt (ALT) pin’s
UVP_FALLING D[3] Output voltage is in under-voltage protection. state.
Over-temperature protection exit. OTPMSK can mask off the ALT of
OTEMPP_EXIT D[2] this bit.
Die temperature early warning exit bit. When the die temperature is
OTWARNING_ lower than 100°C, this bit is set to 1. This bit is not masked, even if
D[1] OTWMSK = 1. OTWMSK = 1 only masks the interrupt pin’s output
EXIT
(ALT).
PG_RISING D[0] Output power good rising edge.

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

MSK Register
NAME BITS DEFAULT DESCRIPTION
SET OTPMSK = 1 to mask off the OTP alert. OTPMSK = 1 only masks the interrupt
OTPMSK D[4] 0 pin’s output (ALT). This is not the interrupt register, but is similar for other mask bits.
OTWMSK D[3] 0 Masks off the over-temperature warning.
OC_MSK D[2] 0 Masks off both OC/CC entry and recovery.
UVP_MSK D[1] 0 Masks off the output UVP interrupt.
Masks off the PG indication function on ALT.
PG_MSK D[0] 0 1: ALT pin does not indicate a PG event
0: ALT indicates a PG rising event

OTEMPP_ENTER
OTWARNING_ENTER
OC_ENTER
Event

ALT Pin
Active Low

Write 0xFF to 0A Reg Can OTEMPP_EXIT


Reset ALT Pin OTWARNING_EXIT
OC_RECOVER
Event

Figure 11: ALT Behavior of OTP, OT Warning, and OC Recovery

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

APPLICATION INFORMATION
Component Selection Input and Output Capacitor Selection
Selecting the Inductor It is recommended to use ceramic capacitors
In a buck-boost topology circuit, the inductor plus an electrolytic capacitor for input and
must support buck applications with the output capacitors, to filter the input and output
maximum input voltage, and boost applications ripple current and achieve stable operation.
with the minimum input voltage. Two critical Since the input capacitor absorbs the input
inductance values can be determined according switching current, it requires sufficient
to the buck mode and boost mode current ripple capacitance. For most applications, a 100µF
using Equation (2) and Equation (3): electrolytic capacitor plus a 22µF ceramic
VOUT  (VIN(MAX)  VOUT ) capacitor are sufficient.
LMINBUCK  (2) The output capacitor stabilizes the DC output
VIN(MAX)  fREQ  IL
voltage. Low-ESR capacitors and a sufficient
VIN(MIN)  (VOUT  VIN(MIN) ) capacitor value are recommended to limit the
LMINBOOST  (3) output voltage ripple. Considering the ceramic
VOUT  fREQ  IL DC voltage derating, if the output voltage is less
Where fREQ is the switching frequency, and ∆IL than 12V, the minimum COUT should be 22µFx5
is the peak-to-peak inductor current ripple. As a ceramic. If the output voltage is greater than
rule of thumb, the peak-to-peak ripple can be 12V, use a 100µF low-ESR (≤80mΩ) aluminum
set as 0.5A to 1.5A of the inductor current. The electrolytic or polymer capacitor and two 10µF
minimum inductor value for the application must ceramic capacitors.
be higher than both the Equation (2) and The input and output ceramic capacitors must
Equation (3) results. be placed as close as possible to the device.
In addition to the inductance value, to avoid
saturation, the inductor must support the peak
current based on Equation (4) and Equation (5):
VOUT  (VIN(MAX)  VOUT )
IPEAK BUCK  IOUT  (4)
2  VIN(MAX)  fREQ  L

VOUT  IOUT VIN(MIN)  (VOUT  VIN(MIN) )


IPEAK BOOST   (5)
 VIN(MIN) 2  VOUT  fREQ  L

Where η is the estimated efficiency of the


MP8862.

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

PCB Layout Guidelines (9)


Efficient PCB layout is critical for stable

SW2
operation and thermal dissipation. For best L1

SW1
results, refer to Figure 12 and follow the
guidelines below:
1. Place the ceramic CIN and COUT capacitors
close to the IC’s VIN-to-GND and OUT-to- OUT
GND pins, respectively.
VIN
2. Use a large copper plane for PGND.
GND
3. Add multiple vias to improve thermal
dissipation.
4. Connect AGND to PGND.
5. Use short, direct, and wide traces to
connect OUT.
6. Add vias under the IC and routing the OUT Top Layer
trace on both PCB layers (highly
recommended).
7. Use a large copper plane for SW1 and SW2. L1
8. Place the VCC decoupling capacitor as

SW1

SW2
close to VCC as possible.
Notes:
9) The recommended layout is based on the Typical
Application Circuits on page 31.

VIN OUT

GND
Close-Up of Layout
Figure 12: Recommended Layout

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

TYPICAL APPLICATION CIRCUITS


0 R6 C4 100nF

16
VIN L1 4.7µH
15
2.8V-22V BST1 SW1
1
IN 13 0 R7
+ C1 BST2 VOUT
C1B C1A C5
100µF 22µF 14 100nF 1V-20V
0.1µF SW2
R3
499kΩ 12
OUT
3 + C2
EN C2A C2B C2C
0.1µF 10µF 10µF 100µF
VCC
C7
22nF
MP8862 EMZJ350ARA101MHA
1.8V
R4
499kΩ 4 R1
ADD 8 100kΩ
R5 9 ALT
VCC I2C Slave SCL 5
301kΩ C3 6
SDA
1µF
AGND GND OC
10 2, 11 7

R2 C6
21.5kΩ 22nF

Figure 13: Typical Application Circuit for 1V-20VOUT


Note: Refer to the recommended maximum IOUT vs. VIN and VOUT with 120μF low-ESR COUT capacitor curve on page 9.

0 R6 C4 100nF

16
VIN L1 4.7µH
15
2.8V-22V BST1 SW1
1
IN 13 0 R7
+ C1 BST2 VOUT
C1B C1A C5
100µF 22µF 14 100nF 1-12V
0.1µF SW2
R3
499kΩ 12
OUT
3 C2D C2E C2F
EN C2A C2B C2C
0.1µF 22µF 22µF 22µF 22µF 22µF
VCC
C7
22nF
MP8862
1.8V
R4
499kΩ 4 R1
ADD 8 100kΩ
R5 9 ALT
VCC I2C Slave SCL 5
301kΩ C3 6
SDA
1µF
AGND GND OC
10 2, 11 7

R2 C6
21.5kΩ 22nF

Figure 14: Typical Application Circuit for 1V-12VOUT


Note: Refer to the recommended maximum IOUT vs. VIN and VOUT with 22μFx5 ceramic COUT capacitor curve on page 9.

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MP8862 – 22V VIN, 2A IOUT, INTEGRATED BUCK-BOOST WITH I2C INTERFACE

PACKAGE INFORMATION
QFN-16 (3mmx3mm)

NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
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