1.
Digital Design Projects
a. AES Encryption/Decryption using VHDL/Verilog: Secure your DATA
TRANSMISSION with encryption techniques.
b. ALU (Arithmetic Logic Unit) Design: Implement a 16-BIT ALU with various
ARITHMETIC and LOGIC OPERATIONS.
c. CPU Design (Simple RISC Processor): Build a BASIC RISC-BASED CPU to
execute instructions.
d. Floating Point Unit (FPU) Design: Implement IEEE-754 floating point
arithmetic for accurate NUMBER REPRESENTATION.
e. Digital Clock with Alarm: A fun FPGA-BASED CLOCK with LCD/LED DISPLAY and
an ALARM FEATURE.
2. Verification & Testing Projects
a. Verification of UART Protocol using SystemVerilog & UVM: Test the UART
PROTOCOL functionality and performance.
b. I2C/SPI Communication Protocol Verification: Verify the I2C/SPI PROTOCOLS
for proper data communication.
c. AXI Protocol Implementation & Verification: Implement and verify the AXI
PROTOCOL for HIGH-PERFORMANCE DATA TRANSFER.
d. Memory Controller Verification: Test interfaces like DDR3/DDR4 MEMORY
CONTROLLERS for seamless memory access.
3. Low-Power VLSI Design Projects
a. Low-Power Flip-Flop Design: Use CLOCK GATING techniques to OPTIMIZE POWER
CONSUMPTION in flip-flops.
b. Power Optimization in FIR Filter Design: Apply APPROXIMATION TECHNIQUES to
reduce POWER USAGE in FIR filters.
c. Low-Power Multiplier Design: Implement a BOOTH’S ALGORITHM or WALLACE TREE
multiplier with LOW POWER CONSUMPTION.
4. FPGA-Based Projects
a. Image Processing using FPGA: Work on FACE DETECTION and EDGE DETECTION
algorithms for IMAGE PROCESSING.
b. Traffic Light Controller using FPGA: Design a TRAFFIC LIGHT SYSTEM based
on REAL-TIME DATA inputs.
c. Speech Recognition System on FPGA: Create a SPEECH RECOGNITION SYSTEM to
convert speech into text.
d. Cryptographic Hash Function Implementation on FPGA: Implement HASHING
ALGORITHMS like SHA on FPGA for secure applications.
5. Analog & Mixed-Signal VLSI Projects
a. SAR ADC Design: Build a SUCCESSIVE APPROXIMATION REGISTER (SAR) ADC for
ANALOG-TO-DIGITAL CONVERSION.
b. CMOS Operational Amplifier Design: Design a LOW-POWER CMOS OP-AMP for
signal processing.
c. PLL (Phase-Locked Loop) Design: Develop a PLL CIRCUIT for generating
STABLE CLOCK SIGNALS.
d. Low Noise Amplifier (LNA) for RF APPLICATIONS: Design an LNA to amplify
weak signals while minimizing NOISE.
6. AI/ML-Enabled VLSI Projects
a. Edge AI Accelerator for TinyML: Create a HARDWARE ACCELERATOR to run AI/ML
MODELS on tiny devices.
b. Hardware Implementation of CNNs on FPGA: Design an FPGA-BASED SYSTEM for
running CONVOLUTIONAL NEURAL NETWORKS (CNNs).
c. Systolic Array Design for Deep Learning: Implement a SYSTOLIC ARRAY
architecture to optimize DEEP LEARNING APPLICATIONS.