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Demo of NUMBER SYSTEM AND CODES34

The document explains the operation of full adders and subtractors in binary arithmetic, detailing how bits are added and subtracted using logic circuits. It describes the processes of generating sum and carry bits in full adders, as well as the functioning of half and full subtractors, including their inputs, outputs, and simplified Boolean expressions. Logic diagrams for half and full subtractors are also mentioned, illustrating their implementation in sum-of-products form.

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27 views2 pages

Demo of NUMBER SYSTEM AND CODES34

The document explains the operation of full adders and subtractors in binary arithmetic, detailing how bits are added and subtracted using logic circuits. It describes the processes of generating sum and carry bits in full adders, as well as the functioning of half and full subtractors, including their inputs, outputs, and simplified Boolean expressions. Logic diagrams for half and full subtractors are also mentioned, illustrating their implementation in sum-of-products form.

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patef87206
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd

 The bits are added with full adders, starting from the least significant position (subscript 0),

), to form the
sum bit and carry bit. The input carry C0 in the least significant position must be 0.
 The value of Ci+1 in a given significant position is the output carry of the full adder. This value is
transferred into the input carry of the full adder that adds the bits one higher significant position to the
left.
 The sum bits are thus generated starting from the rightmost position and are available as soon as the
corresponding previous carry bit is generated. All the carries must be generated for the correct sum bits
to appear at the outputs.

HALF SUBTRACTOR:-
 This circuit needs two binary inputs and two binary outputs.
 Symbols x and y are assigned to the two inputs and D (for difference) and B (for borrow) to the outputs.
 The truth table for the half subtractor is listed in the below table.

 The B output is 1 only when the inputs are 0 and 1. The D output represents the least significant bit of
the subtraction.
 The subtraction operation is done by using the following rules as
0-0=0;
0-1=1 with borrow 1;
1-0=1;
1-1=0.
 The simplified Boolean functions for the two outputs can be obtained directly from the truth table. The
simplified sum-of-products expressions are
D = x’y + xy’ and B =x’y
 The logic diagram of the half adder implemented in sum of products is shown in the figure. It can be
also implemented with an exclusive-OR and an AND gate with one inverted input.

FULL SUBTRACTOR:-
 A full subtractor is a combinational circuit that forms the arithmetic subtraction operation of three bits.
 It consists of three inputs and two outputs. Two of the input variables, denoted by x and y , represent
the two significant bits to be subtracted. The third input, z , is subtracted from the result 0f the first
subtraction.

 Two outputs are necessary because the arithmetic subtraction of three binary digits ranges in value
from 0 to 3, and binary representation of 2 or 3 needs two bits. The two outputs are designated by the
symbols D for difference and B for borrow.

 The binary variable D gives the value of the least significant bit of the difference. The binary variable B
gives the output borrow formed during the subtraction process.

 The eight rows under the input variables designate all possible combinations of the three variables. The
output variables are determined from the arithmetic subtraction of the input bits.
 The difference D becomes 1 when any one of the input is 1or all three inputs are equal to1 and the
borrow B is 1 when the input combination is (0 0 1) or (0 1 0) or (0 1 1) or (1 1 1).
 The simplified expressions are
D = x’y’z + x’yz’ + xy’z’ + xyz
B = x’z + x’y + yz
 The logic diagram for the full adder implemented in sum-of-products form is shown in figure.

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