L T P S J C
24EECE2291 DIGITAL LOGIC DESIGN
3 0 2 0 0 4
Pre-requisite None
Co-requisite None
Preferable Exposure None
Course Description:
Digital Logic Design is an introductory course which provides the basic concepts involved in the design and analysis of digital
circuits for computing systems. A digital circuit is constructed using basic building blocks: logic gates and flip-flops. This course
deals with the design of various combinational and sequential circuits used to build more complex computing systems.
Course Educational Objectives:
• To introduce number systems, conversion used for representing numbers in computational structures
• To familiarize the implementation of simple logical operations using Combinational circuits
• To acquaint the student with the design of combinational and sequential logic circuits with practical design examples
• To expose different types of memories used in digital systems
• To impart the design of synchronous and asynchronous digital systems
• To demonstrate the use of standard chips and PLDs in building digital computational structures
MODULE 1 BINARY SYSTEMS AND LOGIC GATES 12 Hrs
Binary Systems: digital systems, binary numbers, number base conversions, octal and hexadecimal numbers, complements,
signed binary numbers, binary codes, binary logic. Boolean Algebra and Logic Gates: basic definitions, axiomatic definition of
boolean algebra, basic theorems and properties of boolean algebra, boolean functions, canonical and standard forms, digital
logic gates.
MODULE 2 SIMPLIFICATION OF BOOLEAN FUNCTIONS 12 Hrs
Simplification of Boolean functions: The map method, four-variable map, five-variable map, product of sums simplification,
don’t-care conditions, NAND and NOR implementation, exclusive-OR function. .
MODULE 3 COMBINATIONAL LOGIC CIRCUIT DESIGN 12 Hrs
Combinational Logic: combinational circuits, analysis procedure, design procedure, binary adder-subtractor, decoders,
encoders, multiplexers. Memories: random-access memory, memory decoding.
MODULE 4 SEQUENTIAL LOGIC CIRCUIT DESIGN 12 Hrs
Synchronous Sequential Logic: sequential circuits, latches, flip-flops, analysis of clocked sequential circuits, state reduction and
assignment, design procedure. Registers and Counters: registers, shift registers, ripple counters, synchronous counters, ring
counter
MODULE 5 IMPLEMENTATION OF DIGITAL LOGIC CIRCUITS 12 Hrs
Transistors as Switches, NMOS Logic Gates, CMOS Logic Gates, MOS Implementation of static latches and flipflops.
Programmable Logic Devices: Programmable Logic Array, Programmable Array Logic, Complex Programmable Logic Devices,
Field Programmable Gate Arrays. FPGA Design Flow
List of Experiments
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S.no Topic Type
Verification of Truth Tables of Logic gates and implementation of Basic gates using Universal
1 Experiment
Gates
2 Implementation of the given Boolean functions using logic gates in both SOP and POS form. Experiment
3 Simplification of the given Boolean function using K-map and implement using logic gates. Experiment
4 Realization and verification of Full adder and Full Subtractor using logic gates. Experiment
5 Implementation of the given function using decoder and logic gates. Experiment
6 Implementation of the given function using Multiplexer and logic gates. Experiment
7 Verification of State Tables of SR, D, JK and T-Flip-Flops. Experiment
8 Verify the operation of Shift Registers using D flip-flops. Experiment
9 Design and verify the operation of 4-bit and Mod-N Ripple Counters using JK flip-flops. Experiment
10 Verilog Modelling and Simulation of 1-bit full adder, 2 X 4 Decoder, Mod-13 Counter Experiment
11 Study of PLA, CPLD, FPGA Datasheets and appreciating their architectural highlights Experiment
12 FPGA Implementation of 1-bit full adder, 2 X 4 Decoder, 4-Bit Counter Experiment
Textbook(s):
1. Michael D. Ciletti, M. Morris Mano, Digital Design, 5/e, Pearson Education, 2014
2. Charles Roth, Jr., Larry Kinney, Fundamentals of Logic Design, 7/e, Cengage Learning, India, 2015
3. Adel S. Sedra, Kenneth C. Smith, Microelectronic Circuits, 7/e, Oxford University Press, 2013
Reference(s):
1. Zvi Kohavi, Switching and Finite Automata Theory, 2/e, Tata McGraw-Hill, 2008
2. John F. Wakerly, Digital Design Principles and Practices, 4/e, Pearson Education, 2008
3. Weste, Harris, CMOS VLSI Design, 4/e, Pearson Education, 2014
Course Outcomes:
1. convert any number into different base representations.
2. simplify logic expressions using Boolean laws and realize using basic and universal logic gates.
3. design combinational circuits for the given specifications.
4. design synchronous sequential circuits for the given specifications
5. differentiate asynchronous and synchronous counters and implement Multiplexers and D flip flops using CMOS
technologies.
Course Articulation Matrix:
POs PSOs
CO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4
3 – High, 2 – Medium & 1 – Low Correlation
APPROVED IN MEETINGS HELD ON:
BOS : 12-02-2024 Academic Council Number: 27 Academic Council : 06-07-2023
SDG No(s). & Statement(s) :
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4 & Quality Education : Ensure inclusive and equitable quality education and promote lifelong learning opportunities for
all.Ensure inclusive and equitable quality education and promote lifelong learning opportunities for all.
SDG Justification(s):
SDG 4: The modules and topics mentioned in this course are designed to ensure all-inclusive and thorough education with
equity to all persons and always promote learning opportunities.
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