Digital Design

Arithmetic Circuits
Chapter 4
Slides to accompany the textbook
Digital Design, with RTL Design, VHDL, and Verilog, 2nd Edition,
by Frank Vahid, John Wiley and Sons Publishers, 2010.
http://www.ddvahid.com

Copyright © 2010 Frank Vahid

Instructors of courses requiring Vahid's Digital Design textbook (published by John Wiley and Sons) have permission to modify and use these slides for customary course-related activities,
subject to keeping this copyright notice in place and unmodified. These slides may be posted as unanimated pdf versions on publicly-accessible course websites.. PowerPoint source (or pdf
Digital
with animations) may Design 2e
not be posted to publicly-accessible websites, but may be posted for students on internal protected sites or distributed directly to students by other electronic means.
Copyright © 2010 1
Instructors may make printouts of the slides available to students for a reasonable photocopying charge, without incurring royalties. Any other use requires explicit permission. Instructors
Frank Vahid
may obtain PowerPoint source or obtain special use permissions from Wiley – see http://www.ddvahid.com for information.
 4.3

Adders
• Adds two N-bit binary numbers Inputs Outputs
a1 a0 b1 b0 c s1 s0
– 2-bit adder: adds two 2-bit numbers, 0 0 0 0 0 0 0
0 0 0 1 0 0 1
outputs 3-bit result 0 0 1 0 0 1 0
– e.g., 01 + 11 = 100 (1 + 3 = 4) 0
0
0
1
1
0
1
0
0
0
1
0
1
1
0 1 0 1 0 1 0
0 1 1 0 0 1 1
0 1 1 1 1 0 0
1 0 0 0 0 1 0
1 0 0 1 0 1 1
1 0 1 0 1 0 0
1 0 1 1 1 0 1
1 1 0 0 0 1 1
1 1 0 1 1 0 0
1 1 1 0 1 0 1
1 1 1 1 1 1 0

Digital Design 2e
Copyright © 2010 2
Frank Vahid
 Alternative Method to Design an Adder: Imitate
Adding by Hand
• Alternative adder
design: mimic 0 1 0 1 1 1

how people do A: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
a
B: + 0 1 1 0 + 0 1 1 0 + 0 1 1 0 + 0 1 1 0
addition by hand
• One column at a
time 1 0 1 1 0 1 1 0 1 0 1

– Compute sum,
add carry to next
column

Digital Design 2e
Copyright © 2010 3
Frank Vahid
 Alternative Method to Design an Adder: Imitate
Adding by Hand
• Create 1 1 0
component for A: 1 1 1 1
B: + 0 1 1 0
each column
– Adds that a
column’s bits, 1 0 1 0 1
generates sum
1 1 0
and carry bits
A: 1 1 1 1

+ B: 0 1 1 0

b a ci b a ci b a ci b a
co s co s co s co s
1
0 1 0 1 SUM

Digital Design 2e
Full-adders Half-adder
Copyright © 2010 4
Frank Vahid
 Half-Adder
1 1 0
• Half-adder: Adds 2 bits, generates
A: 1 1 1 1
sum and carry
• Design using combinational design + B: 0 1 1 0

process from Ch 2 b a ci b a ci b a ci b a
Inputs Outputs
co s co s co s co s
a b co s 1
0 0 0 0 0 1 0 1 SUM
Step 1: Capture the function 0 1 0 1
1 0 0 1
1 1 1 0

a b
Step 2A: Create equations
co = ab a b
s = a’b + ab’ (same as s = a xor b)
Half-adder
(HA)
co s
a

Step 2B: Implement as co s

circuit (a) (b)

Digital Design 2e
Copyright © 2010 5
Frank Vahid
 Full-Adder
1 1 0
• Full-adder: Adds 3 bits, generates
A: 1 1 1 1
sum and carry
+ B: 0 1 1 0

b a ci b a ci b a ci b a
co s co s co s co s
1
0 1 0 1 SUM
Step 1: Capture the function
Step 2A: Create equations Step 2B: Implement as circuit
Inputs Outputs a b ci
a b ci co s co = a’bc + ab’c + abc’ + abc
0 0 0 0 0 co = a’bc +abc +ab’c +abc +abc’ +abc
0 0 1 0 1 co = (a’+a)bc + (b’+b)ac + (c’+c)ab
0 1 0 0 1 co = bc + ac + ab
0 1 1 1 0
1 0 0 0 1 s = a’b’c + a’bc’ + ab’c’ + abc
1 0 1 1 0 s = a’(b’c + bc’) + a(b’c’ + bc) Full
1 1 0 1 0 s = a’(b xor c)’ + a(b xor c)
1 1 1 1 1
adder
s = a xor b xor c (FA)
co s
Digital Design 2e
Copyright © 2010 6
Frank Vahid
 Carry-Ripple Adder
• Using half-adder and full-adders, we can build adder that adds like we
would by hand
• Called a carry-ripple adder
– 4-bit adder shown: Adds two 4-bit numbers, generates 5-bit output
• 5-bit output can be considered 4-bit “sum” plus 1-bit “carry out”
– Can easily build any size adder

a3 b3 a2 b2 a1 b1 a0 b0

a b ci a b ci a b ci a b
a3 a2 a1 a0 b3 b2 b1 b0
FA FA FA HA
4-bit adder
co s co s co s co s
co s3 s2 s1 s0

co s3 s2 s1 s0
(a)
(b)

Digital Design 2e
Copyright © 2010 7
Frank Vahid
 Carry-Ripple Adder
• Using full-adder instead of half-adder for first bit, we can
include a “carry in” bit in the addition
– Useful later when we connect smaller adders to form bigger adders

a3 b3 a2 b2 a1 b1 a0 b0 ci

a b ci a b ci a b ci a b ci a3 a2 a1 a0 b3 b2 b1 b0
FA FA FA FA 4-bit adder ci
co s co s co s co s co s3 s2 s1 s0

co s3 s2 s1 s0
(a) (b)

Digital Design 2e
Copyright © 2010 8
Frank Vahid
 Carry-Ripple Adder’s Behavior
000 00 0 000 0 0
0

a b ci a b ci a b ci a b ci
FA FA FA FA Assume all inputs initially 0
co s co s co s co s
0 0 0
0 0 0 0 0

000 10 0 100 1 1 0111+0001

0
(answer should be 01000)
a b ci a b ci a b ci a b ci
a
FA FA FA FA
co s co s co s co s
0 0 10
co2 co1 co0
0 0 1 1 0 Output after 2 ns (1FA delay)

Wrong answer—is there a problem? No—just need more time

Digital Design 2e
Copyright © 2010 for carry to ripple through the chain of full adders. 9
Frank Vahid
 Carry-Ripple Adder’s Behavior
000 10 0 101 1 1
0 0111+0001
(answer should be 01000)
a b ci a b ci a b ci a b ci
FA FA FA FA
co s co s co s co s
0 1 1
co1 Outputs after 4ns (2 FA delays)
1 0 0
(b)
000 101
0 101 1 1
0

a b ci a b ci a b ci a b ci
FA FA FA FA
co s co s co s co s
1 1 1 a
co2 Outputs after 6ns (3 FA delays)
0 0 0
(c)
0 00
1 10 1 101 1 1
0

a b ci a b ci a b ci a b ci
FA FA FA FA
co s co s co s co s
1 1 1
0 1 0 0 0 Output after 8ns (4 FA delays)
Digital Design 2e
(d)
Copyright © 2010 Correct answer appears after 4 FA delays 10
Frank Vahid
 Cascading Adders

a7 a6 a5 a4 b7 b6 b5 b4 a3 a2 a1 a0 b3 b2 b1 b0

a3 a2 a1 a0 b3 b2 b1 b0 a3 a2 a1 a0 b3 b2 b1 b0 a7.. a0 b7.. b0
4-bit adder ci 4-bit adder ci 8-bit adder ci +
co s3 s2 s1 s0 co s3 s2 s1 s0 co s7.. s0

C
co s7 s6 s5 s4 s3 s2 s1 s0
(a) (b) (c)

Block symbol Simplified

block symbol

Digital Design 2e
Copyright © 2010 11
Frank Vahid
Adder Example: DIP-Switch-Based Adding Calculator
• Goal: Create calculator that adds two 8-bit binary numbers, specified
using DIP switches
– DIP switch: Dual-inline package switch, move each switch up or down
– Solution: Use 8-bit adder
DIP switches

1
0

a7..a0 b7..b0
a
8-bit carry-ripple adder ci 0

co s7..s0

CALC

LEDs

Digital Design 2e
Copyright © 2010 12
Frank Vahid
Adder Example: DIP-Switch-Based Adding Calculator
• To prevent spurious values from appearing at output, can place register
at output
– Actually, the light flickers from spurious values would be too fast for humans to
detect—but the principle of registering outputs to avoid spurious values being read by
external devices (which normally aren’t humans) applies here.
DIP switches

1
0

a7..a0 b7..b0

8-bit adder ci 0

co s7..s0

e
ld
8-bit register
clk
CALC

Digital Design 2e
Copyright © 2010 LEDs 13
Frank Vahid
 4.4

Comparators
• N-bit equality comparator: Outputs 1 if two N-bit numbers are equal
– 4-bit equality comparator with inputs A and B
• a3 must equal b3, a2 = b2, a1 = b1, a0 = b0
– Two bits are equal if both 1, or both 0
– eq = (a3b3 + a3’b3’) * (a2b2 + a2’b2’) * (a1b1 + a1’b1’) * (a0b0 + a0’b0’)
• Note that function inside parentheses is XNOR
– eq = (a3 xnor b3) * (a2 xnor b2) * (a1 xnor b1) * (a0 xnor b0)

a3 b3 a2 b2 a1 b1 a0 b0
0110 = 0111 ? 0 0 1 1 1 1 0 1

a3 a2 a1 a0 b3 b2 b1 b0
1 1 1 0
4-bit equality comparator =
eq

a
a
0 eq

Digital Design 2e
Copyright © 2010 14
Frank Vahid
 Magnitude Comparator
• N-bit magnitude comparator: A=1011 B=1001
Two N-bit inputs A and B,
outputs whether A>B, A=B, or 1011 1001 Equal
A<B, for 1011 1001 Equal a

– How design? Consider 1011 1001 Not equal

comparing by hand.
– First compare a3 and b3. If So A > B
equal, compare a2 and b2. And
so on.
– Stop if comparison not equal (the
two bits are 0 and 1, or 1 and
0)—whichever of A or B has the
1 is thus greater. If never see
unequal bit pair, then A=B.
Digital Design 2e
Copyright © 2010 15
Frank Vahid
 Magnitude Comparator Example:
Minimum of Two Numbers
• Design a combinational component that computes the
minimum of two 8-bit numbers
– Solution: Use 8-bit magnitude comparator and 8-bit 2x1 mux
• If A<B, pass A through mux. Else, pass B.

11000000 01111111
MIN A B 8 8

8 8 8 8
a A B
A B 1 I1 I0 Min
0 Igt AgtB s
C
1 Ieq 8-bit magnitude comparator AeqB 0 8-bit
0 Ilt AltB 2x1 mux 8
0
8 (b)
C
(a)
01111111

Digital Design 2e
Copyright © 2010 16
Frank Vahid
 Representing Negative Numbers: Two’s
Complement
• Negative numbers common
– How represent in binary?
• Signed-magnitude
– Use leftmost bit for sign bit
• So -5 would be:
1101 using four bits
10000101 using eight bits

• Better way: Two’s complement

– Big advantage: Allows us to perform subtraction using addition
– Thus, only need adder component, no need for separate
subtractor component

Digital Design 2e
Copyright © 2010 17
Frank Vahid
 Two’s Complement is Easy to Compute:
Just Invert Bits and Add 1

– Easier method: Just invert all the bits, and add 1

– The complement of 011 is 100+1 = 101.

A: 1010+1=1011
Q: What is the two’s complement of 0101?

Q: What is the two’s complement of 0011? A: 1100+1=1101

Digital Design 2e
Copyright © 2010 18
Frank Vahid
 Two’s Complement
• Two’s complement can represent
negative numbers
– Suppose have 4 bits
– Positive numbers 0 to 7: 0000 to 0111
– Negative numbers
• -1: Take two’s complement of 1:
0001  1110+1 = 1111
• -2: 0010  1101+1 = 1110 …
• -8: 1000  0111+1 = 1000
• So -1 to -8: 1111 to 1000
– Leftmost bit indicates sign of number,
known as sign bit. 1 means negative.
• Signed vs. unsigned N-bit number
– Unsigned: 0 to 2N-1
• Ex. Unsigned 8-bit: 0 to 255
– Signed (two’s complement): -2N-1 to 2N-1-1
• Ex. Signed 8-bit: -128 to 127
Digital Design 2e
Copyright © 2010 19
Frank Vahid
Two’s Complement Subtractor Built with an Adder
• Using two’s complement
A B
A – B = A + (-B)
= A + (two’s complement of B) N-bit
= A + invert_bits(B) + 1
• So build subtractor using A B 1
Adder cin
adder by inverting B’s bits,
and setting carry in to 1
S

Digital Design 2e
Copyright © 2010 20
Frank Vahid
 Adder/Subtractor

• Adder/subtractor: control
input determines whether B

add or subtract A N-bit b7 b6

sub
– Can use 2x1 mux – sub input
0 1
sub
passes either B or inverted B N-bit 2x1

– Alternatively, can use XOR

A B
gates – if sub input is 0, B’s Adder cin adders B inputs
bits pass through; if sub input S
is 1, XOR inverts B’s bits

Digital Design 2e
Copyright © 2010 21
Frank Vahid
 4.7

Arithmetic-Logic Unit: ALU

• ALU: Component that
can perform various
arithmetic (add,
subtract, increment,
etc.) and logic (AND,
OR, etc.) operations,
based on control inputs

Digital Design 2e
Copyright © 2010 22
Frank Vahid