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EE282 Computer Systems Architecture, Spring 2025

EE282 Computer Systems Architecture, Spring 2025

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0% found this document useful (0 votes)
48 views5 pages

EE282 Computer Systems Architecture, Spring 2025

EE282 Computer Systems Architecture, Spring 2025

Uploaded by

sbelede
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

10/2/25, 6:47 PM EE282 Computer Systems Architecture, Spring 2025

EE282: Computer Systems Architecture


Spring 2025, Mondays and Wednesdays, 1:30 - 2:50 PM, Thornton 102
Instructor: Caroline Trippel
Teaching Assistants: Nicholas Mosier, Suresh Nambi, Ziqi Yuan
Staff Email: [email protected]

Canvas: Class Homepage


Ed: Class Homepage
GradeScope: Class Homepage
Poll Everywhere (for in-class students): We will use Poll Everywhere to facilitate in-class discussions and quizzes. Please get set
up at this link before the first lecture.
SCPD students have 1 week to finish the in-class exercises using assignments on Canvas within 1 week after the lecture
recording is available.
Syllabus: PDF

EE282 covers key hardware and software topics that are relevant for architecting advanced computer systems. Examples include:
out-of-order processors, multi-level cache hierarchies, main memory systems, multithreading and vector techniques, GPUs and
accelerators, virtualization, virtual memory, datacenter architecture, advanced IO systems, and non-volatile storage. Programming
assignments include: simulation of multi-core processor designs to characterize performance, design and implementation of advanced
processor optimizations, and formal verification of an open-source processor.
EE282 is appropriate for undergraduate and graduate students specializing in the broad field of computer systems. It is also
appropriate for other EE and CS students who want to understand, program, and make efficient use of modern computer systems of
any scale in their day-to-day work.

News (top is most recent)


(06/15) Final exam solutions posted.
(05/26) Readings for Lecture 18 posted.
(05/22) Problems 14 and 15 due dates have been moved to 06/05.
(05/22) Programming Assignment 3 released.
(05/22) All remaining problems for the quarter released.
(05/11) Problem 11 due date is moved to 05/22.
(05/11) Problem 9 due date is moved to 05/20.
(04/29) Problem 8 due date is moved to 05/13.
(04/28) Grades for Problems 3 and 4 published.
(04/27) Problem 7 due date is moved to 05/2.
(04/26) Solutions to Problems 1, 2, 3, and 4 published.
(04/26) Grades for Problems 1 and 2 published.
(04/24) Programming Assignment 2 released.
(04/20) Problem 9 due date is moved to 05/13.
(04/16) Final Exam location announced (Thornton 102).
(04/14) Problems 4 and 5 posted to Canvas.
(04/13) Final Exam date and time announced (Monday, June 9, 3:30 PM - 6:30 PM).
(04/10) Programming Assignment 1 and Google Cloud Setup Instructions posted to Canvas. Please get started early so we
have time to resolve any technical issues you may encounter!

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(04/09) Problem 3 posted to Canvas.


(04/07) Problems 1 and 2 posted to Canvas.
Please make sure you have access to the Canvas, Ed and GradeScope (links posted above).
Welcome to EE282!

Schedule
Required Textbook:
HP: J. Hennessy & D. Patterson, Computer Architecture: A Quantitative Approach, 6th edition.
MC: Morgan Claypool Synthesis Lectures (available through the library using your SUID).

Reference
Slides/
Date [Lecture #] Topic Reading Assignment Problems
Notes
[Due date]

[1] Introduction, Review of [Prerequisite material] HP: Appendices A.{1-8}, B.{1- Slides
3/31
Prerequisites 3}, C.{1-2, 4, 6}, Sections 1.{1-13} Recording

[2] Advanced Caches I: Multi- Slides


4/2 HP: Sections 2.{1, 3, 6}, Appendix B.{3, 6}
level caches, Optimizations Recording

[3] Advanced Caches II:


Optimizations (continued), Problems 1,2 Slides
4/7 HP: Sections 2.5, 5.{1, 2, 4}
Prefetching, Coherence [4/15] Recording
problem

Problem 3
[4] Cache coherence, HP: Section 5.5
[4/22] Slides
4/9 Synchronization, and Memory MC: A Primer on Memory Consistency and Cache
Prog. Assign. 1 Recording
consistency I Coherence, Second Edition: Chapters 2, 6
[5/6]

[5] Cache coherence, HP: Section 5.{6-7}


Problem 4 Slides
4/14 Synchronization, and Memory MC: A Primer on Memory Consistency and Cache
[4/22] Recording
consistency II Coherence, Second Edition: Chapters 3, 4, 5.{1-2}

Problem 5 Slides
4/16 [6] Main Memory HP: Section 2.2
[4/29] Recording

[7] Out-of-Order Processors I:


Problem 6 Slides
4/21 Dynamic Scheduling and HP: Section 3.{1-4}
[4/29] Recording
Branch Prediction

Problem 7
[8] Out-of-Order Processors II: [5/2] Slides
4/23 HP: Section 3.{6-10}
Speculation and Superscalar Prog. Assign. 2 Recording
[5/15]

Problem 8 Slides
4/28 [9] Multithreading HP: Section 3.{11-12}
[5/13] Recording

Problem 9 Slides
4/30 [10] Vectors and SIMD HP: Sections 4.{1-3, 5}, Appendix G
[5/20] Recording

5/5 [11] GPUs HP: Section 4.{4,6-8} Problem 10 Slides


Guest Lecturer: Roofline: An Insightful Visual Performance Model for [5/20] Recording

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Reference
Slides/
Date [Lecture #] Topic Reading Assignment Problems
Notes
[Due date]
Michael Pellauer Multicore Architectures

Midterm Exam
5/7 (1:30 - 2:50 PM PDT) Lectures 1-9
Thornton 102

Understanding Matrix Multiplication on a Weight-


[12] AI Processors Stationary Systolic Architecture
Problem 11 Slides
5/12 Guest Lecturer: Why Systolic Architectures?
[5/22] Recording
Thierry Tambe In-Datacenter Performance Analysis of a Tensor
Processing Unit

MC: Hardware and Software Support for


Problem 12 Slides
5/14 [13] Virtualization Virtualization: Chapters 1,2,4,5;
[5/22] Recording
HP: 6.{1-4,7}

Slides
5/19 [14] Virtualization
Recording

Problem 13
MC: Hardware and Software Support for
[15] Advanced Memory [5/27] Slides
5/21 Virtualization: Chapters 1,2,4,5;
Management Prog. Assign. 3 Recording
HP: Appendix L
[6/2]

5/26 Memorial Day (No Classes)

HP: Appendix F.{1-2}


[16] Advanced I/O & Problem 14 Slides
5/28 MC: Hardware and Software Support for
Networking [6/5] Recording
Virtualization: Chapter 6

HP: Section 2.2, Appendix D.2 Problem 15


6/2 [17] Non-volatile memory Slides
Flash storage memory by Adam Leventhal [6/5]

Spectre Attacks: Exploiting Speculative Execution


[18] Microarchitectural Attacks Meltdown: Reading Kernel Memory from User Space
6/4 Slides
and Defenses Speculative Taint Tracking (STT): A Comprehensive
Protection for Speculatively Accessed Data

Final Exam
6/9 (3:30 PM - 6:30 PM PDT) Lectures 1-18
Thornton 102

Review Session Schedule


Review Session # Date Topics

Review Session 1 4/4 Cache Optimizations

Review Session 2 4/11 Cache Coherence, Programming Assignment 1

Review Session 3 4/18 Memory Consistency Models, Synchronization, and Main Memory

Review Session 4 4/25 Branch Prediction, Instruction Scheduling, Multithreading

Review Session 5 5/2 Midterm Review

Review Session 6 5/9 Vectors, Programming Assignment 2

Review Session 7 5/16 Virtualization, Accelerators

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Review Session # Date Topics

Review Session 8 5/23 Advanced Memory Management, I/O, and Networking

Review Session 9 5/30 Non‑volatile Memory

Review Session 10 6/6 Final Exam Review

Homework and Projects


Assignments include a Problem Set and 3 Programming Assignments. The Problem Set consists of 16 questions. Each problem within
the set has a reference lecture and the corresponding due date is put up on the lecture schedule. You will work on all assignments in
groups of 2 students. All assignments are due by 11:59 PM PT on the dates indicated on the assignment in the schedule. Solutions to
problem sets will be available online shortly thereafter. All assignments should be submitted through GradeScope. You will be granted
a total of 3 “late days” to use however you see fit for eligible coursework, except that you may use up to 1 late day for Problems 8
and 9 to ensure timely release of homework solutions before the Midterm. These restrictions apply to all students, including those with
OAE accommodations. Beyond the allotted late days, you will be docked on the following system without exception:

1 day late: 25% of the maximum allowable marks


2 days late: 50% of the maximum allowable marks
3+ days late: 75% of the maximum allowable marks

Logistics
Announcements: Visit this web page regularly to access all the handouts, solutions, and announcements. Please check your email
regularly as well for announcements from Ed!

Office Hours:

Caroline Trippel: Wednesdays 2:50 PM - 3:50 PM, Gates 470, or by appointment.


Suresh Nambi:
Tuesdays 4:30 PM - 6:30 PM, Huang 020
Tuesdays 5:30 PM - 6:30 PM on Zoom
Ziqi Yuan:
Mondays 3 - 4 PM in Gates 104
Mondays 7 - 8 PM on Zoom
Nicholas Mosier:
Thursdays 9 - 11 AM in Gates 421
Thursdays 9 - 10 AM on Zoom

Review Sessions:

Fridays, 2:30PM - 3:20PM, in-person in Skilling Auditorium and over zoom and it is recorded.

Exams: There will be two in-person exams: one Midterm and one Final.
Midterm on Wednesday, May 7th (1:30 PM - 3:00 PM PDT) in Thornton 102, covers lectures 1-9.
Final on Monday, June 9 (3:30 PM - 6:30 PM PDT), Thornton 102, covers lectures 1-18.

Tentative Grading:

Category Grade % Notes

Attendance and Participation 5% 3 conditional absence “passes” (see Course Policies in syllabus);
Arrival/departure > 10 min late/early counts as an absence
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Category Grade % Notes


Is not eligible for late days

Problem Set 15% Is eligible for late days

3 Programming Assignments 30% Is eligible for late days

Midterm 25% Is not eligible for late days

Final 25% Is not eligible for late days


See syllabus for details on late day restrictions.

Participation:
You are expected to attend the lectures in person. This is your opportunity to ask questions, contribute answers and insights, and
affect the nature of the class. Also note that the lecture notes and the textbook are not guaranteed to capture 100% of every topic
discussed aloud during lecture.

The lecture notes will be made available before class. During the lectures, there will also be in-class exercises which you will be given
time to work on and discuss with your neighbors. You will submit answers via Poll Everywhere. You will only be graded based on your
participation. SCPD students are expected to complete the in-class exercises within 1 week after the lecture recording is available.

Collaboration: See: honor code and collaboration for some general guidelines, which apply to both project assignments and problem
sets. In general, collaboration is encouraged subject to the following guidelines:
No more than 2 people can collaborate on a homework or project assignment.
Students working together should submit a single assignment for the pair.
Any assistance received for homework or programming assignment solutions should be acknowledged in writing with specific
details.
No sharing of code, or partial or complete solutions among groups is permitted.

SCPD Video Recording Disclaimer: Video cameras located in the back of the room will capture the instructor presentations in this
course. For your convenience, you can access these recordings by logging into the course Canvas site. These recordings might be
reused in other Stanford courses, viewed by other Stanford students, faculty, or staff, or used for other education and research
purposes. Note that while the cameras are positioned with the intention of recording only the instructor, occasionally a part of your
image or voice might be incidentally captured. If you have questions, please contact a member of the teaching team.

Adapted from a template by Andreas Viklund.

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