LAB 8: Design and implementation of magnitude comparator
using logic gates
Objective:
To design and implement 1-Bit, 2-Bit and 4-Bit magnitude comparator using basic gates.
Parts required:
Sl.No. COMPONENT SPECIFICATION QTY.
1. AND GATE IC 7408 2
2. X-OR GATE IC 7486 1
3. OR GATE IC 7432 1
4. NOT GATE IC 7404 1
5. 4-BIT MAGNITUDE IC 7485 2
COMPARATOR
Apparatus:
• Trainer/ proto board
• Wire cutter
• Patch Cords
• Voltmeter
Theory:
A magnitude comparator is combinational circuits that compares two numbers A and B and
determines relative magnitude. The outcome of the comparator is specified by three binary
variables indicating whether A>B, A=B or A<B. A comparator can be implemented using logic
gates. 1-bit comparator compares two numbers of single bits,2-bit comparator compares two
numbers each having two bits, 4-bit comparator measures 2 numbers of 4 bits and so on.
1-Bit Magnitude Comparator:
Truth Table:
A B A<B A=B A>B
0 0 0 1 0
0 1 1 0 0
1 0 0 0 1
1 1 0 1 0
DEPARTMENT OF ELECTRICAL ENGINEERING
NATIONAL UNIVERSITY OF MODERN LANGUAGES ISLAMABAD
Output equations are given as:
A<B has equation AND of B and compliment of A so (A<B)=A’. B
A=B has equation of A XNOR B so (A=B)=A⊕B
A>B has equation AND of A and compliment of B so (A>B) = A. B’
Logic Diagram:
2-Bit Magnitude Comparator:
A1 A0 B1 B0 A<B A=B A>B
0 0 0 0 0 1 0
0 0 0 1 1 0 0
0 0 1 0 1 0 1
0 0 1 1 1 0 0
0 1 0 0 0 0 1
0 1 0 1 0 1 0
0 1 1 0 1 0 0
0 1 1 1 1 0 0
1 0 0 0 0 0 1
1 0 0 1 0 0 1
1 0 1 0 0 1 1
1 0 1 1 1 0 0
1 1 0 0 0 0 1
1 1 0 1 0 0 1
1 1 1 0 0 0 1
1 1 1 1 0 1 0
DEPARTMENT OF ELECTRICAL ENGINEERING
NATIONAL UNIVERSITY OF MODERN LANGUAGES ISLAMABAD
K-MAP:
DEPARTMENT OF ELECTRICAL ENGINEERING
NATIONAL UNIVERSITY OF MODERN LANGUAGES ISLAMABAD
Logic Diagram:
4-Bit Magnitude Comparator:
The truth table for a 4-bit comparator would have 4^4 = 256 rows. So we will do things a bit
differently here. We will compare each bit of the two 4-bit numbers, and based on that
comparison and the weight of their positions, we will draft a truth table
Truth Table:
A3B3 A2B2 A1B1 A0B0 A>B A<B A=B
A3>B3 x x x 1 0 0
A3<B3 x x x 0 1 0
A3=B3 A2>B2 x x 1 0 0
A3=B3 A2<B2 x x 0 1 0
A3=B3 A2=B2 A1>B1 x 1 0 0
A3=B3 A2=B2 A1<B1 x 0 1 0
A3=B3 A2=B2 A1=B1 A0>B0 1 0 0
A3=B3 A2=B2 A1=B1 A0<B0 0 1 0
A3=B3 A2=B2 A1=B1 A0=B0 0 0 1
DEPARTMENT OF ELECTRICAL ENGINEERING
NATIONAL UNIVERSITY OF MODERN LANGUAGES ISLAMABAD
Output equations for 4-bit comparator are given below.
X(A>B) = A3B3′ + x3A2B2′ + x3x2A1B1′ + x3x2x1A0B0’
Y(A<B) = A3’B3 + X3A2’B2 + X3X2A1’B1 + X3X2X1A0’B0
Z (A=B) = A3B3. A2B2. A1B1. A0B0
However, making KMAP and implementation using logic gates is very complex. For a 4-bit
comparator, implementation becomes very easy if IC for the specific purpose is used.
Pin-Diagram for IC 7485
Procedure:
(i) Verify the gates
(ii) Connections are given as per circuit diagram.
(iii) Logical inputs are given as per circuit diagram.
(iv) Observe the output and verify the truth table.
Analysis
Make logic diagram for 4-bit magnitude comparator.
Conclusion
1-bit, 2-bit and 4-bit Magnitude comparator have been verified.
DEPARTMENT OF ELECTRICAL ENGINEERING
NATIONAL UNIVERSITY OF MODERN LANGUAGES ISLAMABAD
