COMSATS Islamabad , Attock Campus
Presentation
Topic: 16-bit single-cycle MIPS
processor
Course: Computer Organization and
Architecture
Malik Awais Ur Rehman
Presented By:
(FA20-BCE-006)
Lab Instructor: Mr. Qasim Javed
16-bit Single Cycle MIPS
Processor
Table Of Contents
• Introduction
• Overview
• Advantages and disadvantages of MIPS processor
• Instruction formats
• Implementation in Verilog
• Code modules
• Main file and test bench
• Behavioural Model Simulation
• Final Thoughts (conclusion)
Introduction
• MIPS stand for “Microprocessor without Interlocked Pipelined Stages” (Do not
mix it with “Million Instructions per Second).
• A family of RISC instruction set architectures.
• Each instruction takes exactly one clock cycle to execute (single-cycle).
• Used in low-cost embedded systems.
• Designed to minimize the number of transistors and other components needed
to build a processor
Overview
• The processor has a 16-bit instruction width, and it has a 16-bit address space.
• The processor is capable of addressing up to 64 kilobytes of memory.
• Includes general-purpose registers (GPR), which can be used to store data and
instructions.
• Includes special-purpose registers (SPR), which is used to store the program
counter, status register.
• And other control registers.
Advantages
• 1. Increased performance due to larger instruction word size.
• 2. Increased memory addressing capabilities due to larger address bus size.
• 3. Reduced instruction processing time compared to 8-bit processors.
• 4. Used in low-cost embedded systems.
• 5. Reduced power consumption due to simpler instruction decoding.
• 6. Support for multiple instruction formats.
Disadvantages
• 1. Limited number of general-purpose registers.
• 2. Limited instruction set.
• 3. Slow performance due to low clock speed.
• 4. Difficult to debug due to single-cycle design.
• 5. Limited support for floating-point operations.
• 6. Limited support for multitasking.
• 7. Limited support for memory protection.
Instruction Formats
• Instructions are 32-bit long.
• Instructions are divided into three types:
• R (register), I (immediate), and J (jump).
• Every instruction starts with a 6-bit opcode.
• In addition to the opcode,
• R-type instructions specify three registers,a shift amount field, and a function field;
• I-type instructions specify two registers and a 16-bit immediate value;
• J-type instructions follow the opcode with a 26-bit jump target.
Instruction Formats
• The following are the three formats used for the core instruction set:
Implementation in Verilog
Code Modules
• Memory Module:
• This module is responsible for storing instructions and data. It is a dual-port RAM that is
connected to the Instruction Decoder and the Data Memory.
• Instruction Decoder:
• This module is responsible for decoding instructions and determining the control signals
that will be sent to the ALU and other modules.
• ALU:
• This module performs arithmetic and logical operations on the data.
• Data and instruction Memory:
• This module stores the data which is used by the ALU and the instructions given by the
control unit.
Continued….
• Registers:
• This module stores the intermediate results generated by the ALU.
• Control Unit:
• This module generates the control signals that are sent to the other modules.
• Data Path:
• This module consists of the multiplexers, shifters, and adders that are used to move data between the
different modules.
• Timing Unit:
• This module is responsible for ensuring that all the modules receive the appropriate clock signals.
• Main File:
• Declare the module name and the ports for the 16-bit single cycle MIPS processor
• Instantiate the register file and the ALU
• Initialize the multiplexers for the data path
• Connect the inputs and outputs of the register file and ALU
• Assign the values to the control signals
• Connect the control signals to the components
• Create the clock generator
• Create the clock enable signal
• Implement the logic for the instruction memory
• Connect the instruction memory to the data memory
• Implement the logic for the data memory
• Connect the program counter and the instruction register
• Test Bench:
• Create the clock generator
• Instantiate the MIPS processor
• Declare the input and output signals
• Initialize the input signals
• Generate the clock
• Monitor the output signals
• Compare the output with the expected result
Behavioural Model Simulation
Final Thoughts
• 16-bit single cycle MIPS processor is a digital circuit, designed to implement the instruction set
of the MIPS RISC microprocessor.
• Implements a single cycle architecture, meaning each instruction is executed in one clock cycle.
• Supports the 16-bit instruction set of the MIPS processor.
• Compatible with Verilog, the most widely used hardware description language.
• Relatively simple design, making it easy to implement and debug.
• High performance, as each instruction is executed in one clock cycle.
• Can be used to create embedded systems, such as robots and drones.
• Can be used for prototyping and educational purposes.
