MİKRO İŞLEMCİLER

Dr. Öğr. Üyesi Bahattin

KARAKAYA
Brief History of the Computer
• 1940s, CPUs were designed using vacuum tubes.
• ENIAC, consumed 130,000 watts of power and occupied
1500 square feet.
• 1950s, transistors replaced vacuum tubes in the design of
computers.
• 1959, the first IC (integrated circuit) was invented.
• 1960s the use of IC chips in the design of CPU boards became
common.
• 1971 the first working CPU on a chip was invented by Intel .
• This CPU was called a microprocessor. The first
microprocessor, the 4004, had a 4-bit data bus and was
made of 2300 transistors. It was designed primarily for the
hand-held calculator but soon came to be used in
applications such as traffic-light controllers.
• By the late 1970s, the Intel 8080/85 was one of the most widely
used microprocessors, appearing in everything from microwave
ovens to homemade computers.
• Motorola with its 6800 and 68000 microprocessors. Apple's
Macintosh computers use the 68000 series microprocessors.
CISC vs. RISC
• Until the early 1980s, all CPUs, whether single-chip or whole-
board, followed the CISC (complex instruction set computer)
design philosophy.
• CISC refers to CPUs with hundreds of instructions designed for
every possible situation.
Disadvantage: To design CPUs with so many instructions
consumed not only hundreds of thousands of transistors, but
also made the design very complicated, time-consuming, and
expensive.
• In the early 1980s, a new CPU design philosophy called RISC
(reduced instruction set computer) was developed.
Advantage: The instructions are simplified and reduced from
hundreds to around 40 or so and use all the transistors that are
saved to enhance the power of the CPU.
• Since the late 1980s, many companies designing new CPUs
(either single-chip or whole-board) have used the RISC
philosophy.
• The only CISC microprocessors remaining in use will be
members of the 80x86 family and the 680x0 family.
 WHAT IS ARM?

• ARM is a processor architecture and it’s named after the firm

who invented ARM (Advanced RISC Machine). ARM architecture
is a 32-bit RISC processor architecure which is used frequently
in embedded designs.
• Nowadays ARM processor family, forms %75 of the 32-bit
embedded processors. ARM processors are preferred(maybe
chosen) intensively in portable electronic devices and computer
parts. Recently Intel’ n Xscale is the most popular product of
ARM
 WHAT IS ARM?

• There are 2 command sets which are being used frequently in

embedded designing. These are;
• 32-bit ARM
• 16-bit Thumb command sets.

Because of the bits every Thumb command has an ARM command

equivalent but not every ARM command has a Thumb command
equivalent. This situation eliminated the chances of interworking
between these two command sets. Nevertheless, we can take the
advantage of Thumb command sets’ less memory usage and ARM
command sets’ superior functionality.
 ARM ARCHITECTURE
When the answers to the question ‘’Why ARM
should be used’’ is explained in a few terms
and the processor architecture is classified, the
following items can be said:
• RISC Architecture: This property makes it
easier to design, to produce and to code the
processor.
• Power Consumption: ARM processors are
extremely good at power consumption. It is
a result of the low usage transistors in
designing the processor. This property is an
important aspect especially for mobile
devices.
 ARM ARCHITECTURE
When the answers to the question ‘’Why ARM
should be used’’ is explained in a few terms
and the processor architecture is classified, the
following items can be said:
• Access to RAM: ARM command set, in the
way of the machine language, is far ahead
of its competitors. Command set ensures a
cleaner design of the processor.
• Operating Model: ARM processors are part
of the command in which each command
will be executed. The processor skips
commands that do not match the command
at the current moment. This gives the user
the option to write algorithms effectively and
efficiently
• A company who wants to improve their
processors can get an improvement license
from ARM company and improve their own
processors or the ones who just want to
produce processors, can get the producing
license from the company but CANNOT
make changes on it.
SecurCore Processors:
SecurCore is preferred in areas where security is
important like high security smart cards. For
security applications which need a better
physical safety wall more than a TrustZone can
provide; a SecureCore based smart card can be
used beside the TrustZone
Classic ARM Processors
• It includes ARM7, ARM9, ARM11 families.
• The ARM7 series form the core of microcontrollers
mostly used in motor control and signal processing
applications.
• ARM9 and ARM11 series are widely used in
applications and mobile devices.
• The use of classic ARM processors is gradually
decreasing. It is recommended to use Cortex-M, R, and
A series ARM cores instead.
Cortex-M Series
• The ARM Cortex-M family is ARM microprocessor cores
designed for use in microcontrollers, ASICs, ASSPs, FPGAs
and SoCs. Cortex-M cores are often used as custom
microcontroller chips, but are also used in SoC chips as power
management, I/O, system, touch screen and sensor
controllers
• Although 8-bit microcontrollers were very popular in the past,
with the prices of lower-end Cortex-M chips moving
downwards, Cortex-M became a popular replacement for 8-bit
chips with 32-bit math operations, replaced older legacy cores
such as ARM7 and ARM9.
Cortex-R Series
• Cortex-R series processors deliver fast and decisive
processing and high performance while meeting tough
real time constraints in a variety of situations. It
combines these features in a performance, power and
space-optimized package, making it a reliable choice in
a reliable systems that require high fault resistance.
• The ARM Cortex-R is designed for high-performance,
real-time and security-critical applications. It is similar to
the Cortex-A profile, but is real-time and fault-tolerant,
making it suitable for use in security-critical applications
Cortex-R Series
• Cortex-R is suitable for use in computer-controlled
systems that require very low latency and/or a high
level of security. An example of real-time, safe-critical
demanding application would be a modern electronic
brake system in an automobile. The system not only
needs to be fast and responsive to multitude of sensor
data inputs, it is also responsible for human safety.
Cortex-A Series
Cortex-A series processors are used in areas
that need high performance such as image-
processing, high quality operating systems and
applications of difficult and complex calculations.
Cortex-A series processors; are used in high-
technology products such as; telephones,
tablets, automotive industry, computers etc
 STM32
STM32 is a 32-bit microcontroller
integrated circuit manifactured by
STMicroelectronics.
They are produced with the
usage of 32 bit RISC ARM core.
It has an
• internal processor,
• static RAM,
• flash memory,
• debug interface
• and different periperals
MICROCONTROLLER
PROGRAMMING
MACHINE / ASSEMBLY LANGUAGE
• The machine language is program
representation as the microcontroller
understands. It's not easy for people to read.
• Assembly is a human-readable machine
language format, making programming much
easier. Each assembly language expression
corresponds to a machine language
expression.
• An Assembly / A machine language program is
fast and smaller than the exact specified what
will enter the program.
• For microcontroller programming, it is useful to
learn assembly first. Programming with
Assembly requires detailed information about
the basic architecture of the microcontroller.
INTERPRETER
• Interpreter is a program built into a
microcontroller that translates high-level
languages into machine languages.
• Reads each expression one by one and runs
the program by performing the instruction that
the expression asks it to do. The two most
popular interpreters for microcontrollers are
BASIC and FORTH.
– BASIC is simple and easy to read, but slow.
Slowness can usually be solved using different
techniques to perform the desired task.
– FORTH has a speed close to the assembly
language. Although it is a very useful and
efficient language for control systems and
robotics, it is quite troublesome to write and
read.
INTERPRETER - JVM
• JVM - Java (TM) Virtual Machine - developed by
Sun Microsystems and added to the interpreter list.
Java is used in many areas as well as in
embedded systems.
• Java provides a new and revolutionary concept for
using portable software applications that can be
dynamically downloaded over a network rather
than stored on local disk or in the local memory of
a particular computer. In this way, the client
computer does not need to store all applications,
since they can be dynamically downloaded from
the server as needed. Another java main feature is
that it is independent of the Operating System.
Java is also a language. The Java language is an
object-oriented programming language developed
by Sun Microsystems.
INTERPRETER
• The best thing about developing a system that
includes an interpreter is that the program can
create interactively. It can be tried immediately to
first write a small code and then see how it works.
• When the results are satisfactory, additional
components are added until the final product is
obtained.
COMPILER
• A compiler is a high-level language translator that
combines the ease of programming of an
interpreter with higher speed. The conversion is
performed by translating the program directly into
the machine language on a host, such as a
desktop computer.
• The machine language program is then written to
an EEPROM or downloaded directly to the
microcontroller. The microcontroller then executes
the translated program directly without having to
interpret it first.
COMPILER
• The most popular microcontroller compilers are C
and BASIC.
• Language C is the most preferred language today.
C is used on computers from a small
microcontroller to a much larger supercomputer.
• While reading a C program is challenging, it is a
powerful and flexible development tool.
• It is not a high-level language, but a mid-level
language. This gives the developer direct access
to machine foundations.
FUZZY LOGIC VE NEURAL NETWORK
• Fuzzy Logic and neural networks are two design
methods of choice in embedded systems.
• The two methods are very different from each other,
from idea to implementation. However, the advantages
and disadvantages of the two can complement each
other.
• The advantage of neural networks is that it is possible
to design them without fully understanding the basic
logic rules in which they work. The neural network
designer applies a series of entries to the network and
"trains" it to produce the required output.
• Entries must represent the behavior of the system being
programmed, and the outputs must match the desired
result within some margin of error. If the output of the
network does not match the desired result, the structure
of the neural network is changed until it changes. After
training, it is assumed that the network will produce the
desired output or output close to it when new and
unknown data is presented.
FUZZY LOGIC VE NEURAL NETWORK
• Unlike neural networks, a fuzzy logic system can be
fully defined. Before designing a fuzzy control system,
its desired logical operation must be analyzed and
converted into fuzzy logic rules. This is the step where
neural network technology can help the fuzzy logic
designer. The designer can first train a software neural
network to produce the desired output from a given set
of inputs and outputs, and then use a software tool to
extract ground rules from the neural network. The
extracted rules are translated into fuzzy logic rules.
• Fuzzy logic is not a complete design solution. It
complements traditional control techniques such as PID
(proportional, integral and derivative) rather than
replacing them. Fuzzy logic is based on membership
rating and AI techniques.
• In mathematical equations used for PID control or for
event control high efficiency is obtained by applying to
nonlinear systems with many inputs that cannot be
easily expressed in IF-THEN expressions.
ARM ARCHITECTURE
AND
ASSEMBLYLANGUAGE
PROGRAMMING
 The General Purpose Registers GPRs in
the ARM

• ARM microcontrollers have many registers for

arithmetic and logic operations.
• In the CPU, registers are used to store information
temporarily.
• That information could be a byte of data to be
processed, or an address pointing to the data to be
fetched.
• All of ARM registers are 32-bit wide.
• Any data larger than 32 bits must be broken into 32-bit
chunks before it is processed
The General Purpose Registers GPRs in
the ARM
• In ARM there are 13
general purpose registers
GPRs. They are R0–R12.
• To understand the use of
the general purpose
registers, we will show it in
the context of three simple
instructions: MOV, ADD,
and SUB.
• The ARM core has three
special function registers
SFRs of R13, R14, and
R15.
 ARM Instruction Format

The ARM CPU uses the tri-part instruction

format for most instructions. One of the most
common format is:
instruction destination,source1,source2
Depending on the instruction the source2 can
be a
– register,
– immediate (constant) value,
– or memory.
The destination is often a
– register
– or read/write memory.
 MOV Instruction
The MOV instruction copies data into register or
from register to register. It has the following
formats:
MOV Rn,Op2 ;load Rn register with Op2 (Operand2).
;Op2 can be immediate

When programming the registers of the ARM microcontroller with an

immediate value, the following points should be noted:
1. We put # in front of every immediate value.
2. If we want to present a number in hex, we put a 0x in front of it. If we
put nothing in front of a number, it is in decimal. For example, in
“MOV R1,#50”, R1 is loaded with 50 in decimal, whereas in “MOV
R1,#0x50”, R1 is loaded with 50 in hex ( 80 in decimal).
3. If values 0 to FF are moved into a 32-bit register, the rest of the bits
are assumed to be all zeros. For example, in “MOV R1,#0x5” the
result will be R1=0x00000005; that is,
R1=00000000000000000000000000000101 in binary.
4. Moving an immediate value larger than 255 (FF in hex) into the
register will cause an error.
 MOV Instruction Examples
The following instruction loads the R2 register with a value of 0x25 (25 in
hex):

MOV R2,#0x25 ;load R2 with 0x25 (R2 = 0x25)

The following instruction loads the R1 register with the value 0x87 (87 in
hex).

MOV R1,#0x87 ;copy 0x87 into R1 (R1 = 0x87)

The following instruction loads R5 with the value of R7.

MOV R5,R7 ;copy contents of R7 into R5 (R5 = R7)

Notice the position of the source and destination operands. As you can
see, the MOV loads the right operand into the left operand. In other
words, the destination comes first.
 ADD Instruction
The ADD instruction has the following format:

ADD Rd,Rn,Op2 ;ADD Rn to Op2 and store the result in Rd

;Op2 can be Immediate value #K (K is
;between 0 and 255) ;or Register Rm

The ADD instruction tells the CPU to add the

value of Rn to Op2 and put the result into the Rd
(destination) register. As we mentioned before,
Op2 can be an immediate value #K between 0–
255 in decimal (00–FF in hex) or a register Rm.
 ADD Instruction Examples
To add two numbers such as 0x25 and 0x34, one can do
any of the following:

MOV R1,#0x25 ;copy 0x25 into R1 (R1 = 0x25)

MOV R7,#0x34 ;copy 0x34 into R1 (R7 = 0x34)
ADD R5,R1,R7 ;add value R7 to R1 and put it in R5 ;(R5 = R1 + R7)

or

MOV R1,#0x25 ;load (copy) 0x25 into R1 (R1 = 0x25)

ADD R5,R1,#0x34 ;add 0x34 to R1 and put it in R5
;(R5 = R1 + 0x34)

Executing the above lines results in R5 = 0x59 (0x25 +

0x34 = 0x59)
 SUB Instruction
The SUB instruction is like ADD instruction
format. It subtracts Op2 from Rn and put the
result in Rd (destination):

SUB Rd,Rn,Op2 ;Rd=Rn – Op2

To subtract two numbers such as 0x34 and

0x25, one can do the following:

MOV R1,#0x34 ;load (copy) 0x34 into R1 (R1=0x34)

SUB R5,R1,#0x25 ; R5 = R1 – 0x25 (R1 = 0x34 – 0x25)
The Special Function Registers in ARM
In ARM the
• R13 : stack pointer,
• R14 : link register,
– holds the return address when the CPU
calls a subroutine.
• R15 : program counter (PC),
– points to the address of the next instruction.
• and CPSR (current program status
register)
– is used for keeping condition flags
registers are called SFRs (special
function registers) since each one is
dedicated to a specific function.
R15 : The Program Counter (PC) in the ARM
• The program counter is used by the CPU to point to
the address of the next instruction to be executed.
• As the CPU fetches the opcode from the program
memory, the program counter is incremented
automatically to point to the next instruction.
• The wider the program counter, the more memory
locations a CPU can access.
• That means that a 32-bit program counter can access
a maximum of 4G (232 = 4G) bytes of program memory
locations.
 Memory space allocation in the ARM
• The 4G bytes of memory space can be divided into five sections.
1. On-chip peripheral and I/O registers: This area is dedicated to general purpose
I/O (GPIO) and special function registers (SFRs) of peripherals such as timers, serial
communication, ADC, and so on. In other words, ARM uses memory-mapped I/O.
2. On-chip data SRAM: A RAM space ranging from a few kilobytes to several hundred
kilobytes is set aside mainly for data storage. The data RAM space is used for data
variables and stack and is accessed by the microcontroller instructions. The data RAM
space is read/write memory used by the CPU for storage of data variables, scratch pad,
and stack.
3. On-chip EEPROM: A block of memory from 1K bytes to several thousand bytes is
set aside for EEPROM memory. The amount and the location of the EEPROM space
vary from chip to chip in the ARM microcontrollers. Although in some applications the
EEPROM is used for program code storage, it is used most often for saving critical data.
Not all ARM chips have on-chip EEPROM.
4. On-chip Flash ROM: A block of memory from a few kilobytes to several hundred
kilobytes is set aside for program space. The program space is used for the program
code. In today’s ARM microcontroller chips, the code ROM space is of Flash type
memory. The amount and the location of the code ROM space vary from chip to chip in
the ARM products. The code ROM memory can also be used for storage of static fixed
data such as ASCII data strings and look-up tables.

An Example 5. Off-chip DRAM space: A DRAM memory ranging from few megabytes to several
hundred mega bytes can be implemented for external memory connection. Although
of ARM many of the ARM microcontrollers used in embedded products use the on-chip SRAM for
Memory data, one can also design an ARM-based system in which the RAM is used for both data
and program codes.
Allocation
Memory space allocation in the ARM
Memory space allocation in the ARM
Differences among the on-chip Flash ROM, data SRAM, and
EEPROM memories in ARM microcontrollers
a) The data SRAM is used by the CPU for data variables and stack, whereas the
EEPROMs are considered to be memory that one can also add externally to
the chip. In other words, while many ARM microcontroller chips have no
EEPROM memory, it is very unlikely for an ARM microcontroller to have no on-
chip data SRAM.
b) The on-chip Flash ROM is used for program code, while the EEPROM is used
most often for critical system data that must not be lost if power is cut off.
Remember that data SRAM is volatile memory and its contents are lost if the
power to the chip is cut off. Since volatile data SRAM is used for dynamic
variables (constantly changing data) and stack. We need EEPROM memory to
secure critical system data that does not change very often and will not be lost
in the event of power failure.
c) The on-chip Flash ROM is programmed and erased in block size. The block
size is 8, 16, 32, or 64 bytes or more depending on the chip technology. That
is not the case with EEPROM, since the EEPROM is byte programmable and
erasable. Both the EEPROM and Flash memories have limited number of
erase/write cycles, which can be 100,000 or more. While all semiconductor
memories have unlimited number of reads (accesses), the number of times
that we can erase and write to the Flash and EEPROM are limited to around
100,000 times at the time of this writing. As this number increases, the
likelihood that we will have hard drive made out of Flash memory will also
increase. We have already seen how the Flash stick memory has replaced the
floppy drives which were so common into early 2000s.
 Load and Store Instructions in ARM

• The ARM allows direct access to all locations in the

memory.
• All the instructions of the ARM are 32-bit wide. In other
words, every instruction of ARM is fixed at 32-bit.
• The fixed size instruction is one of the most important
characteristics of RISC architecture.
• In cases where there is no need for all the 32-bit, the ARM
has added zero to make the instruction fixed at 32-bit.
 LDR Instruction
LDR Rd,[Rx] ;load Rd with the contents of location pointed
;to by Rx register. Rx is an address between
;0x00000000 to 0xFFFFFFFF

The LDR instruction tells the CPU to load (bring in) one word (32-bit or 4
bytes) from a base address pointed to by Rx into the GPR. After this
instruction is executed, the Rd will have the same value as four consecutive
locations in the memory. Obviously since each memory location can hold
only one byte (ARM is a byte addressable CPU), and our GPR is 32-bit, the
LDR will bring in 4 bytes of data from 4 consecutive memory locations. The
locations can be in the SRAM or a Flash memory.

LDR Example
 LDRB Rd, [Rx] instruction
LDRB Rd, [Rx] ;load Rd with the contents of the location
; pointed to by Rx register.

The LDRB instruction tells the CPU to load (copy) one byte
from an address pointed to by Rx into the lower byte of Rd.
After this instruction is executed, the lower byte of Rd will have
the same value as memory location pointed to by Rx. It must be
noted that the unused portion (the upper 24 bits) of the Rd
register will be all zeros.
This is a widely used instruction for accessing the 8-bit I/O and
peripheral ports.
LDRB Example
 LDRH Rd, [Rx] instruction
LDRH Rd, [Rx] ;load Rd with the half-word pointed
; to by Rx register

The LDRH instruction tells the CPU to load (copy) half-word

(16-bit or 2 bytes) from a base address pointed to by Rx into
the lower 16-bits of Rd Register. After this instruction is
executed, the lower 16-bit of Rd will have the same value as
two consecutive locations in the memory pointed to by base
address of Rx. It must be noted that the unused portion (the
upper 16 bits) of the Rd register will be all zeros.
LDRH Example
 STR Instruction
STR Rx,[Rd] ;store register Rx into locations pointed to by Rd
The STR instruction tells the CPU to store (copy) the contents of
the GPR to a base address location pointed to by the Rd register.
Notice that the source register of STR instruction is placed before
the destination register. Obviously since GPR is 32-bit wide (4-
byte) we need four consecutive memory locations to store the
contents of GPR. The memory locations must be writable such as
SRAM.

STR Example
 STRB Rx,[Rd] instruction
STRB Rx, [Rd] ;store the byte in register Rx into
;location pointed to by Rd

The STRB instruction tells the CPU to store (copy) the byte value
in Rx to an address location pointed to by the Rd register. After this
instruction is executed, the memory locations pointed to by the Rd
will have the same byte as the lower byte of the Rx.
This is a widely used instruction for accessing the 8-bit I/O and
peripheral ports.

STRB Example
STRB Example
 STRH Rx,[Rd] instruction
STRH Rx, [Rd] ;store half-word (2-byte) in register Rx
;into locations pointed to by Rd
The STRH instruction tells the CPU to store (copy) the lower 16-bit
contents of the Rx to an address location pointed to by the Rd
register. After this instruction is executed, the memory locations
pointed to by the Rd will have the same value as the lower 16-bit of
Rx Register. The locations are part of the data read/write memory
space such as on-chip SRAM.

STRH Example