CHAPTER 2

BASIC ARCHITECTURE OF 8086

MICROPROCESSORS
 OUTLINE:
 Overview of 8086 Microprocessor
 Memory segmentations
 Internal architecture of the 8086
microprocessors
 BIU
 EU
Overview of 8086 μp
 First 16-bit processor released by INTEL in the year
1978.
 It has a 16-bit ALU; this means 16-bit numbers are
directly processed by the 8086.
 It has a 16-bit data bus, so it can read data or write
data to memory or I/O ports, either 16 bits or 8 bits at
20

a time.
 It has 20 address lines so that it can address up to 2
(1 MB).
 Cont…

 It is a 40-pin configuration.

 It has multiplexed addresses and data bus

( AD0-AD15 AND A16-A19)
 It has more than 29,000 transistors.
Memory segmentations

4
 Cont…

 All real (physical or absolute) memory addresses

must consist of a segment address plus an offset
address.
 The segment address defines the beginning
address of any 64 K-byte memory segment
 The offset address selects any location within the
64 K-byte memory segment.
 The microprocessor must generate a 20-bit
5
Cont….
Internal architecture of the 8086
microprocessor
 Cont…

 8086 has two blocks named BIU and EU.

 The BIU handles all transactions of data and addresses

on the buses for the EU.
 The EU performs decode and executes instructions
from the instruction system byte queues.
 BIU and EU work in parallel.
1. Bus Interface Unit(BIU)
 Cont…

 The main purpose of BIU is:-

 Fetch instruction from memory
 Read data from IO and memory
 Write data into the IO and memory
 The BIU has 4 functional Parts. These are:-
 Segment Register(CS,DS,SS,ES)
 Instruction Pointer-IP
 Instruction queue
 Adder
BIU……. Segment Register
 8086 has four segment registers that are associated with
memory segments.
 Code segment Register
 Stack segment Register
 Extra segment Register
 Data segment Register
 All are 16-bit registers.
 Cont…

 The segment register of BIU is used to store the

starting address of the Memory segment.

 BIU generates a 20-bit address using the values of this

segment register and the offset pointer and index

register.
BIU…….Code segment
register (CSR)
 16-bit register

 Tell us the address of the code segment in memory.

 CS contains the base or start of the current code

segment.
 During fetching the instruction from memory( CS), it
uses the values of this register to calculate the physical
address.
BIU……….Data Segment
Register(DSR)
 16-bit
 Points to the current data segment in the memory.

 Operands/data for most instructions are fetched by

this segment.
 During fetching the data from memory( DS), it uses the
values of this register to calculate the physical address.
 BIU…..Extra Segment
Register(ESR)
 16-bit

 Points to the extra segment in which data (more than

64kb pointed to by the DS) is stored.
 During fetching the data from memory( ES), it uses the
values of this register to calculate the physical address.
BIU……Stack Segment Register (SSR)
 16-bit

 Points to the current stack.

 Store the address of the stack segment in memory.

 The 20-bit physical address is calculated from the Stack

Segment (SS) and offset address for stack instructions
such as PUSH and POP.
Cont..
 BIU…………… Instruction Pointer-IP :
 It is a 16-bit register that keeps the address of memory
locations of the coming instruction to be executed.
 Store the address of the next instruction to be executed.

 Always points to the next instruction to be executed

within the currently executing code segment.
 It is also known as an offset register, because it stores the
offset value of the next instruction address.
 BIU…………… Instruction
queue:
 Instruction queue: is a group of high-speed registers that
are used to save pre-fetched instructions before executed
by the EU.
 A group of First-In-First-Out (FIFO) in which up to 6 bytes of
instruction code are pre-fetched from the memory ahead of
time.
 This is done to speed up the execution by overlapping
instruction fetch with execution. ( pipelines concept)
 Within its 16-bit data bus, BIU fetches 2-byte instructions in a
single memory cycle..
2. Execution unit(EU)
 2. Execution unit(EU)
 The EU informs the BIU form where the next
instruction or data is to be fetched.
 The EU performs the following functions :

 It picks up the instruction from the instruction

queues of the BIU.
 It decodes the instruction and then executes it.

 It updates the status of the flag register.

EU….
 There are different functional parts to perform the
above function. These are:-
 Control unit

 ALU

 General-purpose register

 Flag register
 Control system
 It controls and coordinates all the activities of sub-units.

 It fetches, decodes instructions.

 It gives control signals like read and write.

ALU of EU
 It performs all the arithmetic and logical operations.

 The result may be stored in a general-purpose register

or an index register.
 It updates the Flag register after every instruction.
 General Purpose Register

 The EU has four general-purpose registers.

 These registers are used to access data very fast. These

are:-
 Accumulator register

 Base Register

 Counter register

 Data register
Cont…GPR
Accumulator Register (AX)
 Consists of two 8-bit registers AL and AH, which can be
combined and used as a 16-bit register AX.
 AL in this case contains the low-order byte of the word,
and AH contains the high-order byte.
 Multiplication and Division instructions also use the AX
or AL.
Cont…GPR
Base Register (BX)
 Consists of two 8-bit registers, BL and BH, which can be combined
together and used as a 16-bit register, BX.
 BL in this case contains the low-order byte of the word, and BH
contains the higher-order byte.
 This is the only general-purpose register whose contents can be used
for addressing the 8086 memory.
 All memory references utilizing this register content for addressing
use DS as the default segment register.
Data register(DX):
 Consists of two 8-bit registers DL and DH, which can be combined
together and used as a 16-bit register DX.
 It is used for MUL and DIV operations and also for I/O operations.
Cont…EU
Counter Register (CX)

 Consists of two 8-bit registers, CL and CH, which can be

combined together and used as a 16-bit register, CX.
 When combined, the CL register contains the low-order
byte of the word, and CH contains the high-order byte.
 Instructions such as SHIFT, ROTATE, and LOOP use
the contents of CX as a counter.
 Pointer and Index register
 Used to keep the offset address.
 In case of SP and BP is the default reference is to form
the physical address in the stack segment.
 SP ( stack pointer) is used with SSR to access data in the
stack segment in memory.
 BP(base pointer)
 Primarily used to access data on the stack segment.
 Can be used to access data in another segment.
Cont…
 SI: source index register
 It is required for some string operations.
 When the string operations are performed, the SI
register points to memory locations in data segments,
which are addressed by the Data Register.
 DI: Destination Index register
 It is also required in string operations.
 It is associated with the ES in string operations.
 When a string operation is performed, the DI register
points to DS in which is addressed by the ES register.
cont…
 Flag register
The Flags Register determines the current state of the processor.
 They are modified automatically by the CPU after mathematical
operations
 This allows us to determine the type of the result.

 Collection of condition bits and control bits.

 The condition bits are set or cleared by the execution of an
instruction.
 The control bits are set by instructions to control some operations of
the CPU.
Status flag
Control flag
Cont.…
Summery
37