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TEE2027 (Part1) Lecture - Topic 4 - MOSFET

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0% found this document useful (0 votes)
50 views31 pages

TEE2027 (Part1) Lecture - Topic 4 - MOSFET

Uploaded by

rashok.ece
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd

TEE2027 Electronic Circuits

Metal Oxide Semiconductor Field Effect


Transistor (MOSFET)
Introduction
o Operation of a MOSFET can be explained
using the operation of a capacitor
connected to a DC source.

o In MOSFET, a piece of metal is separated


from a semiconductor substrate by a thin
layer of oxide which is an insulator.
Metal Oxide Semiconductor  MOS

o The substrate can be either p-type or n-type


o Let us consider a p-type substrate to understand how a MOSFET works.
o We can extend those ideas to an n-type substrate.
Introduction
Apply a voltage between the metal and the semiconductor:

o Holes in the p-type semiconductor o Holes are pushed away from the
are pushed towards the oxide- interface creating a negative space-
semiconductor interface charge region.
o A thin channel of electrons is enhanced underneath the oxide layer if the
voltage is applied as shown in the right-side image.
o This electron inversion layer can be used as a conductor.
Introduction
Structure of n-channel MOSFET
o Three terminals: Gate, Source and Drain.
o The regions under the source and the
gate are heavily doped n-type for a p-
type substrate.
o These regions are heavily doped p-type
for an n-type substrate

o If the gate terminal is left open, the source


and drain are separated by a p-type region.
o Effectively two back-to-back diodes Source Drain

o No current when a voltage is applied


between source and drain (cut-off)
Substrate
Introduction
Transistor Operation
o If large enough voltage is applied to the Gate
w.r.t. substrate, a channel is created.
o Positive gate voltage for p-type substrate and
negative gate voltage for n-type substrate
o Current flows if a voltage is applied between
the source and the drain.
o Depth of the channel and, hence, its conductance can be varied by varying
the voltage applied to the gate.
o Channel does not naturally exist in this case; it is created by the gate voltage
 enhancement mode MOSFET.
o In another type of MOSFET, the channel exists naturally, and its depth is
controlled by the gate voltage  depletion mode MOSFET.
Circuit Symbol
N-Channel o The source is shorted to the substrate.
o Enhancement mode channel is shown using
broken line while depletion mode channel is
shown using continuous line.
Enhancement Depletion o The arrow is used to distinguish between n-
P-Channel channel and p-channel

Enhancement Depletion
ID
D Simplified symbol MOSFET
+
VGS: Gate voltage
Gate is insulated (used in this note)
+ VDS
- ID : Drain current
from the rest of
VGS -
G

VDS: Drain-to-Source voltage


the MOSFET. Gate
current is always S
0.
ID-VDS Graphs
Threshold Voltage, VTH
o This is the minimum voltage required to create
the channel.
o If VGS > VTH, the channel is formed.

o With channel formed, if a voltage VDS is applied, a


ID current flows through the channel. VGS > VTH

o For small VDS, the current is proportional to


VGS2 > VGS1 VDS
VDS.
o If VGS is increased, the channel goes deeper
VGS1 > VTH
into the substrate reducing the resistance to
current flow.
VDS
VGS < VTH
ID-VDS Graph
o For a given VGS,
o Beyond a certain value of drain-to-source
voltage VDS,sat, the current does not increase
significantly with increasing VDS.
VDS << VDS,sat
ID  VDS VDS = VDS,sat VDS > VDS,sat

Current still flows but


is not changed by
ID-VDS Graph
D
iD + RD
RG
G
vDS
+ VDD
VGG vGS -
- S

For non-saturation region:


𝑖 𝐷 = 𝐾 𝑛 [ 2 ( 𝑣 𝐺𝑆 − 𝑣 𝑇 ) 𝑣 𝐷𝑆 − 𝑣 2𝐷𝑆 ] vGS > VT > 0

For saturation region:

The saturation voltage


2
𝑖 𝐷=𝑖 𝐷 , 𝑠𝑎𝑡 = 𝐾 𝑛 ( 𝑣 𝐺𝑆 − 𝑣 𝑇𝐻 )

Kn is called conduction parameter. VDS,sat increases with


Its value depends on the increasing
𝑉 𝐷𝑆 , 𝑠𝑎𝑡V=𝑉
GS. 𝐺𝑆 −𝑉 𝑇𝐻
geometrical dimension of the
channel, and capacitance of the
ID-VDS Graph
Conduction parameter
𝜇 𝑛 𝑊 𝐶 𝑜𝑥
𝐾 𝑛=
2𝐿

W : width of the channel


L : length of the channel
o iD

Cox : oxide capacitance per unit area


o

n : mobility of electrons in the channel


o

region
o
[F (farad)] Channel
region

Thickness of the oxide layer


𝐶 𝜀 [F/m2]
Then capacitance per unit area: 𝐶 𝑜𝑥 = =
𝐴 𝑡 𝑜𝑥
ID-VDS Graph
Conduction parameter
o If the datasheet does not give the value of Kn , how can we estimate it?
o Look for any ID value given for which VGS > VTH and VDS > (VGS – VTH).
𝑚𝐴
2
𝐼 𝐷 = 𝐾 𝑛 ( 𝑉 𝐺𝑆 −𝑉 𝑇𝐻 ) 1 .5= 𝐾 𝑛 ( 1 0 − 0.8 )
2
𝐾 𝑛=17.7
𝑉2
Modes of operation
Assuming body is shorted to source, D
iD + RD
RG
and both are grounded. G
vDS
+ VDD
VGG vGS -
- S

Mode of Gate-to-Source Drain-to-Source Drain Current Applications


Operation Bias (vGS > 0) Bias (vDS > 0) (iD – into Drain)

Cut-off vGS < VTH N.A. iD = 0 CMOS Logic –


OFF state

Non- vGS  VTH vDS  vGS – VTH iD = f (vDS ,vGS) CMOS Logic –
saturation ON state

Saturation vGS  VTH vDS  vGS - VTH iD = f (vGS) Amplifier


N-MOSFET & P-MOSFET
D
iD + RD VSG + S
RG
G RG - iS +
vDS G
+ VSD
VDD VDD
VGG vGS -
- S VGG -
D
RD

To create channel: 𝑉 𝐺𝑆 > 𝑉 𝑇𝐻 To create channel: ¿𝑉 𝐺𝑆 ∨¿∨𝑉 𝑇𝐻 ∨¿


For non-saturation region: For non-saturation region:
𝑖 𝐷= 𝐾 𝑛 [ 2 ( 𝑣 𝐺𝑆 − 𝑉 𝑇𝐻 ) 𝑣 𝐷𝑆 − 𝑣 2𝐷𝑆 ] ¿ 𝑖 𝐷∨ ¿ 𝐾 𝑝 ¿

For saturation region: For saturation region:


2
𝑖 𝐷=𝑖 𝐷 , 𝑠𝑎𝑡 = 𝐾 𝑛 ( 𝑣 𝐺𝑆 − 𝑣 𝑇𝐻 ) ¿ 𝑖 𝐷 ∨ ¿∨ 𝑖𝐷 , 𝑠𝑎𝑡 ∨¿ 𝐾 𝑝 ¿ ¿
Condition for saturation: Condition for saturation:
𝑣 𝐷𝑆 ≥ 𝑣 𝐺𝑆 −𝑉 𝑇𝐻 ¿𝑣 𝐷𝑆 ∨≥∨𝑣 𝐺𝑆 ∨−∨𝑉 𝑇𝐻 ∨¿
MOSFET: DC Circuit Analysis
Device parameters: VTH = 1 V, Kn = 0.1
mA/V2.
5V

Calculate ID and VDS of this enhancement


30 kΩ 20 kΩ mode n-channel MOSFET.

20 kΩ
Large Signal Model (Saturation Region)
o For an n-channel MOSFET in the saturation region, i.e.,
𝑉 𝐺𝑆 > 𝑉 𝑇𝐻 and 𝑉 𝐷𝑆 ≥𝑉 𝐷𝑆, 𝑠𝑎𝑡 =𝑉 𝐺𝑆 −𝑉 𝑇𝐻

o As there is no gate current: 𝐼 𝐺= 0 Open circuit between gate & channel

o The drain current is controlled by gate-to-source voltage


2
𝐼 𝐷 = 𝐼 𝐷 , 𝑠𝑎𝑡 = 𝐾 𝑁 ( 𝑣 𝐺𝑆 −𝑉 𝑇𝐻 ) Dependent current
source
D IG = 0 ID
G D
ID + +
IG = 0 + VGS VDS Kn (VGS - VTH)2
G VDS
is equivalent to - -
+ -
VGS IS
- IS
S
S
(vGS – VTH) is also known as the Gate-Overdrive, and it is also the minimum vDS to keep the MOSFET in the saturation region.
Large Signal Model (Non-saturation Region)
For an n-channel MOSFET: 𝑣 𝐺𝑆 >𝑉 𝑇𝐻 , 𝑣 𝐷𝑆 <𝑣 𝐷𝑆, 𝑠𝑎𝑡 =𝑣 𝐺𝑆 − 𝑉 𝑇𝐻

o Drain current: 𝐼 𝐷 = 𝐾 𝑁 [ 2 ( 𝑉 𝐺𝑆 −𝑉 𝑇𝐻 ) 𝑉 𝐷𝑆 −𝑉 2𝐷𝑆 ]

o For small VDS, we can neglect the square term: 𝐼 𝐷 ≈ 2 𝐾 𝑁 ( 𝑉 𝐺𝑆 − 𝑉 𝑇𝐻 ) 𝑉 𝐷𝑆


The channel acts like a resistanc
1
o Drain-to-source resistance (for small VDS): 𝑅 𝐷𝑆 ≈
2 𝐾 𝑁 ( 𝑉 𝐺𝑆 − 𝑉 𝑇𝐻 )
D
ID
G
D
ID
+ +
IG = 0 + For small IG = 0 VGS VDS RDS = 1/[2Kn(VGS - VTH)]
G VDS
+ - - -
VGS IS
- IS
S
S
DC Analysis
Example #1
Find the current ID and the voltage VD. Assume that µnCox = 2.0 ×10-5 A/V2, W/L
= 5, and VTH = 1 V.
10 V
VDD
2.0 × 10
−5
( )
𝐴
×5

( )
2
10 V 𝜇 𝑛 𝑊 𝐶 𝑜𝑥 𝑉 −5 𝐴
𝐾 𝑛= = =5 × 10
2𝐿 2 𝑉
2
RD
R1 5 kW
5 kW ID D
o Since gate current is zero, you can use voltage
IG divider rule to find the gate voltage:
G 5𝑘
𝑉 𝐺𝑆 = ×10 𝑉 =5 𝑉 .
S 5 𝑘+ 5 𝑘
R2
5 kW IS o You can also use Thevenin equivalent of the gate-
biasing circuit to find

Gate-biasing circuit
DC Analysis
Example #1 (contd…) o Assume saturation mode (need to check later)
10 V o Replace MOSFET with the large-signal model
2
RD 𝐼 𝐷 = 𝐼 𝐷 , 𝑠𝑎𝑡 = 𝐾 𝑛 ( 𝑉 𝐺𝑆 −𝑉 𝑇𝐻 )
5 kW
2.5 kW IG = 0 ID 𝑉 𝐺𝑆 =5 𝑉 ,𝑉 𝑇 =1 𝑉
D
G
+ 𝐴 𝑚𝐴
𝐾 𝑛=5× 10− 5 =0.05
5V
+ VGS 𝑉2 𝑉2
- - Kn(VGS-VTH)2
IS = ID
S

Large Signal Model for


N-MOSFET in Saturation
DC Analysis
Example #2
A 5 kΩ resistance is connected between the N-MOSFET source and ground. MOSFET is the
same as in the previous example. Determine the values of ID and VD.

VDD = 10 V o Gate voltage VG = 5 V


o We can’t say what VGS is as S is not connected to GND like in
RD
R1 the previous example.
5 kW
5 kW ID
𝑉 𝐺𝑆 =𝑉 𝐺 −𝑉 𝑆=𝑉 𝐺 − 𝐼 𝐷 𝑅 𝑆
D
IG o Assume that the MOSFET is in saturation (need to check
G later) and find the drain current in saturation:
R2 IS = ID S 𝐼 𝐷 = 𝐾 𝑛 (𝑉 𝐺𝑆 −𝑉 𝑇 )2
5 kW
RS 𝐼 𝐷 = 𝐾 𝑛 ( 𝑉 𝐺 − 𝐼 𝐷 𝑅𝑆 −𝑉 𝑇 ) 2
5 kW

𝐼 𝐷 =0.05
𝑚𝐴
𝑉 ( )
2
× ( 5 𝑉 − 𝐼 𝐷 × 5 −1 𝑉 )
2

2
𝐼 𝐷 =0.05 × ( 4 − 5 𝐼 𝐷 )
DC Analysis
Example 2 (continued) 𝐼 𝐷 =0.05 × ( 4 − 5 𝐼 𝐷 ) 2 in mA
10 V 10 V RS in kΩ
Note that the
voltage at the
RD
o Solving this quadratic equation,
R1 gate VG is 5 V, as
5 kW IG = 0. 5 kW 𝐼 𝐷 =2.09 𝑚𝐴𝑜𝑟 0.31 𝑚𝐴
ID
IG = 0
D o ID = 2.09 mA cannot be a solution because
G
+ that will require VS > 10 V
VGS
R2
5 kW - Kn(VGS-VTH)2 o ID = 0.31 mA is the solution and
IS = ID
S
𝑉 𝐷 =8.45 𝑉 ,𝑉 𝑆 =1.55 𝑉
RS
5 kW 𝑉 𝐷𝑆 = 6.90𝑉 , 𝑉 𝐺𝑆 =3.45 𝑉
 Check that MOSFET is indeed in saturation: & .
Large-Signal Model for
N-MOSFET in Saturation
Small Signal Model (AC Analysis)
o Small-signal model is needed when we want to analyze MOSFET amplifier
VDD VDD = 10 V VDD = 10 V
RD ID RD RD
5 kW 5 kW id
iD 5 kW
D
RG IG
D

+
D i

=
RG i G RG g
G G
G S vs S
vs
S VGG + IS is
+ =5V -
VGG iS
-

DC Analysis AC Analysis
Find ID and VDS for Find id and vds for given vs at
𝑣 𝐺𝑆 =𝑉 𝐺𝑆 +𝑣 𝑔𝑠
given VDD & VGG the operating point (ID, VDS)
𝑣 𝐷𝑆 =𝑉 𝐷𝑆 + 𝑣 𝑑𝑠
Large-signal model Small-signal model
𝑖 𝐷= 𝐼 𝐷 +𝑖𝑑
Small Signal Model (ac analysis)
𝑖𝑑 iD
o At the operating point, =𝑠𝑙𝑜𝑝𝑒𝑜𝑓 𝑡h𝑒 𝑔𝑟𝑎𝑝h
𝑣 𝑔𝑠
Gradient at Q
o We need to find the slope of the graph Small change
in drain current. ==
𝑖 𝐷= 𝐾 𝑛 ( 𝑣 𝐺𝑆 − 𝑉 𝑇𝐻 )2 ID + i d

¿¿
id
ID Bias Point Q

Small change
in gate-to
source voltage.
vgs
𝑖𝑑
o Therefore, =2 𝐾 𝑛 ( 𝑉 𝐺𝑆 −𝑉 𝑇𝐻 ) =𝑔𝑚 vGS
𝑣 𝑔𝑠 VT VGS

𝑖𝑑 =𝑔𝑚 𝑣 𝑔𝑠 G
ig = 0 id
D
+ +
o Transconductance of MOSFET: vgs vds gmvgs
- -
𝑔 𝑚=2 𝐾 𝑛 ( 𝑉 𝐺𝑆 − 𝑉 𝑇𝐻 )
is
S
MOSFET Amplifier VDD

RD
o In the presence of an ac (small signal) source: iD 5 kW

+
𝑣 𝐺𝑆 =𝑉 𝐺𝑆 +𝑣 𝑔𝑠 RG i G
D

vDS
𝑉 𝐷𝐷 −𝑉 𝐷𝑆 𝑉 𝐷𝐷 1
𝑖 𝐷= = − 𝑉 𝐷𝑆
𝑖 𝐷= 𝐼 𝐷 +𝑖𝑑
-
𝑅𝐷 𝑅𝐷 𝑅𝐷
G
vs
S
𝑖𝑑 + iD
=𝑔𝑚 VGG
-
𝑣 𝑔𝑠

ID ID

VTH VGS
𝑣 𝐷𝑆 =𝑉 𝐷𝑆 + 𝑣 𝑑𝑠
Large Signal Model (p-MOSFET)
o In the saturation region: under dc condition -
S S
+ IS
VSG IS
VTH for P-MOSFET
G - is negative.
+
IG = 0 is equivalent to VSG
ID Kp (|VGS| - |VTH|)2
G
-
D
D IG = 0 ID

o In the non-saturation region: under dc condition -


S S
+ IS IS
VSG
G
- +
is equivalent to RDS =
VSG
IG = 0 1/[2Kp(|VGS| - |VTH|)]
ID
G
-
D
IG = 0 ID
D
Channel Modulation Effect

o Ideal iD-vDS graph


o In saturation mode, iD is not affected by
any change in the vDS
2
𝑖 𝐷=𝑖 𝐷 , 𝑠𝑎𝑡 = 𝐾 𝑛 ( 𝑣 𝐺𝑆 − 𝑣 𝑇𝐻 )

o For a real (non-ideal)


MOSFET
o The drain current iD
is affected by
changes in the vDS
Channel Modulation Effect

o Graphs in the saturation mode are slightly slanted.


o All characteristic graphs when extrapolated meet at a common point on the negative voltage
axis
o That voltage is called Early voltage
o VA is typically large, e.g., 100 V
o The parameter  = 1/VA is called the channel length modulation factor
o For an N-channel MOSFET,

(
𝑖 𝐷= 𝐾 𝑛 ( 𝑣 𝐺𝑆 −𝑣 𝑇𝐻 )2 1+
𝑣 𝐷𝑆
𝑉𝐴 ) 2
𝑖 𝐷= 𝐾 𝑛 ( 𝑣 𝐺𝑆 − 𝑣 𝑇𝐻 ) ( 1+  𝑣 𝐷𝑆 )
MOSFET: AC Analysis
o Suppose a MOSFET is biased to operate in the saturation mode. This mode is used for
amplifier application.
o A small ac voltage is superimposed to the gate voltage

o Both DC source VGG and AC signal vS contribute to the drain


current
o We can find the DC drain current using the formula,

2
𝐼 𝐷 = 𝐾 𝑛 ( 𝑉 𝐺𝑆 − 𝑉 𝑇𝐻 ) ( 1+  𝑉 𝐷𝑆 ) N-channel

¿ 𝐼 𝐷 ∨¿ 𝐾 𝑛 ( ¿ 𝑉 𝐺𝑆 ∨−∨ 𝑉 𝑇𝐻 }) ¿ P-channel
2

o Next, we learn how to find the contribution (id) due to the ac


source while the MOSFET operates at the point determined
by the DC analysis. Then,
𝒊 𝑫 = 𝑰 𝑫+ 𝒊 𝒅
MOSFET: AC Analysis
o Drain current in the saturation mode due to DC bias
only (for n-channel):
Early effect is ignored

o Drain current due to DC+AC:

o Small change in iD due to small change in vGS at the


operating point can be approximated using the slope of
this graph.

𝟐𝑰𝑫
Transconductance: 𝒈 𝒎 =𝟐 𝑲 𝒏 ( 𝑽 𝑮𝑺 −𝑽 𝑻𝑯 )= =𝟐 √ 𝑲 𝒏 𝑰 𝑫
( 𝑽 𝑮𝑺 − 𝑽 𝑻𝑯 )
MOSFET: Output Resistance
o Output resistance models a small change in drain current (id) due to a small change in drain-
to-source voltage (vds)
𝑣 𝑑𝑠
𝑟𝑜=
𝑖𝑑

For ideal case, output resistance is infinity. For non-ideal case, slope of the graph is
the inverse of the output resistance.
MOSFET: Output Resistance
o The id in the non-ideal case is related to vds by the equation:

𝑖 𝐷= 𝐾 𝑛 ( 𝑣 𝐺𝑆 −𝑉 𝑇𝐻 ) 1+2
𝑉𝐴 (
𝑣 𝐷𝑆
)
2
𝜕 𝑖𝐷 𝐾 𝑛 ( 𝑣 𝐺𝑆 −𝑉 𝑇𝐻 ) 𝐼𝐷
= ≈
𝜕 𝑣 𝐷𝑆 𝑉𝐴 𝑉𝐴

𝑉𝐴
𝑟𝑜=
𝐼𝐷
For non-ideal case, slope of the graph is
the inverse of the output resistance.

Small-signal (ac) model of MOSFET


MOSFET: Bulk (or Body) Effect
o It was assumed so far that the source is shorted to the
substrate.
o If that is not the case, then change in the source to
substrate voltage can change the drain current  Bulk or
Body effect.

o If vsb changes momentarily, the threshold voltage is changed


and hence the drain current is changed.
o This can be modeled as a dependent current source
whose magnitude changes due to changes in vsb.

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