Sequential Machine

1
 Design of Sequential Circuit

Step 1: STATE DIAGRAM / TIMING DIAGRAM (describes the behavior of the circuit).
Step 2: STATE TABLE
Step 3: REDUCE TO MINIMUM THE NUMBER OF STATES
Step 4: STATE ASSIGNEMENT (if required)
Step 5: DEFINE THE NUMBER OF FLIP-FLOPS NEEDED AND ASSIGN LETTER SYMBOLS
Step 6: DECIDE THE TYPE OF FLIP-FLOP
Step 7: DERIVE CIRCUIT EXCITATION TABLE
Step 8: OBTAIN THE EXPRESSION FOR CIRCUIT OUTPUT AND INPUT FLIP-FLOP
Step 9: IMPLEMENT THE CIRCUIT

2
 Example 1

Step 1: State Diagram Step 2: State Table

x : input
0/0
y : output

1/0 a Present State ​ Next State ​ Output y​

1/1

1/0 ​ x = 0​ x = 1​ x=0​ x = 1​
c b
a​ a​ c​ 0​ 0​
0/1 c​ d​ c​ 0​ 0​
0/0 0/0
b​ b​ a​ 1​ 1​
d
d​ b​ d​ 0​ 0​

1/0

3
 Example 1

Step 3: State Reduction

The number of states can be reduced using state reduction method. For two different states S 1 and
S2 to be reduced we need Next State to be the same for S 1 and S2 with the same output.
Not possible in this case
Step 5: Number of Flip-Flop & Assigned letter symbol

Step 4: State Assignment Number of bits per state = Number of Flip-Flops

a 00 We have 2-bit per state 2 Flip-Flops
QA = A
b 10
QB = B
c 01
Step 6: Type of Flip-Flop
d 11
T Flip-Flop

4
 Example 1

Present Next State Output y Step 7: Circuit Excitation Table CLK T Qn+1
State
0 X Qn
x=0 x=1 x= Present State Next State Output
+x = 1 +
0 QA QB x QA QB TA TB y 1 0 Qn
a a c 0 0 0 0 0 0 0 0 0 0 1 1 Qn
c d c 0 0 0 0 1 0 1 0 1 0
b b a 1 1 0 1 0 1 1 1 0 0
d b d 0 0 0 1 1 0 1 0 0 0 Qn Qn+1 T
1 0 0 1 0 0 0 1 0 0 0
a 00 1 0 1 0 0 1 0 1 0 1 1
b 10 1 1 0 1 0 0 1 0 1 0 1
c 01 1 1 1 1 1 0 0 0 1 1 0
d 11

5
 Example 1

Step 8: Obtain The Circuit Output & Flip-Flop Input Expressions

QB x QB x QB x
QA 00 01 11 10 QA 00 01 11 10 QA 00 01 11 10
Present State 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0
1 0 1 0 0 1 0 0 0 1 1 1 1 0 0

TA = QA QB x + QA QB x TB = QA QB x + QA QB x y = Q A QB

6
 Example 1

Step 9: Implement The Circuit

x

TA QA

QA

TB QB
y

QB

7
 Example 2
Step 1: State Diagram Step 2: State Table
0/0
Present Next State Output
State
a

0/0 1/0
0/0 x=0 x=1 x=0 x=1
0/0 a a b 0 0
0/0
b c
b c d 0 0
g 1/0 c a b 0 0
1/0
d e f 0 1
1/1 d 0/0
e e a f 0 1

0/0
1/1 f g f 0 1
1/1 g a f 0 1
f

1/1

8
 Example 2
Step 3: State Reduction

If the next state and output of two present states are the same, then we can eliminate one of them

P.S N.S Output P.S N.S Output

x=0 x=1 x=0 x=1 x=0 x=1 x=0 x=1

a a b 0 0 a a b 0 0
b c d 0 0 b c d 0 0 State e = State g
c a b 0 0 c a b 0 0 State d = State f
d e f 0 1 d e f 0 1
e a f 0 1 e a f 0 1
f g f 0 1 f e f 0 1
g a f 0 1

9
 Example 2
Step 3: State Reduction Step 4: State Assignment

0/0
a 000
P.S N.S Output
a
b 001
x=0 x=1 x=0 x=1 0/0 c 010
0/0
1/0
a a b 0 0
d 011
b c d 0 0 0/0
e b c e 100
c a b 0 0 0/0
1/0
d e d 0 1
1/1 1/0
e a d 0 1
d

1/1

1
0
 Example 2
Step 7: Circuit Excitation Table

Present State Next State Output

QA QB QC x QA QB QC JA KA JB KB JC KC y

0 0 0 0 0 0 0 0 X 0 X 0 X 0
0 0 0 1 0 0 1 0 X 0 X 1 X 0
Qn Qn+1 J K
0 0 1 0 0 1 0 0 X 1 X X 0 0
0 0 0 X
0 0 1 1 0 1 1 0 X 1 X X 0 0 0 1 1 X
0 1 0 0 0 0 0 0 X X 1 0 X 0 1 0 X 1
0 1 0 1 0 1 1 0 X X 0 1 X 0 1 1 X 0
0 1 1 0 1 0 0 1 X X 1 X 1 0
0 1 1 1 0 1 1 0 X X 0 X 0 1
1 0 0 0 0 0 0 X 1 0 X 0 X 0
1 0 0 1 0 1 1 X 1 1 X 1 X 1

1
1
 Example 2
Step 8: Obtain The Circuit Output & Flip-Flop Input Expressions
QC x QC x QC x QC x
QAQB 00 01 11 10 QAQB 00 01 11 10 QAQB 00 01 11 10 QAQB 00 01 11 10
0 X
0 1 1 X X X
0
0 00
X
00 0 0 00 X X X 00

01 0 0 0 1 01 X X X X 01 X X X X 01 1 0 0 1

11 X X X X 11 X X X X 11 X X X X 11 X X X X

10 X X X X 10 1 1 X X 10 0 1 X X 10 X X X X

JA = QB QC x’ KA = 1 JB = QC + Q A x KB = x’
QC x QC x QC x
QAQB 00 01 11 10 QAQB 00 01 11 10 QAQB 00 01 11 10
0 X
X 0
0
00 1 X 00 X 0 00 0 0 0

01 0 1 X X 01 X X 0 1 01 0 0 1 0
11 X X X X 11 X X X X 11 X X X X
10 0 1 X X 10 X X X X 10 0 1 X X

JC = x KA = QB x’ y = QB QC x + Q A x
1
2
Example 2
x

J Q J Q J Q
A B C
K K K

1
3
Pattern Detector

x
Sequence Detector y
clk

When a stream of bits is provided as input while the clock signal is in a high
state, a specific pattern or sequence is identified. Once this sequence is
detected, the output signal transitions to a high state and subsequently
returns to a low state.

1
4
 Example
Design a Sequence Detector to detect three or more consecutive 1’s is a string of bits coming
through an input line

x=00111011110
y = 0 0 1 0 0 0 1 1 0 0 0 Overlapping allowed
y = 0 0 1 0 0 0 0 1 0 0 0 Overlapping not allowed

S0 receive 0
S1 receive 01
S2 receive 11
S3 receive 111
 Example : overlapping allowed
State Assignment:

0/0 Present State Next

S0 0 0 State
S0 1/0 S1 0 1 QA QB x QA QB y DA DB
0/0

1/1 S2 0 0 0 0 0 0 0 0 0 0
0/0 S3 0 1 0 0 1 0 1 0 0 1
S3 S1
0/0
0 1 0 0 0 0 0 0
Qn Qn+1​ D​ 0 1 1 1 0 0 1 0
1/1 1/0
S2 0 0​ 0​ 1 0 0 0 0 0 0 0
0 1​ 1​ 1 0 1 1 1 1 1 1 1
6
D Flip-Flop D A = Q+A 1 0​ 0​ 1 1 0 0 0 0 0 0
DB = Q+B 1 1​ 1​ 1 1 1 1 1 1 1 1

1
6
 Example

QB x QB x QB x
QA 00 01 11 10 QA 00 01 11 10 QA 00 01 11 10
0 0 0 1 0 0 0 1 0 0 0 0 0 0 0

1 0 1 1 0 1 0 1 1 0 1 0 1 1 0

DA = QA x + QB x DB = QB x + QA x y = QA x

1
7
 Example

D Q D Q
A B
Q