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2020 – today
- 2022
[c21]Mostafa Rizk
, Dominique Heller, R. Douguet, Amer Baghdadi, Jean-Philippe Diguet:
Optimization of Deep-Learning Detection of Humans in Marine Environment on Edge Devices. ICECS 2022 2022: 1-4- [c20]Dominique Heller, Mostafa Rizk, R. Douguet, Amer Baghdadi, Jean-Philippe Diguet:
Marine Objects Detection Using Deep Learning on Embedded Edge Devices. RSP 2022: 1-7 - 2020
- [c19]Erwan Moréac, El Mehdi Abdali, François Berry, Dominique Heller, Jean-Philippe Diguet:
Hardware-in-the-loop simulation with dynamic partial FPGA reconfiguration applied to computer vision in ROS-based UAV. RSP 2020: 1-7
2010 – 2019
- 2019
- [c18]Julien Mazuet, Ill-Ham Atchadam, Dominique Heller, Catherine Dezan, Michel Narozny, Jean-Philippe Diguet:
QoS Driven Dynamic Partial Reconfiguration: Tracking Case Study. ReCoSoC 2019: 13-19 - 2018
- [j5]Chabha Hireche, Catherine Dezan, Stéphane Mocanu, Dominique Heller, Jean-Philippe Diguet:
Context/Resource-Aware Mission Planning Based on BNs and Concurrent MDPs for Autonomous UAVs. Sensors 18(12): 4266 (2018) - [c17]Soguy Mak Karé Gueye, Gwenaël Delaval, Éric Rutten, Dominique Heller, Jean-Philippe Diguet:
A Domain-Specific Language for Autonomic Managers in FPGA Reconfigurable Architectures. ICAC 2018: 111-120 - 2016
- [j4]Youenn Corre, Jean-Philippe Diguet, Dominique Heller, Dominique Blouin, Loïc Lagadec:
TBES: Template-Based Exploration and Synthesis of Heterogeneous Multiprocessor Architectures on FPGA. ACM Trans. Embed. Comput. Syst. 15(1): 9:1-9:27 (2016) - [c16]El Mehdi Abdali, Maxime Pelcat, François Berry, Jean-Philippe Diguet, Dominique Heller:
Task Clustering Approach to Optimize the Scheduling on a Partially Dynamically Reconfigurable FPGAs for image processing algorithms. ICDSC 2016: 230-231 - 2015
- [c15]Hanen Chenini, Dominique Heller, Catherine Dezan, Jean-Philippe Diguet, Duncan Campbell:
Embedded real-time localization of UAV based on an hybrid device. ICASSP 2015: 1543-1547 - 2014
- [c14]Mickael Lanoe, Matteo Bordin, Dominique Heller, Philippe Coussy, Cyrille Chavet:
A modeling and code generation framework for critical embedded systems design: From Simulink down to VHDL and Ada/C code. ICECS 2014: 742-745 - 2013
- [c13]Youenn Corre, Jean-Philippe Diguet, Loïc Lagadec, Dominique Heller, Dominique Blouin:
Fast Template-Based Heterogeneous MPSoC Synthesis on FPGA. ARC 2013: 154-166 - 2012
- [c12]Youenn Corre, Van-Trinh Hoang, Jean-Philippe Diguet, Dominique Heller, Loïc Lagadec:
HLS-based fast design space exploration of ad hoc hardware accelerators: A key tool for MPSoC synthesis on FPGA. DASIP 2012: 1-8 - [c11]Paolo Burgio, Andrea Marongiu, Dominique Heller, Cyrille Chavet, Philippe Coussy, Luca Benini:
OpenMP-based Synergistic Parallelization and HW Acceleration for On-Chip Shared-Memory Clusters. DSD 2012: 751-758 - [c10]Youenn Corre, Jean-Philippe Diguet, Dominique Heller, Loïc Lagadec:
A framework for high-level synthesis of heterogeneous MP-SoC. ACM Great Lakes Symposium on VLSI 2012: 283-286 - 2011
- [c9]Philippe Coussy, Dominique Heller, Cyrille Chavet:
High-Level Synthesis: On the path to ESL design. ASICON 2011: 1098-1101 - 2010
- [c8]Ghizlane Lhairech-Lebreton, Philippe Coussy, Dominique Heller, Eric Martin:
Bitwidth-aware high-level synthesis for designing low-power DSP applications. ICECS 2010: 531-534
2000 – 2009
- 2009
- [j3]Farhat Thabet, Philippe Coussy, Dominique Heller, Eric Martin:
Exploration and Rapid Prototyping of DSP Applications using SystemC Behavioral Simulation and High-level Synthesis. J. Signal Process. Syst. 56(2-3): 167-186 (2009) - 2008
- [j2]Philippe Coussy, Ghizlane Lhairech-Lebreton, Dominique Heller:
Multiple Word-Length High-Level Synthesis. EURASIP J. Embed. Syst. 2008 (2008) - 2007
- [c7]Farhat Thabet, Philippe Coussy, Dominique Heller, Eric Martin:
Behavioral description model BDM for design space exploration: A case study of HIS algorithm for MC-CDMA system. EUSIPCO 2007: 1625-1629 - 2006
- [c6]Farhat Thabet, Philippe Coussy, Dominique Heller, Eric Martin:
Design Space Exploration of DSP Applications Based on Behavioral Description Models. SiPS 2006: 244-249 - 2005
- [c5]Lobna Kriaa, S. Adriano, Emmanuel Vaumorin, R. Nouacer, F. Blanc, S. Pajaniardja, Philippe Coussy, Eric Martin, Dominique Heller, Farhat Thabet, Anne-Marie Fouilliart:
SystemCmantic: A high level Modelling and Co-Design Framework. FDL 2005: 341-353 - 2003
- [j1]Yannick Le Moullec, Jean-Philippe Diguet, Dominique Heller, Jean Luc Philippe:
Estimation du parallélisme au niveau système pour l'exploration de l'espace de conception de systèmes enfouis. Tech. Sci. Informatiques 22(3): 315-349 (2003)
1990 – 1999
- 1999
- [c4]F. Muller, Jean Paul Calvez, Dominique Heller, Olivier Pasquier:
An Interactive Modeling and Generation Tool for the Design of Hw/Sw Systems. EUROMICRO 1999: 1382-1385 - 1998
- [c3]Jean Paul Calvez, Dominique Heller, F. Muller, Olivier Pasquier:
A Programmable Multi-Language Generator for CoDesign. DATE 1998: 927-928 - 1996
- [c2]Jean Paul Calvez, Dominique Heller, Olivier Pasquier:
Uninterpreted Co-Simulation for Performance Evaluation of Hw/Sw Systems. CODES 1996: 132- - 1993
- [c1]Jean Paul Calvez, Dominique Heller, P. Bakowski:
Functional-level synthesis with VHDL. EURO-DAC 1993: 554-559
Coauthor Index
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