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Jaume Abella 0001
Person information
- affiliation: Barcelona Supercomputing Center, Spain
- affiliation (2005 - 2009): Intel Barcelona Research Center, Spain
- affiliation (PhD 2005): Technical University of Catalonia, Barcelona, Spain
Other persons with the same name
- Jaume Abella 0002 — University Ramon Llull-La Salle, Barcelona, Spain
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2020 – today
- 2025
- [j63]Pablo Andreu, Sergi Alcaide, Pedro López, Jaume Abella, Carles Hernández:
Expanding SafeSU capabilities by leveraging security frameworks for contention monitoring in complex SoCs. Future Gener. Comput. Syst. 163: 107518 (2025) - 2024
- [j62]Jon Pérez-Cerrolaza, Jaume Abella, Markus Borg, Carlo Donzella, Jesús Cerquides, Francisco J. Cazorla, Cristofer Englund, Markus Tauber, George Nikolakopoulos, Jose Luis Flores:
Artificial Intelligence for Safety-Critical Systems in Industrial and Transportation Domains: A Survey. ACM Comput. Surv. 56(7): 176:1-176:40 (2024) - [j61]Martí Caro, Jaume Abella:
Energy-Efficient Object Detection: Impact of Weight Clustering for Different Arithmetic Representations. J. Signal Process. Syst. 96(4-5): 287-300 (2024) - [c186]Alejandro Serrano-Cases, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Achieving Flexible Performance Isolation on the AMD Xilinx Zynq UltraScale+. DSD 2024: 282-290 - [c185]Roger Pujol, Sergi Vilardell, Enrico Mezzetti, Mohamed Hassan, Jaume Abella, Francisco J. Cazorla:
Event Monitor Validation in High-Integrity Systems. DSD 2024: 394-402 - [c184]Jeremy Giesen, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
TAP: Task-Aware Profiling on Integrated Systems. DSD 2024: 559-567 - [c183]Adrià Aldomà, Axel Brando, Francisco J. Cazorla, Jaume Abella:
Safety-Relevant AI-Based System Robustification with Neural Network Ensembles. IOLTS 2024: 1-3 - [c182]Javier Barrera, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Increasing Testing Robustness of GPU Software in Embedded Critical Systems. SAC 2024: 452-453 - 2023
- [j60]Jon Pérez-Cerrolaza, Francisco J. Cazorla, Jaume Abella:
Uncertainty Management in Dependable and Intelligent Embedded Software. Computer 56(3): 114-117 (2023) - [j59]Axel Brando, Isabel Serra, Enrico Mezzetti, Francisco J. Cazorla, Jon Pérez-Cerrolaza, Jaume Abella:
On Neural Networks Redundancy and Diversity for Their Use in Safety-Critical Systems. Computer 56(5): 41-50 (2023) - [j58]Jon Pérez-Cerrolaza, Jaume Abella, Leonidas Kosmidis, Alejandro J. Calderón, Francisco J. Cazorla, Jose Luis Flores:
GPU Devices for Safety-Critical Systems: A Survey. ACM Comput. Surv. 55(7): 147:1-147:37 (2023) - [j57]Martí Caro, Hamid Tabani, Jaume Abella, Francesc Moll, Enric Morancho, Ramon Canal, Josep Altet, Antonio Calomarde, Francisco J. Cazorla, Antonio Rubio, Pau Fontova, Jordi Fornt:
An automotive case study on the limits of approximation for object detection. J. Syst. Archit. 138: 102872 (2023) - [j56]Miguel Alcon, Axel Brando, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Main sources of variability and non-determinism in AD software: taxonomy and prospects to handle them. Real Time Syst. 59(3): 438-478 (2023) - [j55]Miguel Alcon, Hamid Tabani, Jaume Abella, Francisco J. Cazorla:
Dynamic and execution views to improve validation, testing, and optimization of autonomous driving software. Softw. Qual. J. 31(2): 405-439 (2023) - [j54]Roger Pujol, Josep Jorba, Hamid Tabani, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Vector Extensions in COTS Processors to Increase Guaranteed Performance in Real-Time Systems. ACM Trans. Embed. Comput. Syst. 22(2): 21:1-21:26 (2023) - [j53]Jordi Cardona, Carles Hernández, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla:
Accurately Measuring Contention in Mesh NoCs in Time-Sensitive Embedded Systems. ACM Trans. Design Autom. Electr. Syst. 28(3): 43:1-43:34 (2023) - [j52]Jordi Fornt, Pau Fontova-Musté, Martí Caro, Jaume Abella, Francesc Moll, Josep Altet, Christoph Studer:
An Energy-Efficient GeMM-Based Convolution Accelerator With On-the-Fly im2col. IEEE Trans. Very Large Scale Integr. Syst. 31(11): 1874-1878 (2023) - [c181]Axel Brando, Isabel Serra, Enrico Mezzetti, Francisco J. Cazorla, Jaume Abella:
Standardizing the Probabilistic Sources of Uncertainty for the sake of Safety Deep Learning. SafeAI@AAAI 2023 - [c180]Martí Caro, Jordi Fornt, Jaume Abella:
Efficient Diverse Redundant DNNs for Autonomous Driving. COMPSAC 2023: 18-27 - [c179]Jaume Abella, Jon Pérez, Cristofer Englund, Bahram Zonooz, Gabriele Giordana, Carlo Donzella, Francisco J. Cazorla, Enrico Mezzetti, Isabel Serra, Axel Brando, Irune Agirre, Fernando Eizaguirre, Thanh Hai Bui, Elahe Arani, Fahad Sarfraz, Ajay Balasubramaniam, Ahmed Badar, Ilaria Bloise, Lorenzo Feruglio, Ilaria Cinelli, Davide Brighenti, Davide Cunial:
SAFEXPLAIN: Safe and Explainable Critical Embedded Systems Based on AI. DATE 2023: 1-6 - [c178]Xabier Iturbe, Nassim Abderrahmane, Jaume Abella, Sergi Alcaide, Eric Beyne, Henri-Pierre Charles, Christelle Charpin-Nicolle, Lars Chittka, Angélica Dávila, Arne Erdmann, Carles Estrada, Ander Fernández, Anna Fontanelli, José Flich, Gianluca Furano, Alejandro Hernán Gloriani, Erik Isusquiza, Radu Grosu, Carles Hernández, Daniele Ielmini, David Jackson, Maha Kooli, Nicola Lepri, Bernabé Linares-Barranco, Jean-Loup Lachese, Eric Laurent, Menno Lindwer, Frank Linsenmaier, Mikel Luján, Karel Masarík, Nele Mentens, Orlando Moreira, Chinmay Nawghane, Luca Peres, Jean-Philippe Noel, Arash Pourtaherian, Christoph Posch, Peter Priller, Zdenek Prikryl, Felix Resch, Oliver Rhodes, Todor P. Stefanov, Moritz Storring, Michele Taliercio, Rafael Tornero, Marcel D. van de Burgwal, Geert Van der Plas, Elisa Vianello, Pavel Zaykov:
NimbleAI: Towards Neuromorphic Sensing-Processing 3D-integrated Chips. DATE 2023: 1-6 - [c177]Francisco Fuentes, Sergi Alcaide, Raimon Casanova, Jaume Abella:
Black-Box IP Validation with the SafeTI Traffic Injector: A Success Story. DFT 2023: 1-4 - [c176]Sergio Garcia-Esteban, Alejandro Serrano-Cases, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla:
Quasi Isolation QoS Setups to Control MPSoC Contention in Integrated Software Architectures. ECRTS 2023: 5:1-5:25 - [c175]Marcel Sarraseca, Sergi Alcaide, Francisco Fuentes, Juan Carlos Rodriguez, Feng Chang, Ilham Lasfar, Ramon Canal, Francisco J. Cazorla, Jaume Abella:
SafeLS: An Open Source Implementation of a Lockstep NOEL-V RISC-V Core. IOLTS 2023: 1-7 - [c174]Asier Fernández de Lecea, Mohamed Hassan, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Improving Timing-Related Guarantees for Main Memory in Multicore Critical Embedded Systems. RTSS 2023: 265-278 - [c173]Nikolaos Andriotis, Alejandro Serrano-Cases, Sergi Alcaide, Jaume Abella, Francisco J. Cazorla, Yang Peng, Andrea Baldovin, Michael Paulitsch, Vladimir Tsymbal:
A Software-Only Approach to Enable Diverse Redundancy on Intel GPUs for Safety-Related Kernels. SAC 2023: 451-460 - [c172]Roger Pujol, Mohamed Hassan, Hamid Tabani, Jaume Abella, Francisco Javier Cazorla-Almeida:
Tracking Coherence-Related Contention Delays in Real-Time Multicore Systems. SAC 2023: 461-470 - [c171]Jeremy Jens Giesen León, Enrico Mezzetti, Jaume Abella, Francisco Javier Cazorla-Almeida:
ASCOM: Affordable Sequence-aware COntention Modeling in Crossbar-based MPSoCs. SAC 2023: 471-474 - [i9]Martí Caro, Hamid Tabani, Jaume Abella:
At-Scale Evaluation of Weight Clustering to Enable Energy-Efficient Object Detection. CoRR abs/2302.14426 (2023) - [i8]Martí Caro, Hamid Tabani, Jaume Abella, Francesc Moll, Enric Morancho, Ramon Canal, Josep Altet, Antonio Calomarde, Francisco J. Cazorla, Antonio Rubio, Pau Fontova, Jordi Fornt:
An Automotive Case Study on the Limits of Approximation for Object Detection. CoRR abs/2304.06327 (2023) - [i7]Jaume Abella, Francisco J. Cazorla, Sergi Alcaide, Michael Paulitsch, Yang Peng, Inês Pinto Gouveia:
Envisioning a Safety Island to Enable HPC Devices in Safety-Critical Domains. CoRR abs/2307.11940 (2023) - [i6]Marcel Sarraseca, Sergi Alcaide, Francisco Fuentes, Juan Carlos Rodriguez, Feng Chang, Ilham Lasfar, Ramon Canal, Francisco J. Cazorla, Jaume Abella:
SafeLS: Toward Building a Lockstep NOEL-V Core. CoRR abs/2307.15436 (2023) - [i5]Francisco Fuentes, Raimon Casanova, Sergi Alcaide, Jaume Abella:
SafeTI Traffic Injector Enhancement for Effective Interference Testing in Critical Real-Time Systems. CoRR abs/2308.11528 (2023) - 2022
- [j51]Hamid Tabani, Roger Pujol, Miguel Alcon, Joan Moya, Jaume Abella, Francisco J. Cazorla:
ADBench: benchmarking autonomous driving systems. Computing 104(3): 481-502 (2022) - [j50]Martí Caro, Hamid Tabani, Jaume Abella:
At-scale evaluation of weight clustering to enable energy-efficient object detection. J. Syst. Archit. 129: 102635 (2022) - [j49]Sergi Alcaide, Leonidas Kosmidis, Carles Hernández, Jaume Abella:
Achieving Diverse Redundancy for GPU Kernels. IEEE Trans. Emerg. Top. Comput. 10(2): 618-634 (2022) - [c170]Francisco Bas, Pedro Benedicte, Sergi Alcaide, Guillem Cabo, Fabio Mazzocchetti, Jaume Abella:
SafeDM: a Hardware Diversity Monitor for Redundant Execution on Non-Lockstepped Cores. DATE 2022: 358-363 - [c169]Nils-Johan Wessman, Fabio Malatesta, Stefano Ribes, Jan Andersson, Antonio García-Vilanova, Miguel Masmano, Vicente Nicolau, Paco Gomez, Jimmy Le Rhun, Sergi Alcaide, Guillem Cabo, Francisco Bas, Pedro Benedicte, Fabio Mazzocchetti, Jaume Abella:
De-RISC: A Complete RISC-V Based Space-Grade Platform. DATE 2022: 802-807 - [c168]Guillem Cabo, Sergi Alcaide, Carles Hernández, Pedro Benedicte, Francisco Bas, Fabio Mazzocchetti, Jaume Abella:
SafeSU-2: a Safe Statistics Unit for Space MPSoCs. DATE 2022: 1085-1086 - [c167]Axel Brando, Isabel Serra, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Using Quantile Regression in Neural Networks for Contention Prediction in Multicore Processors. ECRTS 2022: 4:1-4:25 - [c166]Sergi Vilardell, Isabel Serra, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla, Joan del Castillo:
Using Markov's Inequality with Power-Of-k Function for Probabilistic WCET Estimation. ECRTS 2022: 20:1-20:24 - [c165]Sergi Alcaide, Guillem Cabo, Francisco Bas, Pedro Benedicte, Francisco Fuentes, Feng Chang, Ilham Lasfar, Ramon Canal, Jaume Abella:
SafeX: Open Source Hardware and Software Components for Safety-Critical Systems. FDL 2022: 1-4 - [c164]Javier Barrera, Leonidas Kosmidis, Hamid Tabani, Jaume Abella, Francisco J. Cazorla:
Contention Tracking in GPU Last-Level Cache. ICCD 2022: 76-79 - [c163]Javier Fernández, Irune Agirre, Jon Pérez-Cerrolaza, Jaume Abella, Francisco J. Cazorla:
A Methodology for Selective Protection of Matrix Multiplications: A Diagnostic Coverage and Performance Trade-off for CNNs Executed on GPUs. ICSRS 2022: 9-18 - [c162]Martí Caro, Hamid Tabani, Jaume Abella:
At-scale assessment of weight clustering for energy-efficient object detection accelerators. SAC 2022: 530-533 - [c161]Ramon Canal, Francisco Bas, Sergi Alcaide, Guillem Cabo, Pedro Benedicte, Francisco Fuentes, Feng Chang, Ilham Lasfar, Jaume Abella:
SafeDX: Standalone Modules Providing Diverse Redundancy for Safety-Critical Applications. SAMOS 2022: 383-393 - [i4]Fabio Mazzocchetti, Sergi Alcaide, Francisco Bas, Pedro Benedicte, Guillem Cabo, Feng Chang, Francisco Fuentes, Jaume Abella:
SafeSoftDR: A Library to Enable Software-based Diverse Redundancy for Safety-Critical Tasks. CoRR abs/2210.00833 (2022) - [i3]Pablo Andreu, Carles Hernández, Tomás Picornell, Pedro López, Sergi Alcaide, Francisco Bas, Pedro Benedicte, Guillem Cabo, Feng Chang, Francisco Fuentes, Jaume Abella:
End-to-End QoS for the Open Source Safety-Relevant RISC-V SELENE Platform. CoRR abs/2210.04683 (2022) - 2021
- [j48]Jon Pérez-Cerrolaza, Roman Obermaisser, Jaume Abella, Francisco J. Cazorla, Kim Grüttner, Irune Agirre, Hamidreza Ahmadian, Imanol Allende:
Multi-core Devices for Safety-critical Systems: A Survey. ACM Comput. Surv. 53(4): 79:1-79:38 (2021) - [j47]Ramon Canal, Carles Hernández, Rafael Tornero, Alessandro Cilardo, Giuseppe Massari, Federico Reghenzani, William Fornaciari, Marina Zapater, David Atienza, Ariel Oleksiak, Wojciech Piatek, Jaume Abella:
Predictive Reliability and Fault Management in Exascale Systems: State of the Art and Perspectives. ACM Comput. Surv. 53(5): 95:1-95:32 (2021) - [j46]Hamid Tabani, Fabio Mazzocchetti, Pedro Benedicte, Jaume Abella, Francisco J. Cazorla:
Performance Analysis and Optimization Opportunities for NVIDIA Automotive GPUs. J. Parallel Distributed Comput. 152: 21-32 (2021) - [j45]Javier Fernández, Jon Pérez, Irune Agirre, Imanol Allende, Jaume Abella, Francisco J. Cazorla:
Towards functional safety compliance of matrix-matrix multiplication for machine learning-based autonomous systems. J. Syst. Archit. 121: 102298 (2021) - [j44]Gabriel Fernandez, Jaume Abella, Guillem Bernat, Francisco J. Cazorla:
Surrogate Applications for Early Design Stage Multicore Contention Modeling. IEEE Trans. Emerg. Top. Comput. 9(1): 109-116 (2021) - [j43]David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
Worst-Case Energy Consumption: A New Challenge for Battery-Powered Critical Devices. IEEE Trans. Sustain. Comput. 6(3): 522-530 (2021) - [c160]Roger Pujol, Hamid Tabani, Jaume Abella, Mohamed Hassan, Francisco J. Cazorla:
Empirical Evidence for MPSoCs in Critical Systems: The Case of NXP's T2080 Cache Coherence. DATE 2021: 1162-1165 - [c159]Miguel Alcon, Hamid Tabani, Jaume Abella, Francisco J. Cazorla:
Enabling Unit Testing of Already-Integrated AI Software Systems: The Case of Apollo for Autonomous Driving. DSD 2021: 426-433 - [c158]Alejandro Serrano-Cases, Juan M. Reina, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla:
Leveraging Hardware QoS to Control Contention in the Xilinx Zynq UltraScale+ MPSoC. ECRTS 2021: 3:1-3:26 - [c157]Jaume Abella, Sergi Alcaide, Jens Anders, Francisco Bas, Steffen Becker, Elke De Mulder, Nourhan Elhamawy, Frank K. Gürkaynak, Helena Handschuh, Carles Hernández, Michael Hutter, Leonidas Kosmidis, Ilia Polian, Matthias Sauer, Stefan Wagner, Francesco Regazzoni:
Security, Reliability and Test Aspects of the RISC-V Ecosystem. ETS 2021: 1-10 - [c156]Guillem Cabo, Francisco Bas, Ruben Lorenzo, David Trilla, Sergi Alcaide, Miquel Moretó, Carles Hernández, Jaume Abella:
SafeSU: an Extended Statistics Unit for Multicore Timing Interference. ETS 2021: 1-4 - [c155]Jeremy Giesen, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
PRL: Standardizing Performance Monitoring Library for High-Integrity Real-Time Systems. ICCD 2021: 344-348 - [c154]Francisco Bas, Sergi Alcaide, Ruben Lorenzo, Guillem Cabo, Guillermo Gil, Oriol Sala, Fabio Mazzocchetti, David Trilla, Jaume Abella:
SafeDE: a flexible Diversity Enforcement hardware module for light-lockstepping. IOLTS 2021: 1-7 - [c153]Oriol Sala, Sergi Alcaide, Guillem Cabo, Francisco Bas, Ruben Lorenzo, Pedro Benedicte, David Trilla, Guillermo Gil, Fabio Mazzocchetti, Jaume Abella:
SafeTI: a Hardware Traffic Injector for MPSoC Functional and Timing Validation. IOLTS 2021: 1-7 - [c152]Sergi Vilardell, Isabel Serra, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
MUCH: exploiting pairwise hardware event monitor correlations for improved timing analysis of complex MPSoCs. SAC 2021: 511-520 - [i2]Hamid Tabani, Fabio Mazzocchetti, Pedro Benedicte, Jaume Abella, Francisco J. Cazorla:
Performance Analysis and Optimization Opportunities for NVIDIA Automotive GPUs. CoRR abs/2104.07735 (2021) - [i1]Leonidas Kosmidis, Iván Rodriguez, Álvaro Jover, Sergi Alcaide, Jérôme Lachaize, Jaume Abella, Olivier Notebaert, Francisco J. Cazorla, David Steenari:
GPU4S: Embedded GPUs in Space - Latest Project Updates. CoRR abs/2109.11074 (2021) - 2020
- [j42]Leonidas Kosmidis, Iván Rodriguez, Álvaro Jover, Sergi Alcaide, Jérôme Lachaize, Jaume Abella, Olivier Notebaert, Francisco J. Cazorla, David Steenari:
GPU4S: Embedded GPUs in space - Latest project updates. Microprocess. Microsystems 77: 103143 (2020) - [j41]Sergi Vilardell, Isabel Serra, Roberto Santalla, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
HRM: Merging Hardware Event Monitors for Improved Timing Analysis of Complex MPSoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 3662-3673 (2020) - [c151]Jaume Abella, Calvin Bulla, Guillem Cabo, Francisco J. Cazorla, Adrián Cristal, Max Doblas, Roger Figueras, Alberto González, Carles Hernández, César Hernández, Víctor Jiménez, Leonidas Kosmidis, Vatistas Kostalabros, Rubén Langarita, Neiel Leyva, Guillem López-Paradís, Joan Marimon, Ricardo Martínez, Jonnatan Mendoza, Francesc Moll, Miquel Moretó, Julián Pavón, Cristóbal Ramírez, Marco Antonio Ramírez, Carlos Rojas Morales, Antonio Rubio, Abraham Ruiz, Nehir Sönmez, Víctor Soria, Lluís Terés, Osman S. Unsal, Mateo Valero, Iván Vargas Valdivieso, Luis Villa:
An Academic RISC-V Silicon Implementation Based on Open-Source Components. DCIS 2020: 1-6 - [c150]Sergi Alcaide, Leonidas Kosmidis, Carles Hernández, Jaume Abella:
Software-only based Diverse Redundancy for ASIL-D Automotive Applications on Embedded HPC Platforms. DFT 2020: 1-4 - [c149]Carles Hernández, José Flich, Roberto Paredes, Charles-Alexis Lefebvre, Imanol Allende, Jaume Abella, David Trillin, Martin Matschnig, Bernhard Fischer, Konrad Schwarz, Jan Kiszka, Martin Rönnbäck, Johan Klockars, Nicholas Mc Guire, Franz Rammerstorfer, Christian Schwarzl, Franck Wartel, Dierk Lüdemann, Mikel Labayen:
SELENE: Self-Monitored Dependable Platform for High-Performance Safety-Critical Systems. DSD 2020: 370-377 - [c148]Aizea Lojo, Leire Rubio, Jesus Miguel Ruano, Tania Di Mascio, Luigi Pomante, Enrico Ferrari, Ignacio Garcìa Vega, Frank K. Gürkaynak, Mikel Labayen Esnaola, Vanessa Orani, Jaume Abella:
The ECSEL FRACTAL Project: A Cognitive Fractal and Secure edge based on a unique Open-Safe-Reliable-Low Power Hardware Platform. DSD 2020: 393-400 - [c147]Sergi Alcaide Portet, Leonidas Kosmidis, Carles Hernández, Jaume Abella:
Software-Only Triple Diverse Redundancy on GPUs for Autonomous Driving Platforms. DSN (Supplements) 2020: 82-88 - [c146]Carles Hernández, Jaume Abella, Mikel Azkarate-askasua, Roman Obermaisser:
Workshop on High-performance Computing Platforms for Dependable Autonomous Systems. DSN Workshops 2020: xii - [c145]Xavier Palomo, Mikel Fernández, Sylvain Girbal, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla, Laurent Rioux:
Tracing Hardware Monitors in the GR712RC Multicore Platform: Challenges and Lessons Learnt from a Space Case Study. ECRTS 2020: 15:1-15:25 - [c144]Hamid Tabani, Roger Pujol, Jaume Abella, Francisco J. Cazorla:
A Cross-Layer Review of Deep Learning Frameworks to Ease Their Optimization and Reuse. ISORC 2020: 144-145 - [c143]Jeremy Giesen, Pedro Benedicte, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Modeling Contention Interference in Crossbar-based Systems via Sequence-Aware Pairing (SeAP). RTAS 2020: 253-266 - [c142]Miguel Alcon, Hamid Tabani, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Timing of Autonomous Driving Software: Problem Analysis and Prospects for Future Solutions. RTAS 2020: 267-280 - [c141]Sergi Vilardell, Isabel Serra, Hamid Tabani, Jaume Abella, Joan del Castillo, Francisco J. Cazorla:
CleanET: enabling timing validation for complex automotive systems. SAC 2020: 554-563 - [c140]Hamid Tabani, Matteo Fusi, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla:
IntPred: flexible, fast, and accurate object detection for autonomous driving systems. SAC 2020: 564-571 - [c139]Javier Barrera, Leonidas Kosmidis, Hamid Tabani, Enrico Mezzetti, Jaume Abella, Mikel Fernández, Guillem Bernat, Francisco J. Cazorla:
On the reliability of hardware event monitors in MPSoCs for critical domains. SAC 2020: 580-589 - [c138]Miguel Alcon, Hamid Tabani, Jaume Abella, Leonidas Kosmidis, Francisco J. Cazorla:
En-Route: on enabling resource usage testing for autonomous driving frameworks. SAC 2020: 1953-1962
2010 – 2019
- 2019
- [j40]Francisco J. Cazorla, Leonidas Kosmidis, Enrico Mezzetti, Carles Hernández, Jaume Abella, Tullio Vardanega:
Probabilistic Worst-Case Timing Analysis: Taxonomy and Comprehensive Survey. ACM Comput. Surv. 52(1): 14:1-14:35 (2019) - [j39]David Trilla, Francisco J. Cazorla, Carles Hernández, Jaume Abella:
Randomization for Safer, more Reliable and Secure, High-Performance Automotive Processors. IEEE Des. Test 36(6): 39-47 (2019) - [j38]Mladen Slijepcevic, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
Time-Randomized Wormhole NoCs for Critical Applications. ACM J. Emerg. Technol. Comput. Syst. 15(1): 3:1-3:23 (2019) - [j37]Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
Locality-aware cache random replacement policies. J. Syst. Archit. 93: 48-61 (2019) - [j36]Suzana Milutinovic, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Increasing the Reliability of Software Timing Analysis for Cache-Based Processors. IEEE Trans. Computers 68(6): 836-851 (2019) - [c137]Pedro Benedicte, Jaume Abella, Carles Hernández, Enrico Mezzetti, Francisco J. Cazorla:
Towards limiting the impact of timing anomalies in complex real-time processors. ASP-DAC 2019: 27-32 - [c136]Hamid Tabani, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla, Guillem Bernat:
Assessing the Adherence of an Industrial Autonomous Driving Framework to ISO 26262 Software Guidelines. DAC 2019: 9 - [c135]Jordi Cardona, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
Maximum-Contention Control Unit (MCCU): Resource Access Count and Contention Time Enforcement. DATE 2019: 710-715 - [c134]Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
LAEC: Look-Ahead Error Correction Codes in Embedded Processors L1 Data Cache. DATE 2019: 818-823 - [c133]Sergi Alcaide, Leonidas Kosmidis, Carles Hernández, Jaume Abella:
High-Integrity GPU Designs for Critical Real-Time Automotive Systems. DATE 2019: 824-829 - [c132]Enrico Mezzetti, Luca Barbina, Jaume Abella, Stefania Botta, Francisco J. Cazorla:
AURIX TC277 Multicore Contention Model Integration for Automotive Applications. DATE 2019: 1202-1203 - [c131]Mikel Fernández, Gabriel Fernandez, Jaume Abella, Francisco J. Cazorla:
Multicore Early Design Stage Guaranteed Performance Estimates for the Space Domain. DATE 2019: 1206-1207 - [c130]Leonidas Kosmidis, Jérôme Lachaize, Jaume Abella, Olivier Notebaert, Francisco J. Cazorla, David Steenari:
GPU4S: Embedded GPUs in Space. DSD 2019: 399-405 - [c129]David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
An Approach for Detecting Power Peaks During Testing and Breaking Systematic Pathological Behavior. DSD 2019: 538-545 - [c128]David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
Modeling the Impact of Process Variations in Worst-Case Energy Consumption Estimation. DSD 2019: 601-605 - [c127]Roger Pujol, Hamid Tabani, Leonidas Kosmidis, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Generating and Exploiting Deep Learning Variants to Increase Heterogeneous Resource Utilization in the NVIDIA Xavier. ECRTS 2019: 23:1-23:23 - [c126]Sergi Vilardell, Isabel Serra, Jaume Abella, Joan del Castillo, Francisco J. Cazorla:
Software Timing Analysis for Complex Hardware with Survivability and Risk Analysis. ICCD 2019: 227-236 - [c125]Sergi Alcaide, Leonidas Kosmidis, Carles Hernández, Jaume Abella:
Software-only Diverse Redundancy on GPUs for Autonomous Driving Platforms. IOLTS 2019: 90-96 - [c124]Kazi Asifuzzaman, Mikel Fernández, Petar Radojkovic, Jaume Abella, Francisco J. Cazorla:
STT-MRAM for real-time embedded systems: performance and WCET implications. MEMSYS 2019: 195-205 - [c123]Xavier Palomo, Enrico Mezzetti, Jaume Abella, Reinder J. Bril, Francisco J. Cazorla:
Accurate ILP-Based Contention Modeling on Statically Scheduled Multicore Systems. RTAS 2019: 15-28 - [c122]Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla:
On assessing the viability of probabilistic scheduling with dependent tasks. SAC 2019: 625-634 - [c121]Fabio Mazzocchetti, Pedro Benedicte, Hamid Tabani, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla:
Performance Analysis and Optimization of Automotive GPUs. SBAC-PAD 2019: 96-103 - [c120]Jeremy Giesen, Enrico Mezzetti, Jaume Abella, Enrique Fernández, Francisco J. Cazorla:
ePAPI: Performance Application Programming Interface for Embedded Platforms. WCET 2019: 3:1-3:13 - 2018
- [j35]Francisco J. Cazorla, Jaume Abella, Enrico Mezzetti, Carles Hernández, Tullio Vardanega, Guillem Bernat:
Reconciling Time Predictability and Performance in Future Computing Systems. IEEE Des. Test 35(2): 48-56 (2018) - [j34]Enrico Mezzetti, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla:
High-Integrity Performance Monitoring Units in Automotive Chips for Reliable Timing V&V. IEEE Micro 38(1): 56-65 (2018) - [j33]Sergi Alcaide, Leonidas Kosmidis, Hamid Tabani, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
Safety-Related Challenges and Opportunities for GPUs in the Automotive Domain. IEEE Micro 38(6): 46-55 (2018) - [j32]Jordi Cardona, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
EOmesh: Combined Flow Balancing and Deterministic Routing for Reduced WCET Estimates in Embedded Real-Time Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(11): 2451-2461 (2018) - [j31]Irune Agirre, Francisco J. Cazorla, Jaume Abella, Carles Hernández, Enrico Mezzetti, Mikel Azkarate-askatsua, Tullio Vardanega:
Fitting Software Execution-Time Exceedance into a Residual Random Fault in ISO-26262. IEEE Trans. Reliab. 67(3): 1314-1327 (2018) - [c119]Enrique Díaz, Enrico Mezzetti, Leonidas Kosmidis, Jaume Abella, Francisco J. Cazorla:
Modelling multicore contention on the AURIXTM TC27x. DAC 2018: 97:1-97:6 - [c118]David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
Cache side-channel attacks and time-predictability in high-performance critical real-time systems. DAC 2018: 98:1-98:6 - [c117]Suzana Milutinovic, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla:
Measurement-based cache representativeness on multipath programs. DAC 2018: 123:1-123:6 - [c116]Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
Design and integration of hierarchical-placement multi-level caches for real-time systems. DATE 2018: 455-460 - [c115]Xavier Civit, Joan del Castillo, Jaume Abella:
A Reliable Statistical Analysis of the Best-Fit Distribution for High Execution Times. DSD 2018: 727-734 - [c114]Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
HWP: Hardware Support to Reconcile Cache Energy, Complexity, Performance and WCET Estimates in Multicore Real-Time Systems. ECRTS 2018: 3:1-3:22 - [c113]Jordi Cardona, Carles Hernández, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
NoCo: ILP-Based Worst-Case Contention Estimation for Mesh Real-Time Manycores. RTSS 2018: 265-276 - [c112]Pedro Benedicte, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
RPR: a random replacement policy with limited pathological replacements. SAC 2018: 593-600 - [c111]Gabriel Fernandez, Francisco J. Cazorla, Jaume Abella, Sylvain Girbal:
Assessing Time Predictability Features of ARM Big. LITTLE Multicores. SBAC-PAD 2018: 258-261 - 2017
- [j30]Suzana Milutinovic, Jaume Abella, Francisco J. Cazorla:
On the assessment of probabilistic WCET estimates reliability for arbitrary programs. EURASIP J. Embed. Syst. 2017: 28 (2017) - [j29]Joan del Castillo, Maria Padilla, Jaume Abella, Francisco J. Cazorla:
Execution time distributions in embedded safety-critical systems using extreme value theory. Int. J. Data Anal. Tech. Strateg. 9(4): 348-361 (2017) - [j28]Milos Panic, Jaume Abella, Eduardo Quiñones, Carles Hernández, Theo Ungerer, Francisco J. Cazorla:
Adapting TDMA arbitration for measurement-based probabilistic timing analysis. Microprocess. Microsystems 52: 188-201 (2017) - [j27]Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla:
Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration. IEEE Trans. Computers 66(4): 586-600 (2017) - [j26]Jaume Abella, Maria Padilla, Joan del Castillo, Francisco J. Cazorla:
Measurement-Based Worst-Case Execution Time Estimation Using the Coefficient of Variation. ACM Trans. Design Autom. Electr. Syst. 22(4): 72:1-72:29 (2017) - [c110]Enrique Díaz, Mikel Fernández, Leonidas Kosmidis, Enrico Mezzetti, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
MC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding. Ada-Europe 2017: 102-118 - [c109]Suzana Milutinovic, Jaume Abella, Irune Agirre, Mikel Azkarate-askasua, Enrico Mezzetti, Tullio Vardanega, Francisco J. Cazorla:
Software Time Reliability in the Presence of Cache Memories. Ada-Europe 2017: 233-249 - [c108]Sergi Alcaide, Carles Hernández, Antoni Roca, Jaume Abella:
DIMP: A Low-Cost Diversity Metric Based on Circuit Path Analysis. DAC 2017: 45:1-45:6 - [c107]Fabrice Cros, Leonidas Kosmidis, Franck Wartel, David Morales, Jaume Abella, Ian Broster, Francisco J. Cazorla:
Dynamic software randomisation: Lessons learnec from an aerospace case study. DATE 2017: 103-108 - [c106]Mikel Fernández, David Morales, Leonidas Kosmidis, Alen Bardizbanyan, Ian Broster, Carles Hernández, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla, Paulo Machado, Luca Fossati:
Probabilistic timing analysis on time-randomized platforms for the space domain. DATE 2017: 738-739 - [c105]Mladen Slijepcevic, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
Design and implementation of a fair credit-based bandwidth sharing scheme for buses. DATE 2017: 926-929 - [c104]Mladen Slijepcevic, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
Boosting Guaranteed Performance in Wormhole NoCs with Probabilistic Timing Analysis. DSD 2017: 440-444 - [c103]Carles Hernández, Jaume Abella, Francisco J. Cazorla, Alen Bardizbanyan, Jan Andersson, Fabrice Cros, Franck Wartel:
Design and Implementation of a Time Predictable Processor: Evaluation With a Space Case Study. ECRTS 2017: 16:1-16:23 - [c102]Enrico Mezzetti, Mikel Fernández, Alen Bardizbanyan, Irune Agirre, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla:
EPC Enacted: Integration in an Industrial Toolbox and Use against a Railway Application. RTAS 2017: 163-174 - [c101]Enrico Mezzetti, Jaume Abella, Carles Hernández, Francisco J. Cazorla:
Work-in-Progress Paper: An Analysis of the Impact of Dependencies on Probabilistic Timing Analysis and Task Scheduling. RTSS 2017: 357-359 - [c100]Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero:
SEDEA: A Sensible Approach to Account DRAM Energy in Multicore Systems. SBAC-PAD 2017: 73-80 - [c99]Irune Agirre, Jaume Abella, Mikel Azkarate-askasua, Francisco J. Cazorla:
On the tailoring of CAST-32A certification guidance to real COTS multicore architectures. SIES 2017: 1-8 - [c98]Suzana Milutinovic, Enrico Mezzetti, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla:
On uses of extreme value theory fit for industrial-quality WCET analysis. SIES 2017: 1-6 - [c97]David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
Modelling bus contention during system early design stages. SIES 2017: 1-8 - 2016
- [j25]Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Carles Hernández, Andrea Gianarro, Ian Broster, Francisco J. Cazorla:
Fitting processor architectures for measurement-based probabilistic timing analysis. Microprocess. Microsystems 47: 287-302 (2016) - [j24]Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Daniel A. Jiménez, Mateo Valero:
Sensible Energy Accounting with Abstract Metering for Multicore Systems. ACM Trans. Archit. Code Optim. 12(4): 60:1-60:26 (2016) - [j23]Theo Ungerer, Christian Bradatsch, Martin Frieb, Florian Kluge, Jörg Mische, Alexander Stegmeier, Ralf Jahr, Mike Gerdes, Pavel G. Zaykov, Lucie Matusova, Zai Jian Jia Li, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Nick Lay, David George, Ian Broster, Eduardo Quiñones, Milos Panic, Jaume Abella, Carles Hernández, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka:
Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore. ACM Trans. Embed. Comput. Syst. 15(3): 53:1-53:27 (2016) - [j22]Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero:
DReAM: An Approach to Estimate per-Task DRAM Energy in Multicore Systems. ACM Trans. Design Autom. Electr. Syst. 22(1): 16:1-16:26 (2016) - [c96]Carles Hernández, Jaume Abella, Andrea Gianarro, Jan Andersson, Francisco J. Cazorla:
Random modulo: a new processor cache design for real-time critical systems. DAC 2016: 29:1-29:6 - [c95]Sebastian Kehr, Milos Panic, Eduardo Quiñones, Bert Böddeker, Jorge Becerril Sandoval, Jaume Abella, Francisco J. Cazorla, Günter Schäfer:
Supertask: Maximizing runnable-level parallelism in AUTOSAR applications. DATE 2016: 25-30 - [c94]Marc Riera, Ramon Canal, Jaume Abella, Antonio González:
A detailed methodology to compute Soft Error Rates in advanced technologies. DATE 2016: 217-222 - [c93]Milos Panic, Carles Hernández, Jaume Abella, Antoni Roca, Eduardo Quiñones, Francisco J. Cazorla:
Improving performance guarantees in wormhole mesh NoC designs. DATE 2016: 1485-1488 - [c92]Francisco J. Cazorla, Jaume Abella, Jan Andersson, Tullio Vardanega, Francis Vatrinet, Iain Bate, Ian Broster, Mikel Azkarate-askasua, Franck Wartel, Liliana Cucu, Fabrice Cros, Glenn Farrall, Adriana Gogonel, Andrea Gianarro, Benoit Triquet, Carles Hernández, Code Lo, Cristian Maxim, David Morales, Eduardo Quiñones, Enrico Mezzetti, Leonidas Kosmidis, Irune Agirre, Mikel Fernández, Mladen Slijepcevic, Philippa Conmy, Walid Talaboulma:
PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis. DSD 2016: 276-285 - [c91]Mladen Slijepcevic, Mikel Fernández, Carles Hernández, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla:
pTNoC: Probabilistically Time-Analyzable Tree-Based NoC for Mixed-Criticality Systems. DSD 2016: 404-412 - [c90]Leonidas Kosmidis, Roberto Vargas, David Morales, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla:
TASA: toolchain-agnostic static software randomisation for critical real-time systems. ICCAD 2016: 59 - [c89]Pedro Benedicte, Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla:
A confidence assessment of WCET estimates for software time randomized caches. INDIN 2016: 90-97 - [c88]David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
Resilient random modulo cache memories for probabilistically-analyzable real-time systems. IOLTS 2016: 27-32 - [c87]Jaime Espinosa, Carles Hernández, Jaume Abella:
Modeling RTL fault models behavior to increase the confidence on TSIM-based fault injection. IOLTS 2016: 60-65 - [c86]Suzana Milutinovic, Jaume Abella, Francisco J. Cazorla:
Modelling Probabilistic Cache Representativeness in the Presence of Arbitrary Access Patterns. ISORC 2016: 142-149 - [c85]Milos Panic, Carles Hernández, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla:
Modeling High-Performance Wormhole NoCs for Critical Real-Time Embedded Systems. RTAS 2016: 267-278 - [c84]David Trilla, Javier Jalle, Mikel Fernández, Jaume Abella, Francisco J. Cazorla:
Improving Early Design Stage Timing Modeling in Multicore Based Real-Time Systems. RTAS 2016: 305-316 - [c83]Pedro Benedicte, Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla:
Modelling the confidence of timing analysis for time randomised caches. SIES 2016: 141-148 - [c82]Javier Jalle, Mikel Fernández, Jaume Abella, Jan Andersson, Mathieu Patte, Luca Fossati, Marco Zulianello, Francisco J. Cazorla:
Contention-aware performance monitoring counte support for real-time MPSoCs. SIES 2016: 262-271 - [c81]Javier Jalle, Eduardo Quiñones, Jaume Abella, Luca Fossati, Marco Zulianello, Francisco J. Cazorla:
Data Bus Slicing for Contention-Free Multicore Real-Time Memory Systems. SIES 2016: 272-279 - [c80]Enrique Díaz, Jaume Abella, Enrico Mezzetti, Irune Agirre, Mikel Azkarate-askasua, Tullio Vardanega, Francisco J. Cazorla:
Mitigating Software-Instrumentation Cache Effects in Measurement-Based Timing Analysis. WCET 2016: 1:1-1:11 - [c79]Leonidas Kosmidis, Davide Compagnin, David Morales, Enrico Mezzetti, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla:
Measurement-Based Timing Analysis of the AURIX Caches. WCET 2016: 9:1-9:11 - 2015
- [j21]Enrico Mezzetti, Marco Ziccardi, Tullio Vardanega, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla:
Randomized Caches Can Be Pretty Useful to Hard Real-Time Systems. Leibniz Trans. Embed. Syst. 2(1): 01:1-01:10 (2015) - [j20]Carles Hernández, Jaume Abella:
Timely Error Detection for Effective Recovery in Light-Lockstep Automotive Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(11): 1718-1729 (2015) - [c78]Suzana Milutinovic, Jaume Abella, Damien Hardy, Eduardo Quiñones, Isabelle Puaut, Francisco J. Cazorla:
Speeding up Static Probabilistic Timing Analysis. ARCS 2015: 236-247 - [c77]Jaime Espinosa, Carles Hernández, Jaume Abella, David de Andrés, Juan-Carlos Ruiz-Garcia:
Analysis and RTL correlation of instruction set simulators for automotive microcontroller robustness verification. DAC 2015: 40:1-40:6 - [c76]Suzana Milutinovic, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla:
PACO: fast average-performance estimation for time-randomized caches. DAC 2015: 124:1-124:6 - [c75]Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla:
Increasing confidence on measurement-based contention bounds for real-time round-robin buses. DAC 2015: 125:1-125:6 - [c74]Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla:
Resource usage templates and signatures for COTS multicore processors. DAC 2015: 155:1-155:6 - [c73]Carles Hernández, Jaume Abella:
Low-cost checkpointing in automotive safety-relevant systems. DATE 2015: 91-96 - [c72]Franck Wartel, Leonidas Kosmidis, Adriana Gogonel, Andrea Baldovin, Zoë R. Stephenson, Benoit Triquet, Eduardo Quiñones, Code Lo, Enrico Mezzetti, Ian Broster, Jaume Abella, Liliana Cucu-Grosjean, Tullio Vardanega, Francisco J. Cazorla:
Timing analysis of an avionics case study on complex hardware/software platforms. DATE 2015: 397-402 - [c71]Milos Panic, Jaume Abella, Carles Hernández, Eduardo Quiñones, Theo Ungerer, Francisco J. Cazorla:
Enabling TDMA Arbitration in the Context of MBPTA. DSD 2015: 462-469 - [c70]Irune Agirre, Mikel Azkarate-askasua, Carles Hernández, Jaume Abella, Jon Pérez, Tullio Vardanega, Francisco J. Cazorla:
IEC-61508 SIL 3 Compliant Pseudo-Random Number Generators for Probabilistic Timing Analysis. DSD 2015: 677-684 - [c69]Milos Panic, Eduardo Quiñones, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
CAP: Communication-Aware Allocation Algorithm for Real-Time Parallel Applications on Many-Cores. DSD 2015: 685-692 - [c68]Jaime Espinosa, Carles Hernández, Jaume Abella:
Characterizing fault propagation in safety-critical processor designs. IOLTS 2015: 144-149 - [c67]Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Tullio Vardanega, Francisco J. Cazorla:
Seeking Time-Composable Partitions of Tasks for COTS Multicore Processors. ISORC 2015: 208-217 - [c66]Marco Ziccardi, Enrico Mezzetti, Tullio Vardanega, Jaume Abella, Francisco J. Cazorla:
EPC: Extended Path Coverage for Measurement-Based Probabilistic Timing Analysis. RTSS 2015: 338-349 - [c65]Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Luca Fossati, Marco Zulianello, Francisco J. Cazorla:
Introduction to partial time composability for COTS multicores. SAC 2015: 1955-1956 - [c64]Jaume Abella, Carles Hernández, Eduardo Quiñones, Francisco J. Cazorla, Philippa Ryan Conmy, Mikel Azkarate-askasua, Jon Pérez, Enrico Mezzetti, Tullio Vardanega:
WCET analysis methods: Pitfalls and challenges on their trustworthiness. SIES 2015: 39-48 - 2014
- [j19]Qixiao Liu, Víctor Jiménez, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero:
Per-task Energy Accounting in Computing Systems. IEEE Comput. Archit. Lett. 13(2): 85-88 (2014) - [j18]Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla:
Timing Verification of Fault-Tolerant Chips for Safety-Critical Applications in Harsh Environments. IEEE Micro 34(6): 8-19 (2014) - [j17]Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla:
Efficient Cache Designs for Probabilistically Analysable Real-Time Systems. IEEE Trans. Computers 63(12): 2998-3011 (2014) - [j16]Bojan Maric, Jaume Abella, Francisco J. Cazorla, Mateo Valero:
Hybrid Cache Designs for Reliable Hybrid High and Ultra-Low Voltage Operation. ACM Trans. Design Autom. Electr. Syst. 20(1): 10:1-10:25 (2014) - [j15]Bojan Maric, Jaume Abella, Mateo Valero:
Analyzing the Efficiency of L1 Caches for Reliable Hybrid-Voltage Operation Using EDC Codes. IEEE Trans. Very Large Scale Integr. Syst. 22(10): 2211-2215 (2014) - [c63]Milos Panic, Sebastian Kehr, Eduardo Quiñones, Bert Böddeker, Jaume Abella, Francisco J. Cazorla:
RunPar: An allocation algorithm for automotive applications exploiting runnable parallelism in multicores. CODES+ISSS 2014: 29:1-29:10 - [c62]Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Glenn Farrall, Franck Wartel, Francisco J. Cazorla:
Containing Timing-Related Certification Cost in Automotive Systems Deploying Complex Hardware. DAC 2014: 22:1-22:6 - [c61]Carles Hernández, Jaume Abella:
LiVe: Timely Error Detection in Light-Lockstep Safety Critical Systems. DAC 2014: 25:1-25:6 - [c60]Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla:
Time-Analysable Non-Partitioned Shared Caches for Real-Time Multicore Systems. DAC 2014: 198:1-198:6 - [c59]Javier Jalle, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla:
Bus designs for time-probabilistic multicore processors. DATE 2014: 1-6 - [c58]Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Ian Broster, Francisco J. Cazorla:
Measurement-Based Probabilistic Timing Analysis and Its Impact on Processor Architecture. DSD 2014: 401-410 - [c57]Jaume Abella, Eduardo Quiñones, Franck Wartel, Tullio Vardanega, Francisco J. Cazorla:
Heart of Gold: Making the Improbable Happen to Increase Confidence in MBPTA. ECRTS 2014: 255-265 - [c56]Jaume Abella, Damien Hardy, Isabelle Puaut, Eduardo Quiñones, Francisco J. Cazorla:
On the Comparison of Deterministic and Probabilistic WCET Estimation Techniques. ECRTS 2014: 266-275 - [c55]Leonidas Kosmidis, Jaume Abella, Franck Wartel, Eduardo Quiñones, Antoine Colin, Francisco J. Cazorla:
PUB: Path Upper-Bounding for Measurement-Based Probabilistic Timing Analysis. ECRTS 2014: 276-287 - [c54]Milos Panic, Eduardo Quiñones, Pavel G. Zaykov, Carles Hernández, Jaume Abella, Francisco J. Cazorla:
Parallel many-core avionics systems. EMSOFT 2014: 26:1-26:10 - [c53]Qixiao Liu, Miquel Moretó, Jaume Abella, Francisco J. Cazorla, Mateo Valero:
DReAM: Per-Task DRAM Energy Metering in Multicore Systems. Euro-Par 2014: 111-123 - [c52]Javier Jalle, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla:
AHRB: A high-performance time-composable AMBA AHB bus. RTAS 2014: 225-236 - [c51]Javier Jalle, Eduardo Quiñones, Jaume Abella, Luca Fossati, Marco Zulianello, Francisco J. Cazorla:
A Dual-Criticality Memory Controller (DCmc): Proposal and Evaluation of a Space Case Study. RTSS 2014: 207-217 - [c50]Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Christine Rochange, Tullio Vardanega, Francisco J. Cazorla:
Contention in Multicore Hardware Shared Resources: Understanding of the State of the Art. WCET 2014: 31-42 - 2013
- [j14]Qixiao Liu, Miquel Moretó, Víctor Jiménez, Jaume Abella, Francisco J. Cazorla, Mateo Valero:
Hardware support for accurate per-task energy metering in multicore systems. ACM Trans. Archit. Code Optim. 10(4): 34:1-34:27 (2013) - [j13]Francisco J. Cazorla, Eduardo Quiñones, Tullio Vardanega, Liliana Cucu, Benoit Triquet, Guillem Bernat, Emery D. Berger, Jaume Abella, Franck Wartel, Michael Houston, Luca Santinelli, Leonidas Kosmidis, Code Lo, Dorin Maxim:
PROARTIS: Probabilistically Analyzable Real-Time Systems. ACM Trans. Embed. Comput. Syst. 12(2s): 94:1-94:26 (2013) - [c49]Bojan Maric, Jaume Abella, Mateo Valero:
APPLE: adaptive performance-predictable low-energy caches for reliable hybrid voltage operation. DAC 2013: 84:1-84:8 - [c48]Sylvain Girbal, Miquel Moretó, Arnaud Grasset, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Sami Yehia:
On the convergence of mainstream and mission-critical markets. DAC 2013: 185:1-185:10 - [c47]Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla:
A cache design for probabilistically analysable real-time systems. DATE 2013: 513-518 - [c46]Leonidas Kosmidis, Charlie Curtsinger, Eduardo Quiñones, Jaume Abella, Emery D. Berger, Francisco J. Cazorla:
Probabilistic timing analysis on conventional cache designs. DATE 2013: 603-606 - [c45]Bojan Maric, Jaume Abella, Mateo Valero:
Efficient cache architectures for reliable hybrid voltage operation using EDC codes. DATE 2013: 917-920 - [c44]Theo Ungerer, Christian Bradatsch, Mike Gerdes, Florian Kluge, Ralf Jahr, Jörg Mische, João Fernandes, Pavel G. Zaykov, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Ian Broster, Nick Lay, David George, Eduardo Quiñones, Milos Panic, Jaume Abella, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka:
parMERASA - Multi-core Execution of Parallelised Hard Real-Time Applications Supporting Analysability. DSD 2013: 363-370 - [c43]Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla:
DTM: Degraded Test Mode for Fault-Aware Probabilistic Timing Analysis. ECRTS 2013: 237-248 - [c42]Zoë R. Stephenson, Jaume Abella, Tullio Vardanega:
Supporting industrial use of probabilistic timing analysis with explicit argumentation. INDIN 2013: 734-740 - [c41]Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla:
Achieving timing composability with measurement-based probabilistic timing analysis. ISORC 2013: 1-8 - [c40]Yiannakis Sazeides, Emre Özer, Danny Kershaw, Panagiota Nikolaou, Marios Kleanthous, Jaume Abella:
Implicit-storing and redundant-encoding-of-attribute information in error-correction-codes. MICRO 2013: 160-171 - [c39]Milos Panic, Germán Rodríguez, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla:
On-chip ring network designs for hard-real time systems. RTNS 2013: 23-32 - [c38]Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla:
Multi-level Unified Caches for Probabilistically Time Analysable Real-Time Systems. RTSS 2013: 360-371 - [c37]Javier Jalle, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla:
Deconstructing bus access control policies for Real-Time multicores. SIES 2013: 31-38 - [c36]Franck Wartel, Leonidas Kosmidis, Code Lo, Benoit Triquet, Eduardo Quiñones, Jaume Abella, Adriana Gogonel, Andrea Baldovin, Enrico Mezzetti, Liliana Cucu, Tullio Vardanega, Francisco J. Cazorla:
Measurement-based probabilistic timing analysis: Lessons from an integrated-modular avionics case study. SIES 2013: 241-248 - [c35]Francisco J. Cazorla, Tullio Vardanega, Eduardo Quiñones, Jaume Abella:
Upper-bounding Program Execution Time with Extreme Value Theory. WCET 2013: 64-76 - [c34]Leonidas Kosmidis, Tullio Vardanega, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla:
Applying Measurement-Based Probabilistic Timing Analysis to Buffer Resources. WCET 2013: 97-108 - 2012
- [c33]Liliana Cucu-Grosjean, Luca Santinelli, Michael Houston, Code Lo, Tullio Vardanega, Leonidas Kosmidis, Jaume Abella, Enrico Mezzetti, Eduardo Quiñones, Francisco J. Cazorla:
Measurement-Based Probabilistic Timing Analysis for Multi-path Programs. ECRTS 2012: 91-101 - [c32]Bojan Maric, Jaume Abella, Mateo Valero:
ADAM: an efficient data management mechanism for hybrid high and ultra-low voltage operation caches. ACM Great Lakes Symposium on VLSI 2012: 245-250 - 2011
- [j12]Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla, Mateo Valero:
Exploiting intra-task slack time of load operations for DVFS in hard real-time multi-core systems. SIGBED Rev. 8(3): 32-35 (2011) - [j11]Javier Carretero, Pedro Chaparro, Xavier Vera, Jaume Abella, Antonio González:
Implementing End-to-End Register Data-Flow Continuous Self-Test. IEEE Trans. Computers 60(8): 1194-1206 (2011) - [j10]Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González:
Compiler Directed Issue Queue Energy Reduction. Trans. High Perform. Embed. Archit. Compil. 4: 42-62 (2011) - [c31]Bojan Maric, Jaume Abella, Francisco J. Cazorla, Mateo Valero:
Hybrid high-performance low-power and ultra-low energy reliable caches. Conf. Computing Frontiers 2011: 12 - [c30]Javier Carretero, Jaume Abella, Xavier Vera, Pedro Chaparro:
Control-Flow Recovery Validation Using Microarchitectural Invariants. DFT 2011: 209-216 - [c29]Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Yanos Sazeides, Mateo Valero:
RVC: a mechanism for time-analyzable real-time processors with faulty caches. HiPEAC 2011: 97-106 - [c28]Javier Carretero, Xavier Vera, Jaume Abella, Tanausú Ramírez, Matteo Monchiero, Antonio González:
Hardware/software-based diagnosis of load-store queues using expandable activity logs. HPCA 2011: 321-331 - [c27]Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Mateo Valero, Yanos Sazeides:
RVC-based time-predictable faulty caches for safety-critical systems. IOLTS 2011: 25-30 - [c26]Jaume Abella, Francisco J. Cazorla, Eduardo Quiñones, Arnaud Grasset, Sami Yehia, Philippe Bonnot, Dimitris Gizopoulos, Riccardo Mariani, Guillem Bernat:
Towards improved survivability in safety-critical systems. IOLTS 2011: 240-245 - [c25]Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González:
Design of complex circuits using the Via-Configurable transistor array regular layout fabric. SoCC 2011: 166-169 - 2010
- [j9]Jaume Abella, Xavier Vera:
Electromigration for microarchitects. ACM Comput. Surv. 42(2): 9:1-9:18 (2010) - [j8]Javier Carretero, Xavier Vera, Pedro Chaparro, Jaume Abella:
Microarchitectural Online Testing for Failure Detection in Memory Order Buffers. IEEE Trans. Computers 59(5): 623-637 (2010) - [c24]Jaume Abella, Javier Carretero, Pedro Chaparro, Xavier Vera:
The split register file. DATE 2010: 945-948 - [c23]Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio González:
High-Performance low-vcc in-order core. HPCA 2010: 1-11 - [c22]Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González:
VCTA: A Via-Configurable Transistor Array regular fabric. VLSI-SoC 2010: 335-340
2000 – 2009
- 2009
- [j7]Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin:
Exploring the limits of early register release: Exploiting compiler analysis. ACM Trans. Archit. Code Optim. 6(3): 12:1-12:30 (2009) - [j6]Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin:
Energy-efficient register caching with compiler assistance. ACM Trans. Archit. Code Optim. 6(4): 13:1-13:23 (2009) - [j5]Xavier Vera, Jaume Abella, Javier Carretero, Antonio González:
Selective replication: A lightweight technique for soft errors. ACM Trans. Comput. Syst. 27(4): 8:1-8:30 (2009) - [c21]Xavier Vera, Jaume Abella, Javier Carretero, Pedro Chaparro, Antonio González:
Online error detection and correction of erratic bits in register files. IOLTS 2009: 81-86 - [c20]Javier Carretero, Pedro Chaparro, Xavier Vera, Jaume Abella, Antonio González:
End-to-end register data-flow continuous self-test. ISCA 2009: 105-115 - [c19]Jaume Abella, Javier Carretero, Pedro Chaparro, Xavier Vera, Antonio González:
Low Vccmin fault-tolerant cache with highly predictable performance. MICRO 2009: 111-121 - 2008
- [j4]Jaume Abella, Xavier Vera, Osman S. Unsal, Oguz Ergin, Antonio González, James W. Tschanz:
Refueling: Preventing Wire Degradation due to Electromigration. IEEE Micro 28(6): 37-46 (2008) - [c18]Pedro Chaparro, Jaume Abella, Javier Carretero, Xavier Vera:
Issue system protection mechanisms. ICCD 2008: 599-604 - [c17]Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio González:
On-Line Failure Detection and Confinement in Caches. IOLTS 2008: 3-9 - [c16]Javier Carretero, Xavier Vera, Pedro Chaparro, Jaume Abella:
On-line Failure Detection in Memory Order Buffers. ITC 2008: 1-10 - 2007
- [c15]Jaume Abella, Xavier Vera, Osman S. Unsal, Oguz Ergin, Antonio González:
Fuse: A Technique to Anticipate Failures due to Degradation in ALUs. IOLTS 2007: 15-22 - [c14]Xavier Vera, Jaume Abella:
Surviving to Errors in Multi-Core Environments. IOLTS 2007: 260 - [c13]Jaume Abella, Xavier Vera, Antonio González:
Penelope: The NBTI-Aware Processor. MICRO 2007: 85-96 - 2006
- [c12]Jaume Abella, Antonio González:
Heterogeneous way-size cache. ICS 2006: 239-248 - [c11]Jaume Abella, Antonio González:
SAMIE-LSQ: set-associative multiple-instruction entry load/store queue. IPDPS 2006 - 2005
- [j3]Jaume Abella, Antonio González, Xavier Vera, Michael F. P. O'Boyle:
IATAC: a smart predictor to turn-off L2 cache lines. ACM Trans. Archit. Code Optim. 2(1): 55-77 (2005) - [j2]Xavier Vera, Jaume Abella, Josep Llosa, Antonio González:
An accurate cost model for guiding data locality transformations. ACM Trans. Program. Lang. Syst. 27(5): 946-987 (2005) - [c10]Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González, Oguz Ergin:
Compiler Directed Early Register Release. IEEE PACT 2005: 110-122 - [c9]Enric Gibert, Jaume Abella, F. Jesús Sánchez, Xavier Vera, Antonio González:
Variable-Based Multi-module Data Caches for Clustered VLIW Processors. IEEE PACT 2005: 207-217 - [c8]Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abella, Antonio González:
Software Directed Issue Queue Power Reduction. HPCA 2005: 144-153 - [c7]Jaume Abella, Antonio González:
Inherently Workload-Balanced Clustered Microarchitecture. IPDPS 2005 - 2004
- [c6]Jaume Abella, Antonio González:
Low-Complexity Distributed Issue Queue. HPCA 2004: 73-83 - 2003
- [j1]Jaume Abella, Ramon Canal, Antonio González:
Power- and Complexity-Aware Issue Queue Designs. IEEE Micro 23(5): 50-58 (2003) - [c5]Xavier Vera, Jaume Abella, Antonio González, Josep Llosa:
Optimizing Program Locality Through CMEs and GAs. IEEE PACT 2003: 68-78 - [c4]Jaume Abella, Antonio González:
Power-Aware Adaptive Issue Queue and Register File. HiPC 2003: 34-43 - [c3]Jaume Abella, Antonio González:
Power Efficient Data Cache Designs. ICCD 2003: 8-13 - [c2]Jaume Abella, Antonio González:
On Reducing Register Pressure and Energy in Multiple-Banked Register Files. ICCD 2003: 14-20 - 2002
- [c1]Jaume Abella, Antonio González, Josep Llosa, Xavier Vera:
Near-Optimal Loop Tiling by Means of Cache Miss Equations and Genetic Algorithms. ICPP Workshops 2002: 568-580
Coauthor Index
aka: Sergi Alcaide Portet
aka: Mikel Azkarate-askasua
aka: Francisco Javier Cazorla-Almeida
aka: Jon Pérez-Cerrolaza
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