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Associative Memory

An associative memory, also known as a content-addressable memory (CAM), is a special type of memory that can be accessed by its contents rather than a numerical address. It allows for parallel searching and comparison of a data word against the entire memory in one clock cycle. Each memory cell contains storage and match logic circuits to compare its contents with an input argument word. A match signal is generated if the contents of the cell match the unmasked bits of the argument word. The memory can be accessed simultaneously and in parallel based on data content rather than location.

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K.R.Raguram
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10K views17 pages

Associative Memory

An associative memory, also known as a content-addressable memory (CAM), is a special type of memory that can be accessed by its contents rather than a numerical address. It allows for parallel searching and comparison of a data word against the entire memory in one clock cycle. Each memory cell contains storage and match logic circuits to compare its contents with an input argument word. A match signal is generated if the contents of the cell match the unmasked bits of the argument word. The memory can be accessed simultaneously and in parallel based on data content rather than location.

Uploaded by

K.R.Raguram
Copyright
© Attribution Non-Commercial (BY-NC)
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Download as PPT, PDF, TXT or read online on Scribd
Download as ppt, pdf, or txt
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C A

&

P P

ASSOCIATIVE MEMORY

C A
&

ASSOCIATIVE MEMORY

P P

A memory unit accessed by content is called an associative memory or Content Addressable Memory(CAM)

It is also called as parallel search memory or multi-access memory

Search procedure and algorithm


Stored data can be identified for access by content of data rather than address.
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CONT

Memory is accessed simultaneously and in parallel on basis of data rather than address or location. More expensive than RAM Each cell must have storage

capability & logic circuits for matching content with external


argument

Used in very critical and short search time applications.


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C A
&

BLOCK DIAGRAM OF ASSOCIATIVE MEMORY


Argument register (A)

P P

Key register (K)

Match register Input Associative memory array and logic Read Write m words n bits per word

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Output

C A
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HARDWARE ORGANISATION

P P

Memory array m words with n bits per word

Each word in memory is compared in parallel with


content of argument register.

Key register Provides mask for choosing a particular field or key in argument word.

Entire argument is compared with each memory word if

key register contains 1s


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C A
&

ASSOCIATIVE MEMORY
LHS
A Register 101 111100 K Register 111 000000

P P
RHS Argument Key (Mask)
Match Logic

Memory
Word 1 Word 2 100 111100 M = 0 101 000011 M = 1

M = 1, Match

C A
&

m word x n cells per word


A1 Aj An

P P

K1

Kj

Kn

Word 1

C 11

C 1j

C 1n

M1

Word i

C i1

ij

C in

Mi

Word m

C m1 Bit 1

C mj Bit j

C mn Bit n

Mm

C A
&

ONE CELL OF ASSOCIATIVE MEMORY


Ai Input Kj

P P

Write

R Read

S F ij

Match logic

To M i

Output

C A
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CONT

P P

Internal organisation of cell Cij.

The input bit is transferred into storage cell during a


write operation.

The bit stored is read out during a read operation Match logic compares content of storage cell with unmasked bit of argument and sets Mi

C A
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Match Logic
Match logic for each word is derived from comparison algorithm for two binary numbers. First neglect key bits Compare Argument A with bits stored in cells. Word i equals to argument A Two bits are equal if they are both 0 & 1. Equality of two bits are expressed logically by Boolean function Xj = Aj Fij (1 AND 1) + Aj Fij (0 AND 0)

P P

When Mi = 1, then Boolean function is Mi = x1 x2 x3 ..... xn

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C A
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OPERATION OF ASSOCIATIVE MEMORY

Key bit Kj : xj + Kj P P Kj = 0 : Aj and Fij need no comparison ( Kj : xj + 1 = 1 ) Kj = 1 : Aj and Fij need comparison ( Kj : xj + 0 = xj ) Match Logic for word I : Mi = (x1 + K1) (x2 + K2). (xn + Kn) = (xj + Kj) = (Aj Fij + Aj Fij + Kj)

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C A
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MATCH LOGIC FOR ONE WORD

P P

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C A
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READ OPERATION

P P

If more than 1 word in memory matches the unmasked argument field, all matched words will have 1 in match register.

Scan the bits of match register one at a time.

Matched words are read by applying read signal,

whose Mi = 1.
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C A
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CONT

P P When output Mi is connected directly to read line in

same word, content of matched word will be presented


automatically in output line.

No special read command is required.

If words containing zero are excluded, all zero output will indicate no match.
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C A
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WRITE OPERATION

P It must have write capability to store the information to be P searched.

If entire memory is loaded with new information at once

prior to search, then writing can be done by addressing


each location in sequence.

Device works as RAM for writing and CAM for reading.


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C A
&

CONT

P P

Address for input can be decoded as in RAM. Instead of m address lines, one for each word, Number of address lines are reduced to d lines.

m = 2d

If unwanted words are deleted and new words are inserted, we need special register (tag register) to distinguish between active and inactive words.
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C A
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P P

THANK YOU

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