SUDHARSAN ENGINEERING COLLEGE Sathiyamangalam-Pudukkottai

EC2308: MICROPROCESSORS & MICROCONTROLLERS LAB MANUAL V SEM ECE

1. INTRODUCTION TO 8085 INTEL 8085 is one of the most popular 8-bit microprocessor capable of addressing 64 KB of memory and its architecture is simple. The device has 40 pins, requires +5 V power supply and can operate with 3MHz single phase clock.

ALU (Arithmetic Logic Unit): The 8085A has a simple 8-bit ALU and it works in coordination with the accumulator, temporary registers, 5 flags and arithmetic and logic circuits. ALU has the capability of performing several mathematical and logical operations. The temporary registers are used to hold the data during an arithmetic and logic operation. The result is stored in the accumulator and the flags are set or reset according to the result of the operation. The flags are affected by the arithmetic and logic operation. They are as follows: Sign flag After the execution of the arithmetic - logic operation if the bit D7 of the result is 1, the sign flag is set. This flag is used with signed numbers. If it is 1, it is a negative number and if it is 0, it is a positive number. Zero flag

The zero flag is set if the ALU operation results in zero. This flag is modified by the result in the accumulator as well as in other registers. Auxillary carry flag In an arithmetic operation when a carry is generated by digit D3 and passed on to D4, the auxillary flag is set. Parity flag After arithmetic logic operation, if the result has an even number of 1s the flag is set. If it has odd number of 1s it is reset. Carry flag If an arithmetic operation results in a carry, the carry flag is set. The carry flag also serves as a borrow flag for subtraction.

Timing and control unit This unit synchronizes all the microprocessor operation with a clock and generates the control signals necessary for communication between the microprocessor and peripherals. The control signals RD (read) and WR (write) indicate the availability of data on the data bus.

Instruction register and decoder The instruction register and decoder are part of the ALU. When an instruction is fetched from memory it is loaded in the instruction register. The decoder decodes the instruction and establishes the sequence of events to follow.

Register array The 8085 has six general purpose registers to store 8-bit data during program execution. These registers are identified as B, C, D, E, H and L. they can be combined as BC, DE and HL to perform 16-bit operation.

Accumulator Accumulator is an 8-bit register that is part of the ALU. This register is used to store 8-bit data and to perform arithmetic and logic operation. The result of an operation is stored in the accumulator.

Program counter The program counter is a 16-bit register used to point to the memory address of the next instruction to be executed.

Stack pointer

It is a 16-bit register which points to the memory location in R/W memory, called the Stack.

Communication lines 8085 microprocessor performs data transfer operations using three communication lines called buses. They are address bus, data bus and control bus. Address bus it is a group of 16-bit lines generally identified as A0 A15. The address bus is unidirectional i.e., the bits flow in one direction from microprocessor to the peripheral devices. It is capable of addressing 216 memory locations. Data bus it is a group of 8 lines used for data flow and it is bidirectional. The data ranges from 00 FF. Control bus it consist of various single lines that carry synchronizing signals. The microprocessor uses such signals for timing purpose.

2(A). 8 BIT DATA ADDITION AIM: To add two 8 bit numbers stored at consecutive memory locations. ALGORITHM: 1. Initialize memory pointer to data location.
6

2. Get the first number from memory in accumulator. 3. Get the second number and add it to the accumulator. 4. Store the answer at another memory location.

RESULT: Thus the 8 bit numbers stored at 4500 &4501 are added and the result stored at 4502 & 4503.

FLOW CHART:
START

[C]

00H

[HL]

4500H

[A]

[M]

[HL]

[HL]+1

[A]

[A]+[M]

Is there a Carry ?

[C]

[C]+1

NO

[HL]

[HL]+1

YES

[M]

[A]

[HL]

[HL]+1

[M]

[C]

STOP

PROGRAM: ADDRESS OPCODE LABEL MNEMONICS OPERAND COMMENT Clear C reg. 4100 START MVI C, 00 4101 4102 LXI H, 4500 Initialize HL reg. to 4103 4500 4104 4105 MOV A, M Transfer first data to accumulator 4106 INX H Increment HL reg. to point next memory Location. 4107 ADD M Add first number to acc. Content. 4108 JNC L1 Jump to location if 4109

410A

410B 410C L1

INR INX

C H

410D

MOV

M, A

410E

INX

410F 4110

MOV HLT

M, C

result does not yield carry. Increment C reg. Increment HL reg. to point next memory Location. Transfer the result from acc. to memory. Increment HL reg. to point next memory Location. Move carry to memory Stop the program

OBSERVATION:

INPUT 4500 4501

OUTPUT 4502 4503

10

2(B). 8 BIT DATA SUBTRACTION

AIM: To Subtract two 8 bit numbers stored at consecutive memory locations. ALGORITHM: 1. 2. 3. 4. Initialize memory pointer to data location. Get the first number from memory in accumulator. Get the second number and subtract from the accumulator. If the result yields a borrow, the content of the acc. is complemented and 01H is added to it (2s complement). A register is cleared and the content of that reg. is incremented in case there is a borrow. If there is no borrow the content of the acc. is directly taken as the result. 5. Store the answer at next memory location.

RESULT: Thus the 8 bit numbers stored at 4500 &4501 are subtracted and the result stored at 4502 & 4503.

11

FLOW CHART:

START

[C]

00H

[HL]

4500H

[A]

[M]

[HL]

[HL]+1

[A]

[A]-[M]

Is there a Borrow ?

12
Complement [A] Add 01H to [A]

NO

YES

PROGRAM: ADDRESS OPCODE LABEL MNEMONICS OPERAND COMMENT 4100 START MVI C, 00 Clear C reg.
13

4102 4102 4103 4104 4105

LXI

H, 4500

MOV

A, M

4106

INX

4107

SUB

4108 4109 410A 410B 410C

JNC

L1

INR CMA

410D 410E 410F L1

ADI

01H

INX

4110

MOV

M, A

Initialize HL reg. to 4500 Transfer first data to accumulator Increment HL reg. to point next mem. Location. Subtract first number from acc. Content. Jump to location if result does not yield borrow. Increment C reg. Complement the Acc. content Add 01H to content of acc. Increment HL reg. to point next mem. Location. Transfer the

14

4111

INX

4112 4113

MOV HLT

M, C

result from acc. to memory. Increment HL reg. to point next mem. Location. Move carry to mem. Stop the program

OBSERVATION:

INPUT 4500 4501

OUTPUT 4502 4503

15

3(A). 8 BIT DATA MULTIPLICATION AIM: To multiply two 8 bit numbers stored at consecutive memory locations and store the result in memory. ALGORITHM: LOGIC: Multiplication can be done by repeated addition. 1. 2. 3. 4. 5. 6. 7. 8. Initialize memory pointer to data location. Move multiplicand to a register. Move the multiplier to another register. Clear the accumulator. Add multiplicand to accumulator Decrement multiplier Repeat step 5 till multiplier comes to zero. The result, which is in the accumulator, is stored in a memory location.

RESULT: Thus the 8-bit multiplication was done in 8085p using repeated addition method.

16

FLOW CHART:
START

[HL] 4500

B M

[HL] [HL]+1

A 00

C 00

17

[A] [A] +[M]

Is there any carry

NO

YES
C C+1

B B-1

NO IS B=0 YES
A A

[HL]

[HL]+1

[M]

[A]

[HL]

[HL]+1

[M]

[C]

STOP

18

19

PROGRAM: ADDRE OPCO SS DE 4100 4101 4102 4103 4104 LABE MNEMON OPERA COMMENT L ICS ND START LXI H, 4500 Initialize HL reg. to 4500 MOV B, M Transfer first data to reg. B INX H Increment HL reg. to point next mem. Location. MVI A, 00H Clear the acc. MVI C, 00H Clear C reg for carry

4105 4106 4107 4108

4109 410A 410B 410C 410D 410E 410F 4110 4111 4112

L1

ADD JNC

M NEXT

Add multiplicand multiplier times. Jump to NEXT if there is no carry Increment C reg Decrement B reg Jump to L1 if B is not zero. Increment HL reg. to point next mem. Location. Transfer the result from acc.
20

NEXT

INR DCR JNZ

C B L1

INX

4113

MOV

M, A

4114

INX

4115

MOV

M, C

4116

HLT

to memory. Increment HL reg. to point next mem. Location. Transfer the result from C reg. to memory. Stop the program

OBSERVATION:

INPUT 4500 4501

OUTPUT 4502 4503 3(B). 8 BIT DIVISION

AIM: To divide two 8-bit numbers and store the result in memory. ALGORITHM: LOGIC: Division is done using the method Repeated subtraction. 1. Load Divisor and Dividend 2. Subtract divisor from dividend 3. Count the number of times of subtraction which equals the quotient 4. Stop subtraction when the dividend is less than the divisor .The dividend now becomes the remainder. Otherwise go to step 2. 5. stop the program execution.

21

RESULT: Thus an ALP was written for 8-bit division using repeated subtraction method and executed using 8085 p kits

FLOWCHART:
START

B 00

[HL] 4500

22

A M

NO YES

23

PROGRAM: ADDRE OPCO SS DE 4100 4101 4102 4103 4104 4105 4106 LABE L MNE MONI CS MVI LXI OPE RAN D B,00 H,450 0 COMMENTS

Clear B reg for quotient Initialize HL reg. to 4500H

MOV INX

A,M H

4107 4108 4109 410A 410B 410C 410D 410E

LOOP

SUB INR JNC

M B LOOP

ADD DCR INX

M B H

Transfer dividend to acc. Increment HL reg. to point next mem. Location. Subtract divisor from dividend Increment B reg Jump to LOOP if result does not yield borrow Add divisor to acc. Decrement B reg Increment HL reg. to point next mem. Location.
24

410F 4110

MOV INX

M,A H

4111

MOV

M,B

4112

HLT

Transfer the remainder from acc. to memory. Increment HL reg. to point next mem. Location. Transfer the quotient from B reg. to memory. Stop the program

OBSERVATION:

S.NO 1 2

INPUT ADDRESS DATA 4500 4501 4500 4501

OUTPUT ADDRESS DATA 4502 4503 4502 4503

25

4(A). 16 BIT DATA ADDITION AIM: To add two 16-bit numbers stored at consecutive memory locations. ALGORITHM: 1. Initialize memory pointer to data location. 2. Get the first number from memory and store in Register pair. 3. Get the second number in memory and add it to the Register pair. 4. Store the sum & carry in separate memory locations.

RESULT: Thus an ALP program for 16-bit addition was written and executed in 8085p using special instructions.

26

27

FLOW CHART:
START

[L] [H] [DE]

[8050 H] [8051 H] [HL]

[L] [H]

[8052H] [8053H]

[A]

00H

[HL]

[HL]+[DE]

Is there a Carry?

[A]

[A]+1

NO
[8054] [ L]

[8055]

[H]

YES
[8056] [A]

STOP

28

PROGRAM: ADDRESS OPCODE LABEL MNEMONICS OPERAND COMMENT 8000 START LHLD 8050H Load the augend in 8001 DE pair 8002 through HL 8003 XCHG pair. Load the 8004 LHLD 8052H addend in 8005 HL pair. 8006 8007 MVI A, 00H Initialize reg. A for carry 8008 8009 DAD D Add the contents of HL Pair with that of DE pair. 800A JNC LOOP If there is no carry, go to 800B

29

800C

800D

INR

800E 800F 8010 8011 8012 8013

LOOP

SHLD

8054H

STA

8056H

8014

HLT

the instruction labeled LOOP. Otherwise increment reg. A Store the content of HL Pair in 8054H(LSB of sum) Store the carry in 8056H through Acc. (MSB of sum). Stop the program.

OBSERVATION:

INPUT ADDR DATA ESS 8050H 8051H 8052H 8053H

OUTPUT ADDRE DATA SS 8054H 8055H 8056H

30

4(B). 16 BIT DATA SUBTRACTION AIM: To subtract two 16-bit numbers stored at consecutive memory locations. ALGORITHM: 1. Initialize memory pointer to data location. 2. Get the subtrahend from memory and transfer it to register pair. 3. Get the minuend from memory and store it in another register pair. 4. Subtract subtrahend from minuend. 5. Store the difference and borrow in different memory locations. RESULT: Thus an ALP program for subtracting two 16-bit numbers was written and executed.

31

FLOW CHART:
START

[L] [H]

[8050 H] [8051 H]

[DE]

[HL]

[L] [H]

[8052H] [8053H]

32

[HL]

[HL]-[DE]

Is there a borrow?

NO
[C] [C]+1

YES
[8054] [ L]

[8055]

[H]

[8056]

[C]

STOP

PROGRAM: ADDRESS OPCODE LABEL MNEMO OPER COMMENTS NICS AND 8000 START MVI C, 00 Initialize C
33

8001 8002 8003 8004 8005 8006 8007 8008 8009

LHLD

XCHG LHLD

MOV

800A

SUB

800B

MOV

800C

MOV

800D

SBB

800E

MOV

800F 8010

SHLD

reg. 8050H Load the subtrahend in DE reg. Pair through HL reg. pair. 8052H Load the minuend in HL reg. Pair. A, L Move the content of reg. L to Acc. E Subtract the content of reg. E from that of acc. L, A Move the content of Acc. to reg. L A, H Move the content of reg. H to Acc. D Subtract content of reg. D with that of Acc. H, A Transfer content of acc. to reg. H 8054H Store the content of HL

34

8011

8012 8013 8014 8015 8016 NEXT

JNC

INR MOV

8017 8018 8019 801A

STA

HLT

pair in memory location 8504H. NEXT If there is borrow, go to the instruction labeled NEXT. C Increment reg. C A, C Transfer the content of reg. C to Acc. 8056H Store the content of acc. to the memory location 8506H Stop the program execution.

OBSERVATION: INPUT OUTPUT ADDR DATA ADDRE DATA ESS SS 8050H 8054H 8051H 8055H 8052H 8056H 8053H 5(A). 16 BIT MULTIPLICATION AIM:

35

To multiply two 16 bit numbers and store the result in memory. ALGORITHM: 1. 2. 3. 4. Get the multiplier and multiplicand. Initialize a register to store partial product. Add multiplicand, multiplier times. Store the result in consecutive memory locations.

RESULT: Thus the 16-bit multiplication was done in 8085p using repeated addition method.

36

37

FLOWCHART:
START

L H

[8050] [8051]

SP

HL

L H

[8052] [8053]

DE

HL

HL BC

0000 0000

HL

HL+SP

Is Carry flag set?

BC

BC+1

DE NO

DE+1

Is Zero flag set?

YES

38

NO

YES
A

[8054] [8055]

L H

[8056] [8057]

C B

STOP

39

40

ADDR ESS 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 8015 8016 8017 8018

OPCO LAB DE EL STA RT

MNE OPER MONI AND CS LHLD 8050

COMMENTS

Load the first No. in stack pointer through HL reg. pair

SPHL LHLD

8052

XCHG LXI H, 0000H

Load the second No. in HL reg. pair & Exchange with DE reg. pair.

Clear HL & DE reg. pairs. LXI B, 0000H

LOO P

DAD JNC

SP NEXT

Add SP with HL pair. If there is no carry, go to the instruction labeled NEXT Increment BC reg. pair Decrement DE reg. pair. Move the content of reg. E to Acc. OR Acc. with D reg. If there is no zero, go to instruction labeled LOOP

NEX T

INX DCX MOV ORA JNZ

B D A,E D LOOP

41

8019 801A 801B 801C 801D 801E 801F 8020 8021 8022 8023 8024 OBSERVATION: INPUT ADDRESS DATA 8050 8051 8052 8053

SHLD

8054

MOV STA

A, C 8056

Store the content of HL pair in memory locations 8054 & 8055. Move the content of reg. C to Acc. Store the content of Acc. in memory location 8056. Move the content of reg. B to Acc. Store the content of Acc. in memory location 8056. Stop program execution

MOV STA

A, B 8057

HLT OUTPUT ADDRESS DATA 8054 8055 8056 8057 5(B). 16- BIT DIVISION

AIM: To divide two 16-bit numbers and store the result in memory using 8085 mnemonics. ALGORITHM: 1. Get the dividend and divisor. 2. Initialize the register for quotient. 3. Repeatedly subtract divisor from dividend till dividend becomes less than divisor.
42

4. Count the number of subtraction which equals the quotient. 5. Store the result in memory. RESULT: Thus the 16-bit Division was done in 8085p using repeated subtraction method.

43

FLOWCHART:
START

L H

[8051] [8052]

HL

DE

L H

[8050] [8051]

BC

0000H

L; A A- E L A

A A H

H A- H- Borrow A

BC

BC+ 1

Is Carry flag set ?

44

NO

YES

45

BC HL

BC- 1 HL+DE

L H

[8054] [8055]

[8056]

[8057]

STOP

46

PROGRAM: ADDR OPCO LABE MNE ESS DE L MON ICS 8000 STAR LHLD T 8001 8002 8003 XCH G 8004 LHLD 8005 8006 8007 8008 8009 800A 800B 800C LXI

OPER A ND 8052

COMMENTS

Load the first No. in stack pointer through HL reg. pair

8050

Load the second No. in HL reg. pair & Exchange with DE reg. pair. Clear BC reg. pair.

B, 0000H

LOOP MOV SUB MOV

A, L E L, A

Move the content of reg. L to Acc. Subtract reg. E from that of Acc. Move the content of Acc to

47

800D 800E 800F 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 801A 801B 801C 801D 801E 801F 8020 8021 OBSERVATION: INPUT ADDRESS DATA 8050 8051

MOV SBB MOV INX JNC

A, H D H, A B LOOP

L. Move the content of reg. H Acc. Subtract reg. D from that of Acc. Move the content of Acc to H. Increment reg. Pair BC If there is no carry, go to the location labeled LOOP. Decrement BC reg. pair. Add content of HL and DE reg. pairs. Store the content of HL pair in 8054 & 8055. Move the content of reg. C to Acc. Store the content of Acc. in memory 8056 Move the content of reg. B to Acc. Store the content of Acc. in memory 8057. Stop the program execution.

DCX DAD

B D

SHLD 8054

MOV STA

A, C 8056

MOV STA

A, B 8057

HLT

OUTPUT ADDRESS DATA 8054 8055

8052 8053

8056 8057 6(A). LARGEST ELEMENT IN AN ARRAY

AIM: To find the largest element in an array.

ALGORITHM: 1. Place all the elements of an array in the consecutive memory locations. 2. Fetch the first element from the memory location and load it in the accumulator. 3. Initialize a counter (register) with the total number of elements in an array. 4. Decrement the counter by 1. 5. Increment the memory pointer to point to the next element. 6. Compare the accumulator content with the memory content (next element).

7. If the accumulator content is smaller, then move the memory content Else continue. 8. Decrement the counter by 1. 9. Repeat steps 5 to 8 until the counter reaches zero 10. Store the result (accumulator content) in the specified (largest element) to the accumulator.

memory location.
49

RESULT: Thus the largest number in the given array is found out.

FLOW CHART:
START

[HL]

[8100H]

[B] [A] [HL

04H [HL]

[HL] + 1

IS [A] < [HL]? 50 [A] [HL]

NO

YES

NO

YES

PROGRAM:
51

ADDR E SS 8001 8002 8003 8004 8005 8006 8007

OPC O DE

LAB EL

MNE M ONIC S LXI

OPE R AND

COMMENTS

H,810 Initialize HL reg. to 0 8100H

MVI

MOV LOOP 1 INX

8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 LOOP

CMP JNC

Initialize B reg with no. of comparisons(n1) A,M Transfer first data to acc. H Increment HL reg. to point next memory location M Compare M & A LOOP If A is greater than M then go to loop B,04 Transfer data from M to A reg B Decrement B reg LOOP If B is not Zero go to loop1 1 A,M

MOV DCR JNZ

STA

8105

Store the result in a memory location. Stop the program

HLT

52

OBSERVATION: INPUT ADDRESS DATA 8100 8101 8102 8103 8104 OUTPUT ADDRESS DATA 8105

6(B). SMALLEST ELEMENT IN AN ARRAY AIM: To find the smallest element in an array.

ALGORITHM: 1. Place all the elements of an array in the consecutive memory locations. 2. Fetch the first element from the memory location and load it in the accumulator. 3. Initialize a counter (register) with the total number of elements in an array. 4. Decrement the counter by 1.
53

5. Increment the memory pointer to point to the next element. 6. Compare the accumulator content with the memory content (next element).

7. If the accumulator content is smaller, then move the memory content Else continue. 8. Decrement the counter by 1. 9. Repeat steps 5 to 8 until the counter reaches zero 10. Store the result (accumulator content) in the specified (largest element) to the accumulator.

memory location.

RESULT: Thus the smallest number in the given array is found out.

54

FLOW CHART:
START

[HL]

[8100H]

[B] [A] [HL

04H [HL]

[HL] + 1

IS [A] < [HL]?

YES

[A] [B]

[HL] [B]-1

NO
IS [B] = 0?

[8105] STOP

[A]

NO

YES

55

PROGRAM: ADDR E SS 8001 8002 8003 8004 8005 8006 8007 LOOP 1 OPC O DE LAB EL MNE M ONIC S LXI OPE R AND COMMENTS

H,810 Initialize HL reg. to 8100H 0

MVI

MOV INX

8008 8009 800A 800B

CMP JC

Initialize B reg with no. of comparisons(n1) A,M Transfer first data to acc. H Increment HL reg. to point next memory location M Compare M & A LOOP If A is lesser than M then go to loop

B,04

56

800C 800D 800E 800F 8010 8011 8012 8013 8014 LOOP

MOV DCR JNZ

Transfer data from M to A reg B Decrement B reg LOOP If B is not Zero go to loop1 1

A,M

STA

8105

Store the result in a memory location. Stop the program

HLT

OBSERVATION: INPUT ADDRESS DATA 8100 8101 8102 8103 8104 OUTPUT ADDRESS DATA 8105

7(A).ASCENDING ORDER AIM:

57

To sort the given number in the ascending order using 8085 microprocessor. ALGORITHM: 1. Get the numbers to be sorted from the memory locations. 2. Compare the first two numbers and if the first number is larger than second then I interchange the number. 3. If the first number is smaller, go to step 4 4. Repeat steps 2 and 3 until the numbers are in required order

RESULT: Thus the ascending order program is executed and thus the numbers are arranged in ascending order.

58

FLOWCHART:

START

[B] [HL]

04H [8100H]

[C] [A] [HL

04H [HL] [HL] + 1

IS [A] < [HL]?

[D]

[HL]

YES
[HL] [A]

NO
[HL] [HL] - 1

[HL] [HL] [C]

[D] [HL] + 1 59

[C] 01 H

IS [C] = 0?

NO
[B] [B]-1

YES
IS [B] = 0? 60 STOP

NO

YES

PROGRAM: ADD RE OPC O LAB EL MNEM ONICS OPE R COMMENTS

61

SS 8000 8001 8002 8003 8004 8005 8006 8007 8008

DE MVI

LOOP 3

LXI

AND B,04 Initialize B reg with number of comparisons (n-1) H,810 Initialize HL reg. to 8100H 0

MVI

LOOP 2

MOV INX

8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014

CMP JC

Initialize C reg with no. of comparisons(n1) A,M Transfer first data to acc. H Increment HL reg. to point next memory location M Compare M & A LOOP If A is less than M 1 then go to loop1 C,04

MOV MOV DCX MOV INX DCR JNZ

D,M M,A H M,D H C

LOOP 1

Transfer data from M to D reg Transfer data from acc to M Decrement HL pair Transfer data from D to M Increment HL pair Decrement C reg

LOOP If C is not zero go to 2 loop2

62

8015 8016 8017 8018 8019 801A

DCR JNZ

B Decrement B reg LOOP If B is not Zero go to loop3 3

HLT

Stop the program

OBSERVATION: INPUT MEMORY DATA LOCATION 8100 8101 8102 8103 8104 OUTPUT MEMORY DATA LOCATION 8100 8101 8102 8103 8104

7(B). DESCENDING ORDER AIM: To sort the given number in the descending order using 8085 microprocessor. ALGORITHM: 1. Get the numbers to be sorted from the memory locations. 2. Compare the first two numbers and if the first number is smaller than second then I interchange the number. 3. If the first number is larger, go to step 4 4. Repeat steps 2 and 3 until the numbers are in required order

63

RESULT: Thus the descending order program is executed and thus the numbers are arranged in descending order.

FLOWCHART:

START

[B] [HL]

04H 64 [8100H]

NO

YES

65

IS [C] = 0?

NO
[B] [B]-1

YES
IS [B] = 0?

STOP

NO

YES

66

PROGRAM: ADDRE OPCO LABEL MNEM OPER COMMENTS SS DE ONICS AND 8000 MVI B,04 Initialize B reg with number of 8001 comparisons (n1) 8002 LOOP 3 LXI H,8100 Initialize HL reg. to 8003 8100H 8004 8005 MVI C,04 Initialize C reg with no. of 8006 comparisons(n-1) 8007 LOOP2 MOV A,M Transfer first data
67

8008

INX

8009 800A 800B 800C 800D 800E

CMP JNC

MOV MOV

800F 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 801A LOOP1

DCX MOV INX DCR JNZ

to acc. H Increment HL reg. to point next memory location M Compare M & A LOOP1 If A is greater than M then go to loop1 D,M Transfer data from M to D reg M,A Transfer data from acc to M H Decrement HL pair M,D Transfer data from D to M H Increment HL pair C Decrement C reg LOOP2 If C is not zero go to loop2 B Decrement B reg LOOP3 If B is not Zero go to loop3 Stop the program

DCR JNZ

HLT

OBSERVATION: INPUT MEMORY DATA OUTPUT MEMORY DATA

LOCATION LOCATION 8100 8100 8101 8101 8102 8102 8103 8103 8104 8104 8(A). CODE CONVERSION DECIMAL TO HEX AIM: To convert a given decimal number to hexadecimal. ALGORITHM: 1. Initialize the memory location to the data pointer. 2. Increment B register. 3. Increment accumulator by 1 and adjust it to decimal every time. 4. Compare the given decimal number with accumulator value. 5. When both matches, the equivalent hexadecimal value is in B register. 6. Store the resultant in memory location. RESULT: Thus an ALP program for conversion of decimal to hexadecimal was written and executed.

69

70

FLOWCHART:

START

HL A

4500H 00

B B

00H B+1

A +1

Decimal adjust accumulator

Is A=M?

8101

NO A
Stop

YES

71

PROGRAM: ADDR E SS 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E OPC O DE LAB EL MNE M ONIC S LXI OPE R AND COMMENTS

H,810 Initialize HL reg. to 0 8100H

MVI MVI LOOP INR ADI DAA CMP JNZ

A,00 B,00 B 01

Initialize A register. Initialize B register.. Increment B reg. Increment A reg

Decimal Adjust Accumulator M Compare M & A LOOP If acc and given number are not equal, then go to LOOP

72

800F 8010 8011 8012 8013

MOV STA

A,B 8101

Transfer B reg to acc. Store the result in a memory location. Stop the program

HLT

RESULT: INPUT ADDRESS DATA 8100 OUTPUT ADDRESS DATA 8101

8(B). CODE CONVERSION HEXADECIMAL TO DECIMAL AIM: To convert a given hexadecimal number to decimal. ALGORITHM:

73

1. Initialize the memory location to the data pointer. 2. Increment B register. 3. Increment accumulator by 1 and adjust it to decimal every time. 4. Compare the given hexadecimal number with B register value. 5. When both match, the equivalent decimal value is in A register. 6. Store the resultant in memory location. RESULT: Thus an ALP program for conversion of hexadecimal to decimal was written and executed.

74

75

FLOWCHART:
HL A

START

8100H 00

B C B

00H 00H B+1

A +1

Decimal adjust accumulator

Is there carry?

C D A,

C+1 A B,

Is A=M?

8101 8102

A, A A
Stop

76

NO

YES

PROGRAM: ADDR E SS 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E OPC O DE LAB EL MNE M ONIC S LXI OPE R AND COMMENTS

H,810 Initialize HL reg. to 0 8100H

MVI MVI MVI LOOP INR ADI DAA JNC

A,00 B,00 C,00 B 01

Initialize A register. Initialize B register. Initialize C register for carry. Increment B reg. Increment A reg

Decimal Adjust Accumulator NEXT If there is no carry go to NEXT.

800F 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 801A 801B 801C 801D 801E 801F

NEXT

INR MOV MOV CMP MOV JNZ

C D,A A,B M A,D LOOP

STA

8101

Increment c register. Transfer A to D Transfer B to A Compare M & A Transfer D to A If acc and given number are not equal, then go to LOOP Store the result in a memory location. Transfer C to A Store the carry in another memory location. Stop the program

MOV STA

A,C 8102

HLT

RESULT: INPUT ADDRESS 8100 OUTPUT ADDRESS 8101 8102 9(A) BCD ADDITION AIM: To add two 8 bit BCD numbers stored at consecutive memory locations. ALGORITHM:
78

DAT A

DATA

1. 2. 3. 4.

Initialize memory pointer to data location. Get the first number from memory in accumulator. Get the second number and add it to the accumulator Adjust the accumulator value to the proper BCD value using DAA instruction. 5. Store the answer at another memory location.

RESULT: Thus the 8 bit BCD numbers stored at 4500 &4501 are added and the result stored at 4502 & 4503.

79

FLOW CHART:
START

[C]

00H

[HL]

4500H

[A]

[M]

[HL]

[HL]+1

[A] [A]+[M] Decimal Adjust Accumulator

Is there a Carry ?

NO
[C] [C]+1

[HL]

[HL]+1

YES

[M]

[A]

80
[HL] [HL]+1

PROGRAM: ADDRESS OPCODE LABEL MNEMONICS OPERAND COMMENT 4100 START MVI C, 00 Clear C reg. 4103 4102 LXI H, 4500 Initialize HL reg. to 4103 4500 4104 4105 MOV A, M Transfer first data to accumulator 4106 INX H Increment HL reg. to point next memory

81

4107

ADD

4108

DAA

4109 410A 410B 410C 410D L1

JNC

L1

INR INX

C H

410E

MOV

M, A

410F

INX

4110 4111

MOV HLT

M, C

Location. Add first number to acc. Content. Decimal adjust accumulator Jump to location if result does not yield carry. Increment C reg. Increment HL reg. to point next memory Location. Transfer the result from acc. to memory. Increment HL reg. to point next memory Location. Move carry to memory Stop the program

82

OBSERVATION:

INPUT 4500 4501

OUTPUT 4502 4503

9(B). BCD SUBTRACTION

AIM: To Subtract two 8 bit BCD numbers stored at consecutive memory locations. ALGORITHM: 1. 2. 3. 4. 5. Load the minuend and subtrahend in two registers. Initialize Borrow register to 0. Take the 100s complement of the subtrahend. Add the result with the minuend which yields the result. Adjust the accumulator value to the proper BCD value using DAA instruction. If there is a carry ignore it. 6. If there is no carry, increment the carry register by 1 7. Store the content of the accumulator (result)and borrow register in the specified memory location

RESULT: Thus the 8 bit BCD numbers stored at 4500 &4501 are subtracted and the result stored at 4502 & 4503.
83

FLOW CHART:
START

[D] HL B HL C A [A] [A] [A]

00H 4500 M HL+ 1 M 99 [A] [C] [A]+1 [A]+[B] DAA

84

Is there a

YES

NO

PROGRAM:
85

ADDRESS OPCODE LABEL MNEMONICS OPERAND COMMENT 4100 START MVI D, 00 Clear D reg. 4101 4102 LXI H, 4500 Initialize HL reg. to 4103 4500 4104 4105 MOV B, M Transfer first data to accumulator 4106 INX H Increment HL reg. to point next mem. Location. 4107 MOV C, M Move second no. to B reg. 4108 MVI A, 99 Move 99 to the 4109 Accumulator 410A SUB C Subtract [C] from acc. Content. 410B INR A Increment A register 410C ADD B Add [B] with [A] 410D DAA Adjust Accumulator value for Decimal digits 410E JC LOOP Jump on carry to loop 410F
86

4110 4111 4112 LOOP

INR INX

D H

4113

MOV

M,A

4114

INX

4115

MOV

M, D

4116

HLT

Increment D reg. Increment HL register pair Move the Acc.content to the memory location Increment HL reg. to point next mem. Location. Transfer D register content to memory. Stop the program

OBSERVATION:

INPUT OUTPUT 4500 4502 4501 4503 10. 2 X 2 MATRIX MULTIPLICATION

AIM:

87

To perform the 2 x 2 matrix multiplication. ALGORITHM: 1. Load the 2 input matrices in the separate address and initialize the HL and the DE register pair with the starting address respectively. 2. Call a subroutine for performing the multiplication of one element of a matrix with the other element of the other matrix. 3. Call a subroutine to store the resultant values in a separate matrix. RESULT: Thus the 2 x 2 matrix multiplication is performed and the result is stored at 4700,4701 , 4702 & 4703.

88

FLOW CHART:
START C HL 00H 8500H

HL DE

HL+1 DE+1; DE

DE+1

DE

8600H

Call subroutine MUL

Call subroutine MUL

A+B

Call subroutine STORE

HL DE

HL+1 DE+1; DE Call subroutine MUL

DE+1

Is A=04H? A A+B Increment HL reg. pair STOP

Call subroutine STORE

YES

HL DE

HL-1 DE-1;

NO

Call subroutine MUL

A 89

MUL

STORE

[A] D H H

[[DE]] A M [A] H- 1

87

[[BC]]

C Is H=0 ? RET

C+ 1

[D]

[D]+1

YES
Call subroutine MUL

H- 1

NO

Is H=0 ?

[H]

85; [D]

86

90
RET

NO

YES

PROGRAM: ADDRE OPC SS ODE 8100 8101 8102 8103 8104 LAB EL MNE OPER MON AND ICS MVI C, 00 LXI COMMENT

Clear C reg.

H, 8500 Initialize HL reg. to 4500

91

8105 8106 8107 8108 8109 810A 810B 810C 810D 810E 810F 8110 8111 8112 8113 8114 8115 8116 8117 8118 8119 811A 811B 811C 811D 811E 811F 8120 8121 8122 8123

LOOP 2

LXI

D, 8600 Load DE register pair

CALL

MUL

Call subroutine MUL

MOV INX INX INX CALL

B,A H D D MUL

Move A to B reg. Increment HL register pair . Increment DE register pair Increment DE register pair Call subroutine MUL

ADD B Add [B] with [A] CALL STORE Call subroutine STORE

DCX DCX CALL

H D MUL

Decrement HL register pair Decrement DE register pair Call subroutine MUL

MOV INX INX INX CALL

B,A H D D MUL

Transfer A reg content to B reg. Increment HL register pair Increment DE register pair Increment DE register pair Call subroutine MUL

ADD B Add A with B CALL STORE Call subroutine MUL

8124 8125 8126 8127 8128 8129 812A 812B 812C 812D 812E 812F 8130 8131

MOV CPI

JZ

Transfer C register content to Acc. Compare with 04 to check 04 whether all elements are multiplied. LOOP1 If completed, go to loop1

A,C

INX JMP

H Increment HL register Pair. LOOP2 Jump to LOOP2.

LOOP 1 MUL

HLT LDA X D

Stop the program.

8132 8133 8134 8135 8136 8137 8138 8139 813A 813B 813C

Load acc from the memory location pointed by DE pair. MOV D,A Transfer acc content to D register. MOV H,M Transfer from memory to H register. DCR H Decrement H register. JZ LOOP3 If H is zero go to LOOP3.

LOOP 4

ADD DCR JNZ

Add Acc with D reg

H Decrement H register. LOOP4 If H is not zero go to LOOP4.

93

813D 813E 813F 8140 8141 8142 8143 8144

LOOP 3

MVI

H,85

Transfer 85 TO H register.

MVI RET MVI

D,86

Transfer 86 to D register. Return to main program. Transfer 87 to B register.

STOR E

B,87

STAX

8145 8146

INR RET

Load A from memory location pointed by BC pair. Increment C register. Return to main program.

OBSERVATION: INPUT 4600 4601 4602 4603 OUTPUT 4700 4701 4702 4703

4500 4501 4502 4503

11. BIOS/DOS CALLS DISPLAY AIM: To display a message on the CRT screen of a microcomputer using DOS calls.

94

ALGORITHM: 1. Initialize the data segment and the message to be displayed. 2. Set function value for display. 3. Point to the message and run the interrupt to display the message in the CRT.

PROGRAM:

ASSUME CS: CODE, DS: DATA DATA SEGMENT MSG DB 0DH, 0AH, GOOD MORNING , ODH, OAH, $ DATA ENDS CODE SEGMENT START: MOV AX, DATA

MOV DS, AX MOV AH, 09H MOV DX, OFFSET MSG INT 21H MOV AH, 4CH INT 21H CODE ENDS END START

95

RESULT: A message is displayed on the CRT screen of a microcomputer using DOS calls

96

12. BIOS/DOS CALLS FILE MANIPULATION AIM: To open a file using DOS calls. ALGORITHM: 1. Initialize the data segment, file name and the message to be displayed. 2. Set the file attribute to create a file using a DOS call. 3. If the file is unable t o create a file display the message PROGRAM: ASSUME CS: CODE, DS: DATA DATA SEGMENT FILENAME DB SAMPLE.DAT, $ MSG DB 0DH, 0AH, FILE NOT CREATED, ODH, OAH, $ DATA ENDS CODE SEGMENT START: MOV AX, DATA MOV DS, AX MOV DX, OFFSET FILENAME MOV CX, 00H MOV AH, 3CH INT 21H JNC LOOP1 MOV AX, DATA MOV DS, AX
97

MOV DX, OFFSET MSG MOV AH, 09H INT 21H LOOP1 MOV AH, 4CH INT 21H CODE ENDS END START RESULT: A file is opened using DOS calls.

98

13. BIOS/DOS CALLS DISK INFORMATION AIM: To display the disk information.

ALGORITHM: 1. Initialize the data segment and the message to be displayed. 2. Set function value for disk information. 3. Point to the message and run the interrupt to display the message in the CRT.

PROGRAM:

ASSUME CS: CODE, DS: DATA DATA SEGMENT MSG DB 0DH, 0AH, GOOD MORNING , ODH, OAH, $ DATA ENDS CODE SEGMENT START: MOV AX, DATA

MOV DS, AX MOV AH, 36H MOV DX, OFFSET MSG INT 21H MOV AH, 4CH
99

INT 21H CODE ENDS END START

RESULT: The disk information is displayed.

1.8086 STRING MANIPULATION SEARCH A WORD

AIM: To search a word from a string.

ALGORITHM: 1. Load the source and destination index register with starting and the ending address respectively. 2. Initialize the counter with the total number of words to be copied. 3. Clear the direction flag for auto incrementing mode of transfer. 4. Use the string manipulation instruction SCASW with the prefix REP to search a word from string.

100

5. If a match is found (z=1), display 01 in destination address. Otherwise, display 00 in destination address. RESULT: A word is searched and the count of number of appearances is displayed.

PROGRAM:

101

ASSUME CS: CODE, DS: DATA DATA SEGMENT LIST DW 53H, 15H, 19H, 02H DEST EQU 3000H COUNT EQU 05H DATA ENDS CODE SEGMENT START: MOV AX, DATA MOV DS, AX MOV AX, 15H MOV SI, OFFSET LIST MOV DI, DEST MOV CX, COUNT MOV AX, 00 CLD REP SCASW JZ LOOP MOV AX, 01 LOOP MOV [DI], AX MOV AH, 4CH INT 21H CODE ENDS END START

102

INPUT: LIST: 53H, 15H, 19H, 02H

OUTPUT: 3000 01

103

2.8086 STRING MANIPULATION FIND AND REPLACE A WORD

AIM: To find and replace a word from a string.

ALGORITHM: 1. Load the source and destination index register with starting and the ending address respectively. 2. Initialize the counter with the total number of words to be copied. 3. Clear the direction flag for auto incrementing mode of transfer. 4. Use the string manipulation instruction SCASW with the prefix REP to search a word from string. 5. If a match is found (z=1), replace the old word with the current word in destination address. Otherwise, stop.

RESULT: A word is found and replaced from a string.

104

PROGRAM: ASSUME CS: CODE, DS: DATA DATA SEGMENT LIST DW 53H, 15H, 19H, 02H REPLACE EQU 30H COUNT EQU 05H DATA ENDS

105

CODE SEGMENT START: MOV AX, DATA MOV DS, AX MOV AX, 15H MOV SI, OFFSET LIST MOV CX, COUNT MOV AX, 00 CLD REP SCASW JNZ LOOP MOV DI, LABEL LIST MOV [DI], REPLACE LOOP MOV AH, 4CH INT 21H CODE ENDS END START

INPUT: LIST: 53H, 15H, 19H, 02H

OUTPUT: LIST: 53H, 30H, 19H, 02H

106

3. 8086 STRING MANIPULATION COPY A STRING

AIM: To copy a string of data words from one location to the other.

ALGORITHM: 6. Load the source and destination index register with starting and the ending address respectively. 7. Initialize the counter with the total number of words to be copied. 8. Clear the direction flag for auto incrementing mode of transfer. 9. Use the string manipulation instruction MOVSW with the prefix REP to copy a string from source to destination. RESULT: A string of data words is copied from one location to other.

107

PROGRAM: ASSUME CS: CODE, DS: DATA DATA SEGMENT SOURCE EQU 2000H DEST EQU 3000H COUNT EQU 05H DATA ENDS CODE SEGMENT

108

START:

MOV AX, DATA MOV DS, AX MOV ES, AX MOV SI, SOURCE MOV DI, DEST MOV CX, COUNT CLD

REP MOVSW MOV AH, 4CH INT 21H CODE ENDS END START

INPUT: 2000 2001 84 2002 2003 90 2004 21 67 48

OUTPUT: 3000 48 3001 84 3002 67 3003 90 3004 21

109

4.8086 STRING MANIPULATION SORTING

AIM: To sort a group of data bytes.

ALGORITHM: Place all the elements of an array named list (in the consecutive memory locations). Initialize two counters DX & CX with the total number of elements in the array. Do the following steps until the counter B reaches 0. o Load the first element in the accumulator o Do the following steps until the counter C reaches 0. 1. Compare the accumulator content with the next element present in the next memory location. If the accumulator content is smaller go to next step; otherwise, swap the content of accumulator with the content of memory location. 2. Increment the memory pointer to point to the next element. 3. Decrement the counter C by 1. Stop the execution. RESULT:

110

A group of data bytes are arranged in ascending order.

PROGRAM: ASSUME CS: CODE, DS: DATA DATA SEGMENT LIST DW 53H, 25H, 19H, 02H COUNT EQU 04H DATA ENDS CODE SEGMENT START: MOV AX, DATA MOV DS, AX

111

MOV DX, COUNT-1 LOOP2: MOV CX, DX MOV SI, OFFSET LIST AGAIN: MOV AX, [SI] CMP AX, [SI+2] JC LOOP1 XCHG [SI +2], AX XCHG [SI], AX LOOP1: ADD SI, 02 LOOP AGAIN DEC DX JNZ LOOP2 MOV AH, 4CH INT 21H CODE ENDS END START

INPUT: LIST: 53H, 25H, 19H, 02H

OUTPUT: LIST: 02H, 19H, 25H, 53H

112

4. INTERFACING 8255 WITH 8085 AIM: To interface programmable peripheral interface 8255 with 8085 and study its characteristics in mode0,mode1 and BSR mode. APPARATUS REQUIRED: 8085 p kit, 8255Interface board, DC regulated power supply, VXT parallel bus I/O MODES: Control Word:

113

MODE 0 SIMPLE I/O MODE: This mode provides simple I/O operations for each of the three ports and is suitable for synchronous data transfer. In this mode all the ports can be configured either as input or output port. Let us initialize port A as input port and port B as output port

PROGRAM: ADDRE OPCOD LAB MNEMON OPERA SS ES EL ICS ND 4100 STAR MVI A, 90 T: 4101 COMME NTS Initialize port A as Input and Port B as output. Send Mode Control word Read from Port A Display the data in port B Store the data read from Port A in 4200 Stop the program.
114

4102 4103 4104 4105 4106 4107 4108 4109 410A 410B

OUT

C6

IN OUT

C0 C2

STA

4200

HLT

MODE1 STROBED I/O MODE: In this mode, port A and port B are used as data ports and port C is used as control signals for strobed I/O data transfer. Let us initialize port A as input port in mode1 MAIN PROGRAM: ADDRE OPCOD LAB MNEMON OPERA SS ES EL ICS ND 4100 STAR MVI A, B4 T: 4101 4102 4103 4104 OUT C6 COMME NTS Initialize port A as Input port in mode 1. Send Mode Control word Set the PC4 bit for INTE A Display the data in port B

MVI

A,09

4105 4106

OUT

C6

4107 4108 4109 410A 410B EI MVI SIM EI HLT A,08 Enable RST5.5

Stop the program.

ISR (Interrupt Service Routine)

115

ADDRE OPCOD LAB SS ES EL 4200 STAR T: 4201 4202 4203 4204 4205

MNEMON OPERA ICS ND IN C0

COMME NTS Read from port A Store in 4500. Stop the program.

STA

4500

HLT

Sub program: ADDRE OPCOD LAB SS ES EL 405E 405F 4060 MNEMON OPERA ICS ND JMP 4200 COMME NTS Go to 4200

BSR MODE (Bit Set Reset mode)

116

Any lines of port c can be set or reset individually without affecting other lines using this mode. Let us set PC0 and PC3 bits using this mode. PROGRAM: ADDRE OPCOD LAB SS ES EL 4100 STAR T: 4101 4102 4103 4104 4105 4106 MNEMON OPERA ICS ND MVI A, 01 COMME NTS Set PC0

OUT

C6

MVI OUT

A,07 C6

Send Mode Control word Set PC3 Send Mode

4107 4109 HLT

Control word Stop the program.

RESULT: Thus 8255 is interfaced and its characteristics in mode0,mode1 and BSR mode is studied.

6. INTERFACING 8253 TIMER WITH 8085 Interfacing 8253 Programmable Interval Timer with 8085 p AIM: To interface 8253 Interface board to 8085 p and verify the operation of 8253in six different modes.

APPARATUS REQUIRED: 8085 p kit, 8253 Interface board, DC regulated power supply, VXT parallel bus, CRO.

118

Mode 0 Interrupt on terminal count: The output will be initially low after mode set operations. After loading the counter, the output will be remaining low while counting and on terminal count; the output will become high, until reloaded again.

Let us set the channel 0 in mode 0. Connect the CLK 0 to the debounce circuit by changing the jumper J3 and then execute the following program. Program: Addres Opcode s s 4100 4102

Label

Mnemoni c START MVI : OUT

Operand s A, 30 CE

4104 4106

MVI OUT

A, 05 C8

4108 410A

MVI OUT

A, 00 C8

Comment s Channel 0 in mode 0 Send Mode Control word LSB of count Write count to register MSB of count Write count to register
119

410C

HLT

It is observed in CRO that the output of Channel 0 is initially LOW. After giving six clock pulses, the output goes HIGH. Mode 1 Programmable ONE-SHOT: After loading the counter, the output will remain low following the rising edge of the gate input. The output will go high on the terminal count. It is retriggerable; hence the output will remain low for the full count, after any rising edge of the gate input. Example: The following program initializes channel 0 of 8253 in Mode 1 and also initiates triggering of Gate 0. OUT 0 goes low, as clock pulse after triggering the goes back to high level after 5 clock pulses. Execute the program, give clock pulses through the debounce logic and verify using CRO. Addres s 4100 4102 Opcode s Label Mnemoni c START MVI : OUT Operand s A, 32 CE Comment s Channel 0 in mode 1 Send Mode Control word LSB of count Write count to register MSB of count

4104 4106

MVI OUT

A, 05 C8

4108

MVI

A, 00

120

410A

OUT

C8

410C 4100

OUT HLT

D0

Write count to register Trigger Gate0

Mode 2 Rate Generator: It is a simple divide by N counter. The output will be low for one period of the input clock. The period from one output pulse to the next equals the number of input counts in the count register. If the count register is reloaded between output pulses the present period will not be affected but the subsequent period will reflect the new value.

Example: Using Mode 2, Let us divide the clock present at Channel 1 by 10. Connect the CLK1 to PCLK. Addres s 4100 4102 Opcode s 3E 74 D3 CE Label Mnemoni c START MVI : OUT Operand s A, 74 CE Comment s Channel 1 in mode 2 Send Mode Control word
121

4104 4106

3E 0A D3 CA

MVI OUT

A, 0A CA

4108 410A

3E 00 D3 CA

MVI OUT

A, 00 CA

LSB of count Write count to register MSB of count Write count to register

410C 76 HLT In CRO observe simultaneously the input clock to channel 1 and the output at Out1. Mode 3 Square wave generator: It is similar to Mode 2 except that the output will remain high until one half of count and go low for the other half for even number count. If the count is odd, the output will be high for (count + 1)/2 counts. This mode is used of generating Baud rate for 8251A (USART).

Example: We utilize Mode 0 to generate a square wave of frequency 150 KHz at channel 0. Addres Opcode Label Mnemoni Operand Comment s s c s s 4100 3E 36 START MVI A, 36 Channel 0 : in mode 3 4102 D3 CE OUT CE Send
122

4104 4106

3E 0A D3 C8

MVI OUT

A, 0A C8

4108 410A

3E 00 D3 C8

MVI OUT

A, 00 C8

Mode Control word LSB of count Write count to register MSB of count Write count to register

410C 76 HLT Set the jumper, so that the clock 0 of 8253 is given a square wave of frequency 1.5 MHz. This program divides this PCLK by 10 and thus the output at channel 0 is 150 KHz. Vary the frequency by varying the count. Here the maximum count is FFFF H. So, the square wave will remain high for 7FFF H counts and remain low for 7FFF H counts. Thus with the input clock frequency of 1.5 MHz, which corresponds to a period of 0.067 microseconds, the resulting square wave has an ON time of 0.02184 microseconds and an OFF time of 0.02184 microseconds. To increase the time period of square wave, set the jumpers such that CLK2 of 8253 is connected to OUT 0. Using the abovementioned program, output a square wave of frequency 150 KHz at channel 0. Now this is the clock to channel 2. Mode 4: Software Triggered Strobe: The output is high after mode is set and also during counting. On terminal count, the output will go low for one clock period and becomes high again. This mode can be used for interrupt generation.
123

The following program initializes channel 2 of 8253 in mode 4. Example: Connect OUT 0 to CLK 2 (jumper J1). Execute the program and observe the output OUT 2. Counter 2 will generate a pulse after 1 second. Addres s 4100 4102 Opcode s Label Mnemoni c START MVI : OUT Operand s A, 36 CE Comment s Channel 0 in mode 0 Send Mode Control word LSB of count Write count to register MSB of count Write count to register Channel 2 in Mode 4 Send Mode control Word LSB of Count

4104 4106

MVI OUT

A, 0A C8

4108 410A

MVI OUT

A, 00 C8

410C 410E

MVI OUT

A, B8 CE

4110

MVI

A, 98

124

4112

OUT

CC

4114 4116

MVI OUT

A, 3A CC

Write Count to register MSB of Count Write Count to register

4118

HLT

Mode 5 Hardware triggered strobe: Counter starts counting after rising edge of trigger input and output goes low for one clock period when terminal count is reached. The counter is retriggerable. Example: The program that follows initializes channel 0 in mode 5 and also triggers Gate 0. Connect CLK 0 to debounce circuit. Execute the program. After giving Six clock pulses, you can see using CRO, the initially HIGH output goes LOW. The output ( OUT 0 pin) goes high on the next clock pulse.

Addres s 4100 4102

Opcode s

Label

Mnemoni c START MVI : OUT

Operand s A, 1A CE

4104

MVI

A, 05

Comment s Channel 0 in mode 5 Send Mode Control word LSB of count

125

4106

OUT

C8

4108 410A 410C

MVI OUT HLT

A, 00 D0

Write count to register MSB of count Trigger Gate 0

Result: Thus the 8253 has been interfaced to 8085 p and six different modes of 8253 have been studied.

7. INTERFACING 8279 WITH 8085 8. INTERFACING 8251 WITH 8085

126

9. 8051 - SUM OF ELEMENTS IN AN ARRAY AIM: To find the sum of elements in an array.

ALGORITHM: 1. Load the array in the consecutive memory location and initialize the memory pointer with the starting address.

127

2.

Load the total number of elements in a separate register as a counter.

3. 4.

Clear the accumulator. Load the other register with the value of the memory pointer.

5. 6.

Add the register with the accumulator. Check for carry, if exist, increment the carry register by 1. otherwise, continue

7.

Decrement the counter and if it reaches 0, stop. Otherwise increment the memory pointer by 1 and go to step 4.

RESULT: The sum of elements in an array is calculated.

128

PROGRAM: MOV DPTR, #4200 MOVX A, @DPTR MOV R0, A MOV B, #00 MOV R1, B INC DPTR LOOP2: CLR C MOVX A, @DPTR ADD A, B MOV B, A JNC LOOP INC R1 LOOP: INC DPTR DJNZ R0, LOOP2 MOV DPTR, #4500 MOV A, R1

129

MOVX @DPTR, A INC DPTR MOV A, B MOVX @DPTR, A HLT: SJMP HLT

INPUT 4200 4201 4201 4202 4203 04 05 06 03 02

OUTPUT: 4500 0F 4501 00

130

10(A).8051 - HEXADECIMAL TO DECIMAL CONVERSION AIM: To perform hexadecimal to decimal conversion.

ALGORITHM: 1. Load the number to be converted into the accumulator. 2. If the number is less than 100 (64H), go to next step; otherwise, subtract 100 (64H) repeatedly until the remainder is less than 100 (64H). Have the count(100s value) in separate register which is the carry. 3. If the number is less than 10 (0AH), go to next step; otherwise, subtract 10 (0AH) repeatedly until the remainder is less than 10 (0AH). Have the count(tens value) in separate register. 4. The accumulator now has the units. 5. Multiply the tens value by 10 and add it with the units. 6. Store the result and carry in the specified memory location.

RESULT The given hexadecimal number is converted into decimal number.

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PROGRAM:

MOV DPTR, #4500 MOVX A, @DPTR MOV B, #64 DIV A, B MOV DPTR, #4501 MOVX @DPTR, A

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MOV A, B MOV B, #0A DIV A, B INC DPTR MOVX @DPTR, A INC DPTR MOV A, B MOVX @DPTR, A HLT: SJMP HLT

INPUT 4500 D7

OUTPUT: 4501 15 4502 02

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10(B).8051 - DECIMAL TO HEXADECIMAL CONVERSION AIM: To perform decimal to hexadecimal conversion

ALGORITHM: 1. Load the number to be converted in the accumulator. 2. Separate the higher order digit from lower order. 3. Multiply the higher order digit by 10 and add it with the lower order digit. 4. Store the result in the specified memory location.

RESULT: The given decimal number is converted to hexadecimal number. PROGRAM: MOV DPTR, #4500 MOVX A, @DPTR MOV B, #0A MUL A, B MOV B, A INC DPTR MOVX A, @DPTR ADD A, B

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INC DPTR MOVX @DPTR, A HLT: SJMP HLT

INPUT 4500 23

OUTPUT 4501 17

13. STEPPER MOTOR INTERFACING WITH 8051 AIM: To interface a stepper motor with 8051 microcontroller and operate it.

THEORY: A motor in which the rotor is able to assume only discrete stationary angular position is a stepper motor. The rotary motion occurs in a step-wise manner from one equilibrium position to the next. Stepper Motors are used very wisely in position control systems like printers, disk drives, process control machine tools, etc.
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The basic two-phase stepper motor consists of two pairs of stator poles. Each of the four poles has its own winding. The excitation of any one winding generates a North Pole. A South Pole gets induced at the diametrically opposite side. The rotor magnetic system has two end faces. It is a permanent magnet with one face as South Pole and the other as North Pole. The Stepper Motor windings A1, A2, B1, B2 are cyclically excited with a DC current to run the motor in clockwise direction. By reversing the phase sequence as A1, B2, A2, B1, anticlockwise stepping can be obtained. 2-PHASE SWITCHING SCHEME: In this scheme, any two adjacent stator windings are energized. The switching scheme is shown in the table given below. This scheme produces more torque. ANTICLOCKWISE STE A A2 B B2 P 1 1 1 1 0 0 1 2 0 1 0 1 3 0 1 1 0 4 1 0 1 0 CLOCKWISE DAT STE A A B A P 1 2 1 9h 1 1 0 1 5h 2 0 1 1 6h 3 0 1 0 Ah 4 1 0 0

B2 0 0 1 1

DAT A Ah 6h 5h 9h

ADDRESS DECODING LOGIC: The 74138 chip is used for generating the address decoding logic to generate the device select pulses, CS1 & CS2 for selecting the IC 74175.The 74175 latches the data bus to the stepper motor driving circuitry. Stepper Motor requires logic signals of relatively high power. Therefore, the interface circuitry that generates the driving pulses use silicon darlington pair transistors. The inputs for the interface circuit are TTL pulses generated under software control using the Microcontroller Kit. The TTL levels of pulse sequence from the
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data bus is translated to high voltage output pulses using a buffer 7407 with open collector.

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PROGRAM : Addr ess 4100 OPCOD Label ES ORG STAR MOV T: 4100h DPTR, #TABLE Load the start address of switching scheme data TABLE into Data Pointer (DPTR) Load the count in R0 Load the number in TABLE into A Push DPTR value to Stack Load the Motor port address into DPTR Send the value in A to stepper Motor port address Delay loop to cause a specific amount of time delay before next data item is sent to the Motor POP back
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Comments

4103 4105

MOV LOOP MOV : X

R0, #04 A, @DPTR

4106 4108 410A

PUSH DPH PUSH DPL MOV DPTR, #0FFC0h MOV X @DPTR, A

410D

410E 4110 4112 4114 4116

MOV DELA MOV Y: DELA DJNZ Y1: DJNZ POP

R4, #0FFh R5, #0FFh R5, DELAY1 R4, DELAY DPL

4118 411A

POP INC

DPH DPTR

411B

DJNZ R0, LOOP

411D

SJMP START

411F

TABL DB E:

09 05 06 0Ah

DPTR value from Stack Increment DPTR to point to next item in the table Decrement R0, if not zero repeat the loop Short jump to Start of the program to make the motor rotate continuously Values as per two-phase switching scheme

PROCEDURE: Enter the above program starting from location 4100.and execute the same. The stepper motor rotates. Varying the count at R4 and R5 can vary the speed. Entering the data in the look-up TABLE in the reverse order can vary direction of rotation. RESULT: Thus a stepper motor was interfaced with 8051 and run in forward and reverse directions at various speeds.

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