PIC Microcontroller Low Power Tips N Tricks Chapter 2 UTIL
PIC Microcontroller Low Power Tips N Tricks Chapter 2 UTIL
CHAPTER 2
PIC® Microcontroller Low Power
Tips ‘n Tricks
0.1 µF
U1
VDD
100k
R2
R4
10k
10k
R5
MCLR
RA0 RB0/INT
U2
R3
RA1 RB1 VCC A0
C1
R1 OSC2/CLKOUT RB7
C3
33 pF
C5
C4
PIC16F819
The system shown above is very simple In Figure 1-2, I/O pins are used to power the
and clearly has all the parts identified in the EEPROM and the sensor. Many PIC MCU
requirements. Unfortunately, it has a few devices can source up to 20 mA of current
problems in that the EEPROM, the sensor, and from each I/O, so there is no need to provide
its bias circuit, are energized all the time. To additional components to switch the power.
get the minimum current draw for this design, If more current than can be sourced by the PIC
it would be advantageous to shutdown these MCU is required, the PIC MCU can instead
circuits when they are not required. enable and disable a MOSFET to power
Figure: 1-2 the circuit. Refer to the data sheet for drive
capabilities for a specific device.
C2
0.1 µF
U1
VDD
100k
R5
R4
10k
R2
10k
MCLR
RA0 RB0/INT
U2
R3
RA1 RB1 VCC A0
1k RA2 RB2 WP A1
3.3V
0.1 µF
C1
R1 OSC2/CLKOUT RB7
C3
C5
C4
PIC16F819
Average Current
= 8.61e-3 mA*Sec
2000e-3 Sec
= 0.0043 mA
TIP #7 Battery Backup for PIC MCUs Dynamic Operation Tips n’ Tricks
For an application that can operate from either The following tips and tricks apply to methods
an external supply or a battery backup, it is of improving the dynamic operating current
necessary to be able to switch from one to consumption of an application. This allows
the other without user intervention. This can an application to get processing done quicker
be accomplished with battery backup ICs, but which enables it to sleep more and will help
it is also possible to implement with a simple reduce the current consumed while processing.
diode OR circuit, shown in Figure 7-1. Diode D1
prevents current from flowing into the battery TIP #8 Enhanced PIC16 Mid-Range
from VEXT when the external power is sup- Core
plied. D2 prevents current from flowing into any The Enhanced PIC16 mid-range core has a few
external components from the battery if VEXT features to assist in low power. New instructions
is removed. As long as the external source is allow many applications to execute in less
present and higher voltage than the battery, time. This allows the application to spend more
no current from the battery will be used. When time asleep and less time processing and
VEXT is removed and the voltage drops below can provide considerable power savings. It is
VBAT, the battery will start powering the MCU. important not to overlook these new instructions
Low forward voltage Schottky diodes can be when designing with devices that contain the
used in order to minimize the voltage dropout new core. The Timer1 oscillator and WDT have
from the diodes. Additionally, inputs can be ref- also been improved, now meeting nanoWatt
erenced to VEXT and VBAT in order to monitor XLP requirements and drawing much less
the voltage levels of the battery and the exter- current than in previous devices.
nal supply. This allows the micro to enter lower
power modes when the supply is removed or
the battery is running low. In order to avoid
glitches on Vdd caused by the diode turn-on
delay when switching supplies, ensure enough
decoupling capacitance is used on Vdd (C1).
Figure 7-1:
TIP #12 Internal Oscillator Calibration TIP #13 Idle and Doze Modes
An internal RC oscillator calibrated from the nanoWatt and nanoWatt XLP devices have
factory may require further calibration as the an Idle mode where the clock to the CPU is
temperature or Vdd change. Timer1/SOSC can disconnected and only the peripherals are
be used to calibrate the internal oscillator by clocked. In PIC16 and PIC18 devices, Idle
connecting a 32.768 kHz clock crystal. Refer mode can be entered by setting the Idle bit in
to AN244, “Internal RC Oscillator Calibration” the OSCON register to ‘1’ and executing the
for the complete application details. Calibrating SLEEP instruction. In PIC24, dsPIC® DSCs,
the internal oscillator can help save power by and PIC32 devices, Idle mode can be entered
allowing for use of the internal RC oscillator by executing the instruction “PWRSAV #1”. Idle
in applications which normally require higher mode is best used whenever the CPU needs to
accuracy crystals wait for an event from a peripheral that cannot
operate in Sleep mode. Idle mode can reduce
Figure 12-1: Timer1 Used to Calibrate an power consumption by as much as 96% in
Internal Oscillator many devices.
PIC16F818/819 Doze mode is another low power mode
available in PIC24, dsPIC DSCs, and PIC32
C1
33 pF devices. In Doze mode, the system clock to
T1OSI the CPU is postscaled so that the CPU runs at
a lower speed than the peripherals. If the CPU
XTAL is not tasked heavily and peripherals need to
32.768 kHz
run at high speed, then Doze mode can be
T1OSO used to scale down the CPU clock to a slower
C2 frequency. The CPU clock can be scaled down
33 pF from 1:1 to 1:128. Doze mode is best used in
similar situations to Idle mode, when peripheral
The calibration is based on the measured operation is critical, but the CPU only requires
frequency of the internal RC oscillator. For minimal functionality.
example, if the frequency selected is 4 MHz,
we know that the instruction time is 1 µs
(Fosc/4) and Timer1 has a period of 30.5 µs
(1/32.768 kHz). This means within one Timer1
period, the core can execute 30.5 instructions.
If the Timer1 registers are preloaded with a
known value, we can calculate the number of
instructions that will be executed upon a Timer1
overflow.
This calculated number is then compared
against the number of instructions executed by
the core. With the result, we can determine if
re-calibration is necessary, and if the frequency
must be increased or decreased. Tuning uses
the OSCTUNE register, which has a ±12%
tuning range in 0.8% steps.
TIP #14 Use NOP and Idle Mode TIP #15 Peripheral Module Disable
When waiting on a blocking loop (e.g. waiting (PMD) Bits
for an interrupt), instead put the device into PIC24, dsPIC DSCs, and PIC32 devices
Idle mode to disable the CPU. The peripheral have PMD bits that can be used to disable
interrupt will wake up the device. Idle mode peripherals that will not be used in the
consumes much less current than constantly application. Setting these bits disconnects
reading RAM and jumping back. If the CPU all power to the module as well as SFRs for
cannot be disabled because the loop required the module. Because power is completely
some calculations, such as incrementing a removed, the PMD bits offer additional power
counter, instead of doing a very tight loop savings over disabling the module by turning
that loops many times, add NOPs into the off the module’s enable bit. These bits can be
loop. See the code example below. A NOP dynamically changed so that modules which are
requires less current to execute than reading only used periodically can be disabled for the
RAM or branching operations, so current can remainder of the application. The PMD bits are
be reduced. The overall loop count can be most effective at high clock speeds and when
adjusted to account for the extra instructions for operating at full speed allowing the average
the NOPs. power consumption to be significantly reduced.
Example:
Replace:
while(!_T1IF);
with Idle mode:
IEC0bits.T1IE = 1;
Idle();
and replace:
while(!_T1IF){
i++;
}
with extra NOP instructions:
while(!_T1IF){
i++;
Nop();
Nop();
Nop();
Nop();
Nop();
Static Power Reduction Tips n’ Tricks TIP #17 Extended WDT and Deep
The following tips and tricks will help reduce Sleep WDT
the power consumption of a device while it is A commonly used source to wake-up from
asleep. These tips allow an application to stay Sleep or Deep Sleep is the Watchdog Timer
asleep longer and to consume less current (WDT) or Deep Sleep Watchdog Timer
while sleeping. (DSWDT). The longer the PIC MCU stays
TIP #16 Deep Sleep Mode in Sleep or Deep Sleep, the less power
consumed. Therefore, it is appropriate to use
In Deep Sleep mode, the CPU and all as long a timeout period for the WDT as the
peripherals except RTCC, DSWDT and application will allow.
LCD (on LCD devices) are not powered.
Additionally, Deep Sleep powers down the The WDT runs in all modes except for Deep
Flash, SRAM, and voltage supervisory circuits. Sleep. In Deep Sleep, the DSWDT is used
This allows Deep Sleep mode to have lower instead. The DSWDT uses less current and
power consumption than any other operating has a longer timeout period than the WDT. The
mode. Typical Deep Sleep current is less than timeout period for the WDT varies by device,
50 nA on most devices. Four bytes of data are but typically can vary from a few milliseconds to
retained in the DSGPRx registers that can be up to 2 minutes. The DSWDT time-out period
used to save some critical data required for the can be programmed from 2.1ms to 25.7days
application. While in Deep Sleep mode, the TIP #18 Low Power Timer1 Oscillator
states of I/O pins and 32 kHz crystal oscillator
(Timer1/SOSC) are maintained so that Deep and RTCC
Sleep mode does not interrupt the operation of nanoWatt XLP microcontrollers all have a
the application. The RTCC interrupt, Ultra Low robust Timer1 oscillator (SOSC on PIC24)
Power Wake-up, DSWDT time-out, External which draws less than 800 nA. nanoWatt
Interrupt 0 (INT0), MCLR or POR can wake-up technology devices offer a low power Timer1
the device from Deep Sleep. Upon wake-up the oscillator which draws 2-3 uA. Some devices
device resumes operation at the reset vector. offer a selectable oscillator which can be used
in either a low-power or high-drive strength
Deep Sleep allows for the lowest possible
mode to suit both low power or higher noise
static power in a device. The trade-off is that
applications. The Timer1 counter and oscillator
the firmware must re-initialize after wake-
can be used to generate interrupts for periodic
up. Therefore, Deep Sleep is best used in
wakes from Sleep and other power managed
applications that require long battery life and
modes, and can be used as the basis for a real-
have long sleep times. Refer to the device
time clock. Timer1/SOSC wake-up options vary
datasheets and Family Reference Manuals for
by device. Many nanoWatt XLP devices have a
more information on Deep Sleep and how it is
built-in hardware Real-Time Clock and Calendar
used.
(RTCC), which can be configured for wake-up
periods from 1 second to many years.
Some nanoWatt devices and all nanoWatt
XLP devices can also use the Timer1/SOSC
oscillator as the system clock source in place
of the main oscillator on the OSC1/OSC2 pins.
By reducing execution speed, total current
consumption can be reduced.
TIP #19 Low Power Timer1 Oscillator TIP #20 Use LVD to Detect Low
Layout Battery
Applications requiring very low power Timer1/ The Low Voltage Detect (LVD) interrupt present
SOSC oscillators on nanoWatt and nanoWatt in many PIC MCUs is critical in battery based
XLP devices must take PCB layout into systems. It is necessary for two reasons.
consideration. The very low power Timer1/ First, many devices cannot run full speed at
SOSC oscillators on nanoWatt and nanoWatt the minimum operating voltage. In this case,
XLP devices consume very little current, and the LVD interrupt indicates when the battery
this sometimes makes the oscillator circuit voltage is dropping so that the CPU clock can
sensitive to neighboring circuits. The oscillator be slowed down to an appropriate speed,
circuit (crystal and capacitors) should be located preventing code misexecution. Second, it allows
as close as possible to the microcontroller. the MCU to detect when the battery is nearing
No circuits should be passing through the the end of its life, so that a low battery indication
oscillator circuit boundaries. If it is unavoidable can be provided and a lower power state can
to have high-speed circuits near the oscillator be entered to maximize battery lifetime. The
circuit, a guard ring should be placed around the LVD allows these functions to be implemented
oscillator circuit and microcontroller pins similar without requiring the use of extra analog
to the figure below. Placing a ground plane channels to measure the battery level.
under the oscillator components also helps to TIP #21 Use Peripheral FIFO and
prevent interaction with high speed circuits.
DMA
Figure 19-1: Guard Ring Around Oscillator Some devices have peripherals with DMA or
Circuit and MCU Pins FIFO buffers. These features are not just useful
to improve performance; they can also be used
VSS to reduce power. Peripherals with just one
OSC1 buffer register require the CPU to stay operating
in order to read from the buffer so it doesn’t
OSC2
overflow. However, with a FIFO or DMA, the
CPU can go to sleep or idle until the FIFO fills or
RB7
DMA transfer completes. This allows the device
to consume a lot less average current over the
RB6 life of the application.
RB5
Pin Wake-on-Change
C I Interrupt
VREF