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Sequential Code in VHDL

Sequential code in VHDL allows for modeling of sequential logic and is executed using processes, functions, and procedures. It uses statements like IF, CASE, WAIT, and LOOP. Processes contain sequential code and are executed whenever signals in the sensitivity list change. Variables can only be used within processes while signals can be used globally. Different examples are provided to demonstrate the use of each sequential statement and how they can be combined to implement circuits like counters, registers, adders, and RAM.

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Ali Ahmad
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186 views

Sequential Code in VHDL

Sequential code in VHDL allows for modeling of sequential logic and is executed using processes, functions, and procedures. It uses statements like IF, CASE, WAIT, and LOOP. Processes contain sequential code and are executed whenever signals in the sensitivity list change. Variables can only be used within processes while signals can be used globally. Different examples are provided to demonstrate the use of each sequential statement and how they can be combined to implement circuits like counters, registers, adders, and RAM.

Uploaded by

Ali Ahmad
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PDF, TXT or read online on Scribd
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Sequential Code in VHDL

Muhammad Ali Raza Anjum

Introduction
VHDL is inherently CONCURRENT PROCESSES,FUNCTONS & PROCEDURES are the only sections of code that are executed sequentially Indeed we can model COMBINATIONAL circuits using sequential code Sequential code is also called behavioral code Statements discussed today are all sequential, that means, allowed only inside PROCESSES , FUNCTIONS or PROCEDURES They are : IF, WAIT, CASE & LOOP

Introduction
This week well concentrate on PROCESSES FUNCTIONS & PROCEDURES, although very similar, are intended for system-level design

Processes
A PROCESS is a sequential section of VHDL code. It is characterized by the presence of IF, WAIT, CASE, or LOOP, and by a sensitivity list A PROCESS must be installed in the main code, and is executed every time a signal in the sensitivity list changes VARIABLES are optional, if used, they must be declared in the declarative part of the PROCESS The use of a label is also optional, its purpose is to improve code readability.

Processes
Example: DFF with Asynchronous Reset #1

VARIABLES & SIGNALS


VHDL has two ways of passing non-static values around: by means of a SIGNAL or by means of a VARIABLE A SIGNAL can be declared in a PACKAGE, ENTITY or ARCHITECTURE A VARIABLE can only be declared inside a piece of sequential code (in a PROCESS, for example) Therefore, while the value of the former can be global, the latter is always local. The value of a VARIABLE can never be passed out of the PROCESS directly; if necessary, then it must be assigned to a SIGNAL

VARIABLES & SIGNALS


VARIABLES are restricted to be used inside a sequential code only That is, inside a FUNCTION, PROCESS or PROCEDURE Thus contrary to SIGNAL, a VARIABLE can never be GLOBAL Hence its value cannot be passed out directly On the other hand, the update of a VARIABLE is immediate For SIGNAL its new value is generally only guaranteed to be available after the conclusion of the present run of the PROCESS. Finally, assignment operator for a SIGNAL is <= while for a VARIABLE it is :=

IF Statement
As mentioned earlier, IF, WAIT, CASE, and LOOP are the statements intended for sequential code Therefore, they can only be used inside a PROCESS, FUNCTION or PROCEDURE Syntax
IF (x<y) THEN temp:="11111111"; ELSIF (x=y AND w='0') THEN temp:="11110000"; ELSE temp:=(OTHERS =>'0');

IF Statement
Example: One-digit Counter #1
The code below implements a progressive 1-digit decimal counter (0 - 9 - 0). A top-level diagram of the circuit is shown. It contains a single-bit input (clk) and a 4-bit output (digit). The IF statement is used in this example. A variable, temp, was employed

IF Statement

IF Statement
Example: Shift Register
The output bit (q) must be four positive clock edges behind the input bit (d). It also contains an asynchronous reset, which must force all flip-flop outputs to 0 when asserted. In this example, the IF statement is again employed.

IF Statement

WAIT Statement
The operation of WAIT is sometimes similar to that of IF. However, more than one form of WAIT is available Moreover, contrary to when IF, CASE, or LOOP are used, the PROCESS cannot have a sensitivity list when WAIT is employed. Its syntax (there are three forms of WAIT) is shown below:
WAIT UNTIL signal_condition; WAIT ON signal1 [, signal2, ... ]; WAIT FOR time;

WAIT Statement
The WAIT UNTIL statement accepts only one signal Since the PROCESS has no sensitivity list in this case, WAIT UNTIL must be the first statement in the PROCESS. Example: 8-bit register with synchronous reset.
\

WAIT Statement
WAIT ON, on the other hand, accepts multiple signals The PROCESS is put on hold until any of the signals listed changes Example: 8-bit register with asynchronous reset

WAIT Statement
Finally, WAIT FOR is intended for simulation only (waveform generation for test benches) Example: WAIT FOR 5ns

WAIT Statement
Example: DFF with Asynchronous Reset #2
The code below implements the same DFF, however, here WAIT ON is used instead of IF only

WAIT Statement
Example: One-digit Counter #2
The code below implements the same progressive 1-digit decimal counter, however, WAIT UNTIL was used instead of IF only

CASE Statement
CASE is another statement intended exclusively for sequential code (along with IF, LOOP, and WAIT) Example: CASE control IS
WHEN "00" => x<=a; y<=b; WHEN "01" => x<=b; y<=c; WHEN OTHERS => x<="0000"; y<="ZZZZ"; END CASE;

The CASE statement (sequential) is very similar to WHEN (combinational).

CASE Statement
All permutations must be tested, so the keyword OTHERS is often helpful Another important keyword is NULL (the counterpart of UNAFFECTED), which should be used when no action is to take place. CASE allows multiple assignments for each test condition (as shown in the example above), while WHEN allows only one

CASE Statement
Example: DFF with Asynchronous Reset #3
The code below implements the same DFF, however, here CASE was used instead of IF only

CASE Statement
Example: Two-digit Counter with SSD Output
The code below implements a progressive 2-digit decimal counter (0 ! 99 ! 0), with external asynchronous reset plus binary-coded decimal (BCD) to seven-segment display (SSD) conversion.

CASE Statement

CASE Statement

LOOP Statement
LOOP is useful when a piece of code must be instantiated several times Like IF, WAIT, and CASE, LOOP is intended exclusively for sequential code. so it too can only be used inside a PROCESS, FUNCTION, or PROCEDURE There are several ways of using LOOP, as shown in the .
FOR / LOOP WHILE / LOOP With EXIT With NEXT

LOOP Statement
Example of FOR / LOOP:
FOR i IN 0 TO 5 LOOP x(i) <= enable AND w(i+2); y(0, i) <= w(i); END LOOP;

Example of WHILE / LOOP:


WHILE (i < 10) LOOP WAIT UNTIL clk'EVENT AND clk='1'; (other statements) END LOOP;

LOOP Statement
Example with EXIT:
FOR i IN data'RANGE LOOP CASE data(i) IS WHEN '0' => count:=count+1; WHEN OTHERS => EXIT; END CASE; END LOOP; FOR i IN 0 TO 15 LOOP NEXT WHEN i=skip; -- jumps to next iteration (...) END LOOP;

Example with NEXT:

LOOP Statement
Example: Carry Ripple Adder
Figure shows an 8-bit unsigned carry ripple adder. The toplevel diagram shows the inputs and outputs of the circuit: a and b are the input vectors to be added, cin is the carry-in bit,s is the sum vector, and cout is the carry-out bit. The onelevel below-top diagram shows how the carry bits propagate (ripple).

LOOP Statement
Each section of the latter diagram is a full-adder unit. Thus its outputs can be computed by means of:

Two solutions are presented


Solution 1: Generic, with VECTORS Solution 2: non-generic, with INTEGERS

LOOP Statement

LOOP Statement

LOOP Statement
Example: Simple Barrel Shifter
In this case, the circuit must shift the input vector (of size 8).When actually shifted (shift = 1), the LSB bit must be filled with 0 (shown in the bottom left corner of the diagram). If shift = 0, then outp = inp; if shift = 1, then outp(0) = 0 and outp(i) = inp(i 1), for i 1 to 7

LOOP Statement

LOOP Statement
Example: Leading Zeros
The design below counts the number of leading zeros in a binary vector, starting from the left end. The solution illustrates the use of LOOP / EXIT. Recall that EXIT implies not a escape from the current iteration of the loop, but rather a definite exit from it (that is, even if i is still within the specified range, the LOOP statement will be considered as concluded). In this example, the loop will end as soon as a 1 is found in the data vector.

LOOP Statement

CASE versus IF
Example: The codes below implement the same physical multiplexer circuit. With IF:
IF (sel="00") THEN x<=a; ELSIF (sel="01") THEN x<=b; ELSIF (sel="10") THEN x<=c; ELSE x<=d; CASE sel IS WHEN "00" => x<=a; WHEN "01" => x<=b; WHEN "10" => x<=c; WHEN OTHERS => x<=d; END CASE;

With CASE:

CASE versus WHEN


CASE and WHEN are very similar. However, while one is concurrent (WHEN), the other is sequential (CASE). Their main similarities and differences are summarized in the table

CASE versus WHEN


Example: From a functional point of view, the two codes below are equivalent. With WHEN:
WITH sel SELECT x <= a WHEN "000", b WHEN "001", c WHEN "010", UNAFFECTED WHEN OTHERS; CASE sel IS WHEN "000" => x<=a; WHEN "001" => x<=b; WHEN "010" => x<=c; WHEN OTHERS => NULL; END CASE;

With CASE:

Combining it all together


Example: RAM Here is another example using sequential code. We show the implementation of a RAM (random access memory). A VHDL code that implements the circuit of figure is shown. The capacity chosen for the RAM is 16 words of length 8 bits each. Notice that the code is totally generic.

Combining it all together

Combining it all together

Thats all for this week!!!


Thank you for your patience & time

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