Engineer To Engineer Note EE-192

Technical Notes on using Analog Devices' DSP components and development tools
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Using C To Create Interrupt-Driven Systems On Blackfin Processors

Contributed by Joe B. May 28, 2003

Introduction the ADDS-BF535-EZKIT, the four LEDs are

mapped directly to the general purpose flag pins,
This Engineer-to-Engineer note will describe the whereas, on the ADDS-BF533-EZKIT, the six
process for implementing an interrupt-driven LEDs are accessible only through the on-board
general-purpose timer routine for the Blackfin flash port, which requires an alternate set of
Processor family using the C programming instructions in the Interrupt Service Routine
language. (ISR) in order to update the LED display. The
The referenced code in this application note was differences in the software will be discussed
verified using VisualDSP++ 3.1 for Blackfin later.
and the project was run on the EZ-KIT Lite
evaluation systems for both the ADSP-BF535 Using Features In VisualDSP++
and the ADSP-BF533 Blackfin Processors
(ADDS-BF535-EZLITE, Rev 1.0 and ADDS- VisualDSP++ 3.1 comes with a set of header
BF533-EZLITE, Rev 1.0). files that makes programming the Blackfin
processors in a C environment simpler. These
headers can be found under the Blackfin include
Timer Programming Model directory and are named using the cdef prefix
When coding in a pure assembly environment, to denote C definitions.
configuration of the timers and use of interrupts Memory-mapped registers are accessed in C via
is fairly straightforward, as described in the a referencing-dereferencing scheme using casted
Hardware Reference Manuals. However, when pointers, like this:
programming in C, using interrupts and
volatile long *pIMASK = (long *)IMASK;
accessing the timer registers requires knowledge
of some of the system header files and an IMASK is defined for the ADSP-BF535 in
understanding of the C run-time environment as defblackfin.h and for the ADSP-BF533 in
it relates to embedded system programming. The def_LPblackfin.h to be the address of the
process explained herein describes how to IMASK register in Blackfin address space
implement an interrupt-driven timer routine in C, (0xFFE02104). If the user wanted to set bit 0 of
but the methods employed can be applied to any the IMASK register in C, a proper 32-bit read-
C-coded interrupt routines for the Blackfin modify-write would be performed indirectly
processors. through the pointer defined above:
*pIMASK |= 0x1;
Two test platforms are necessary for this paper
because the demonstration utilizes the on-board Using this convention, the label pIMASK is a
LEDs on the Blackfin evaluation platforms. On data element of type long int *, which

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 a
consumes 4 bytes of memory and whose sole and SIC_IAR2. Refer to Chapter 4 (Program
purpose is to hold the address of IMASK so that Sequencer) of the appropriate Hardware
the user can indirectly write a 1 to the register by Reference Manual (either ADSP-BF535 or
accessing it through its mapped address. This ADSP-BF533) for more information regarding
convention wastes 4 bytes of memory for every interrupt priority assignments.
register accessed in this fashion! Several peripheral sources can share the same
An alternate method of manipulating the IMASK SIC interrupt assignment. Those sources with
register without consuming memory for the common interrupt assignments share the same
pointer is to force a casted pointer in the code to General-purpose interrupt (IVGx). Table 4-8 of
modify the address directly: the Hardware Reference Manual depicts the
*(volatile long *)IMASK |= 0x1; IVG-Select Definitions, which is where the
values programmed into the specific fields of the
In the Blackfin C-defines header files, all of the
SIC_IARx registers are translated into an IVG
memory-mapped registers have already been set
priority. Use the IVG priority detailed here to
up for access in C in a series of #define
determine which IMASK bit to set in the Core
statements, like this:
Event Controller (CEC) to enable interrupt
#define pIMASK ((volatile long *)IMASK)
handling for this group of peripherals.
This method allows the user to use the same C In addition to having a group of interrupt sources
syntax in their code, *pIMASK |= 0x1, to modify enabled in the CEC, handling for each sources
the registers contents without dedicating individual interrupt is enabled separately on the
memory for the pointer. Instead, the compilers SIC level in the SIC_IMASK register. For
pre-processor substitutes the casted pointer example, one could set each peripherals IVG
syntax for what appears to be pointer-modifying priority to the same level, thus making one group
code. So, if one knows the name of the register, of 24 potential interrupt sources. If only one of
one can easily access that register using standard those peripheral interrupts is enabled in
C code for pointer modification: SIC_IMASK, then the IVG effectively describes
*pREGISTER_NAME = VALUE; that single interrupt source because that single
These cdef header files were created for each source is the only source enabled at the SIC level
individual processor based upon the widths of to be recognized by the core as a peripheral
the registers being represented (i.e., a 16-bit interrupt source.
register uses the short int type, which the An abridged overview of how to set peripheral
Blackfin compiler treats as 16-bit data, whereas a interrupts up correctly goes like this:
32-bit register is represented as a long int or int
type). 1. Enable peripherals individual interrupt in
SIC_IMASK register.

Blackfin Interrupts (Hardware) 2. Program the interrupt priority levels into the
SIC_IARx registers. This step is optional.
The Blackfin family of processors has an
intricate interrupt system that includes core 3. Use the values in the SIC_IARx registers
interrupts, enabled in the IMASK register, and with Table 4-8 of the Hardware Reference
peripheral interrupts, which are configured in the Manual to determine which interrupt group
System Interrupt Controller (SIC). These (IVGx) the peripheral of interest is assigned
system-level peripheral interrupts are optionally to.
user-configurable in a set of System Interrupt 4. Set the appropriate IVGx bit in the IMASK
Assignment Registers: SIC_IAR0, SIC_IAR1, register.

Using C To Create Interrupt-Driven Systems On Blackfin Processors (EE-192) Page 2 of 9

 a
This example uses the interrupt of the General Software And Code Flow
Purpose Timer 0 to generate LED activity on the
evaluation boards. Following the process The Blackfin processors feature 16 Event Vector
detailed above, the first step is to configure the Table (EVT0-15) registers, which hold the vector
SIC_IMASK register. The Timer0 interrupt is addresses of the individual core interrupt
enabled in SIC_IMASK by setting either bit 14 channels. The program will jump to these
(ADSP-BF535) or bit 16 (ADSP-BF533): addresses whenever an event is latched by ILAT
and enabled in IMASK in the CEC.
*pSIC_IMASK = 0x00004000; // ADSP-BF535
*pSIC_IMASK = 0x00010000; // ADSP-BF533 In the assembly examples shipped with
VisualDSP++ 3.1, the startup.asm driver sets
up a default vector table using the following

L For 0.x revisions of the ADSP-BF535,

the active low setting is used to enable
interrupts in SIC_IMASK:
assembler commands:
p0.l = lo(EVT2); p0.h = hi(EVT2);
r0.l = _NHANDLER; r0.h = _NHANDLER;
*pSIC_IMASK = ~0x00004000; [p0++] = r0; // NMI Handler (Int2)
This anomaly was fixed in revision 1.0 of This code sets up a pointer register (P0) to write
the ADSP-BF535 and doesnt apply to to the EVT2 register and then writes the address
any other ADSP-BF53x processor. of the _NHANDLER label to EVT2. The result is
that any external Non-Maskable Interrupt (NMI)
detected by the CEC will force an immediate
Once the interrupt is enabled in the SIC, the next vector to the address of _NHANDLER, which is the
step is to optionally program the interrupt label associated with the NMIs ISR.
priority and assign the peripheral interrupt to an
IVG. This example doesnt reconfigure the In C, however, the startup.asm is substituted
interrupt priorities but uses the default values in with the C run-time library. The library function
the SIC_IARx registers. register_handler(IVGx, ISR_Name)

According to the reset values of the SIC_IARx assigns the name of the ISR function, ISR_Name,
registers, the default value in the Timer0 field of to the core event represented by IVGx by writing
SIC_IAR1 is 0x4. Table 4-8 of the Hardware the ISR functions address to the corresponding
Reference Manual tells us that the value 0x4 EVTx register. The function prototype and
maps to IVG11, therefore, IVG11 is the default enumeration of interrupt kinds can be found in
core interrupt channel for the Timer0 interrupt. the sys\exception.h header file.
So, the last step in setting up peripheral Checking the sys\exception.h header file, it can
interrupts in the hardware is to enable IVG11 in be seen that the signal number for IVG11 is
the CECs IMASK register. ik_ivg11. Therefore, use of this macro in this
example is:

L If this were a Core Timer application, the

steps required to initialize the SIC would
not be needed because the Core Timer
register_handler(ik_ivg11, Timer0_ISR);

In addition to setting the EVT11 register to

contain the address of the Timer0_ISR label, this
interrupt is a Core Event only.
macro also sets the IVG11 bit in the IMASK
Once the interrupts are properly configured, the register and globally enables interrupts.
final step is to have the software in place for
In addition to registering the interrupt handler,
proper interrupt servicing.
the interrupt routine itself must also be set-up,

Using C To Create Interrupt-Driven Systems On Blackfin Processors (EE-192) Page 3 of 9

 a
which is accomplished using a second library interrupt would be immediately latched again
function: upon completion of the ISR. Even though the
EX_INTERRUPT_HANDLER (ISR_Name) ISR executes, the SIC continues to monitor the
status of the timers IRQ, which generated the
The EX_INTERRUPT_HANDLER macro can be used in
event to begin with. If this IRQ remains active,
two ways. It must be used as the function
the SIC will continue to hold the bit in the SIC
signature for all ISRs. It generates the label
Interrupt Status Register (SIC_ISR) active,
ISR_Name to be used by the register_handler
which will result in the interrupt staying latched
function later in the source code. It also tells the
in the core (ILAT). Once the core executes the
compiler that the module is an ISR, which means
RTI; instruction in the ISR, the IMASK register
that processor context must be saved and
is restored and the ISR would be triggered again
restored upon entry and exit, respectively, and
because the CEC sees that an enabled interrupt is
that the final instruction in the assembly
currently latched.
produced by the compiler must be a return from
interrupt (RTI;). Basically, the
macro hides special
L
EX_INTERRUPT_HANDLER If several sources share the same IVG
compiler pragma directives from the user. priority, it is up to the user to implement
The EX_INTERRUPT_HANDLER macro can also be a software solution to poll each enabled
globally used as a function prototype if the peripherals IRQ in the group to
register_handler(IVGx, ISR_Name) function is determine which source generated the
called before the ISR_Name label is defined. interrupt request.

L A compiler error will be generated if the

register_handler function attempts to
use the ISR_Name label as an argument
The Code Example
The code in Listing 1 at the end of this note was
before the EX_INTERRUPT_HANDLER macro developed for the ADSP-BF535 EZ-KIT. The
defines the ISR_Name label. If you get code was then modified to perform the same
undefined label compiler errors, try functions on the ADSP-BF533 EZ-KIT. The two
using the EX_INTERRUPT_HANDLER macro to critical differences between the two evaluation
prototype the ISR globally. platforms are:
1. ADSP-BF533 has a TIMER_ENABLE
Once the ISR is registered and all the hardware register and uses 32-bit timer registers
considerations have been accounted for, the last whereas the ADSP-21535 uses pairs of
thing needed is an appropriate ISR. For registers to represent the upper 16 bits and
peripheral interrupts, the ISR code must clear the lower 16 bits separately
IRQ in the peripherals hardware. In most cases, 2. ADSP-BF533 EZ-KIT Lite LEDs are
this is done by performing a write-one-to-clear accessed via the on-board flash rather than
(W1C) operation to the associated IRQ bit. For the PFx flags, as previously mentioned
the Timer0 peripheral, a 1 must be written to the
TIMIL0 location of the Timers Status register in In Listing 1, there is a commented pre-processor
order to clear the IRQ before the ISR completes directive, #define BF533_PROJECT, at the top of
and application code begins running again. the code that must be uncommented to build a
project to run on an ADSP-BF533 EZ-KIT Lite.
In this example, if the core did not explicitly
clear the IRQ in the Timer0 ISR, the same

Using C To Create Interrupt-Driven Systems On Blackfin Processors (EE-192) Page 4 of 9

 a
Throughout the source code, there are several The ISR code increments a counter and displays
pre-processor directives based upon whether or the counter value in binary on the LEDs. Once
not BF533_PROJECT is defined. If BF533_PROJECT all LEDs are lit, the counter resets to 0. The ISR
is defined, the correct ADSP-BF533 code is built also clears the Timer0 interrupt request.
into the project. Otherwise, the code is built Listing 2 is the C source for the ADSP-BF535
assuming an ADSP-BF535 project. EZ-KIT and Listing 3 is the source code for the
This application code initializes Timer0 in ADSP-BF533 EZ-KIT, without the pre-processor
Pulsewidth Modulation (PWMOUT) Mode. It directives.
configures the appropriate LEDs to be outputs,
sets up the timer registers, associates the ISR to
the timer signal, and starts the timer.

mixed.c

/*****************************************************************************
* Uncomment the following pre-processor directive if building code for the *
* ADSP-BF533 EZ-KIT. ADSP-BF535-EZKIT users do not need to modify this. *
* Including BF533_PROJECT changes the legacy ADSP-BF535 code to use the *
* BF533 header, redefine the MAX value on the LEDs, use the BF533 timer *
* registers, and configure the flash to use the LEDs to output patterns *
*****************************************************************************/

//#define BF533_PROJECT // Uncomment for BF533-EZKIT Code

#ifdef BF533_PROJECT
#include <cdefBF533.h> // BF533 Register Pointer Definitions
#else
#include <cdefBF535.h> // BF535 Register Pointer Definitions
#endif

#include <sys/exception.h> // Interrupt Handling Header

// Prototypes
#ifdef BF533_PROJECT
void Init_EBIU_Flash(void); // Flash Init Code Needed For BF533-EZKIT
#else
void Init_Flags(void); // Flags Mapped To LEDs For BF535-EZKIT
#endif

void Init_Timer(void);
void Init_Interrupts(void);

// Selects All LEDs, Also Used For ISR Compare For All LEDs Lit
#ifdef BF533_PROJECT
#define MAX_LED_DISPLAY 0x3F // 6 LEDs on BF533, all LIT
#else
#define MAX_LED_DISPLAY 0xF // 4 LEDs on BF535, all LIT
#endif

#ifdef BF533_PROJECT // Flash Register Pointers For Updating BF533 LEDs

#define pFlashA_PortB_Dir (volatile unsigned char *)0x20270007
#define pFlashA_PortB_Data (volatile unsigned char *)0x20270005
#endif

Using C To Create Interrupt-Driven Systems On Blackfin Processors (EE-192) Page 5 of 9

 a
EX_INTERRUPT_HANDLER(Timer_ISR)
{
static int count=-1;

if (++count > MAX_LED_DISPLAY) // check for all LEDs lit

count=0; // clear all LEDs on wrap

#ifdef BF533_PROJECT
*pTIMER_STATUS = 1; // Clear Timer0 Interrupt
*pFlashA_PortB_Data = 0x0; // clear LEDs
*pFlashA_PortB_Data = count; // write new LED pattern to Port B
#else
*pTIMER0_STATUS = 1; // Clear Timer0 Interrupt
*pFIO_FLAG_C = 0xF; // clear LEDs
*pFIO_FLAG_S = count; // display new LED pattern
#endif
} // end Timer_ISR

main()
{
#ifdef BF533_PROJECT // If this is for the BF533-EZKIT
Init_EBIU_Flash(); // initialize EBIU for FLASH interface
#else // Otherwise, it is for a BF535-EZKIT
Init_Flags(); // Set All 4 LED PFx Flags To Outputs
#endif

Init_Timer(); // Initialize the Timer0 Registers

Init_Interrupts(); // Configure the Interrupts

while(1); // wait forever for interrupts

} // end main

#ifdef BF533_PROJECT
void Init_EBIU_Flash(void)
{
*pEBIU_AMBCTL0 = 0x7bb07bb0;
*pEBIU_AMBCTL1 = 0x7bb07bb0;
*pEBIU_AMGCTL = 0x000f;

*pFlashA_PortB_Dir = MAX_LED_DISPLAY; // 6 LEDs

} // end Init_EBIU_Flash
#else
void Init_Flags(void)
{
*pFIO_DIR = 0xF; // Configure PF0-3 As Outputs
} // end Init_Flags
#endif

void Init_Timer(void)
{
*pTIMER0_CONFIG = 0x0019; // PWM Mode, Period Count,
Interrupt

#ifdef BF533_PROJECT
*pTIMER0_PERIOD = 0x01000000; // Configure Timer Period
*pTIMER0_WIDTH = 0x00800000; // Configure Timer Width
*pTIMER_ENABLE = 0x0001; // Enable Timer
#else
*pTIMER0_PERIOD_HI = 0x0100; // Configure Timer Period

Using C To Create Interrupt-Driven Systems On Blackfin Processors (EE-192) Page 6 of 9

 a
*pTIMER0_PERIOD_LO = 0x0000;
*pTIMER0_WIDTH_HI = 0x0080; // Configure Timer Width
*pTIMER0_WIDTH_LO = 0x0000;
*pTIMER0_STATUS = 0x0100; // Enable Timer0
#endif
} // end Init_Timer

void Init_Interrupts(void)
{
// Enable the SIC interrupt
#ifdef BF533_PROJECT
*pSIC_IMASK = 0x00010000; // Timer0 Default IRQ Is Bit 16 on BF533
#else // if using Rev 1.0 or higher of BF535 silicon, delete the ~ below
*pSIC_IMASK = ~0x00004000; // Timer0 Default IRQ Is Bit 14 on BF535
#endif
// install the handler (also sets IVG11 in IMASK)
register_handler(ik_ivg11, Timer_ISR);
} // end Init_Interrupts

Listing 1: mixed.c

BF535_C_IRQ.c

#include <cdefBF535.h> // BF535 Register Pointer Definitions

#include <sys/exception.h> // Interrupt Handling Header

// Prototypes
void Init_Flags(void); // Flags Mapped To LEDs For BF535-EZKIT
void Init_Timer(void);
void Init_Interrupts(void);

// Selects All LEDs, Also Used For ISR Compare For All LEDs Lit
#define MAX_LED_DISPLAY 0xF // 4 LEDs on BF535, all LIT

EX_INTERRUPT_HANDLER(Timer_ISR)
{
static int count=-1;

if (++count > MAX_LED_DISPLAY) // check for all LEDs lit

count=0; // clear all LEDs on wrap

*pTIMER0_STATUS = 1; // Clear Timer0 Interrupt

*pFIO_FLAG_C = 0xF; // clear LEDs
*pFIO_FLAG_S = count; // display new LED pattern
} // end Timer_ISR

main()
{
Init_Flags(); // Set All 4 LED PFx Flags To Outputs
Init_Timer(); // Initialize the Timer0 Registers
Init_Interrupts(); // Configure the Interrupts

while(1); // wait forever for interrupts

} // end main

void Init_Flags(void)
{

Using C To Create Interrupt-Driven Systems On Blackfin Processors (EE-192) Page 7 of 9

 a
*pFIO_DIR = 0xF; // Configure PF0-3 As Outputs
} // end Init_Flags

void Init_Timer(void)
{
*pTIMER0_CONFIG = 0x0019; // PWM Mode, Period Count, Interrupt
*pTIMER0_PERIOD_HI = 0x0100; // Configure Timer Period
*pTIMER0_PERIOD_LO = 0x0000;
*pTIMER0_WIDTH_HI = 0x0080; // Configure Timer Width
*pTIMER0_WIDTH_LO = 0x0000;
*pTIMER0_STATUS = 0x0100; // Enable Timer0
} // end Init_Timer

void Init_Interrupts(void)
{
// Enable SIC interrupt, if using Rev 1.0 or higher of ADSP-BF535 silicon,
// delete the ~ below
*pSIC_IMASK = ~0x00004000; // Timer0 Default IRQ Is Bit 14

// install the handler (also sets IVG11 in IMASK)

register_handler(ik_ivg11, Timer_ISR);
} // end Init_Interrupts

Listing 2: BF535_C_IRQ.c

BF533_C_IRQ.c

#include <cdefBF533.h> // BF533 Register Pointer Definitions

#include <sys/exception.h> // Interrupt Handling Header

// Prototypes
void Init_EBIU_Flash(void); // Flash Init Code Needed For BF533-EZKIT
void Init_Timer(void);
void Init_Interrupts(void);

// Selects All LEDs, Also Used For ISR Compare For All LEDs Lit
#define MAX_LED_DISPLAY 0x3F // 6 LEDs on BF533, all LIT

// Map Flash Port B Registers For LED Access

#define pFlashA_PortB_Dir (volatile unsigned char *)0x20270007
#define pFlashA_PortB_Data (volatile unsigned char *)0x20270005

EX_INTERRUPT_HANDLER(Timer_ISR)
{
static int count=-1;

if (++count > MAX_LED_DISPLAY) // check for all LEDs lit

count=0; // clear all LEDs on wrap

*pTIMER_STATUS = 1; // Clear Timer0 Interrupt

*pFlashA_PortB_Data = 0x0; // clear LEDs
*pFlashA_PortB_Data = count; // write new LED pattern to Port B

} // end Timer_ISR

main()
{

Using C To Create Interrupt-Driven Systems On Blackfin Processors (EE-192) Page 8 of 9

 a
Init_EBIU_Flash(); // initialize EBIU for FLASH interface
Init_Timer(); // Initialize the Timer0 Registers
Init_Interrupts(); // Configure the Interrupts

while(1); // wait forever for interrupts

} // end main

void Init_EBIU_Flash(void)
{
*pEBIU_AMBCTL0 = 0x7bb07bb0;
*pEBIU_AMBCTL1 = 0x7bb07bb0;
*pEBIU_AMGCTL = 0x000f;

*pFlashA_PortB_Dir = MAX_LED_DISPLAY; // 6 LEDs

} // end Init_EBIU_Flash

void Init_Timer(void)
{
*pTIMER0_CONFIG = 0x0019; // PWM Mode, Period Count, Interrupt
*pTIMER0_PERIOD = 0x01000000; // Configure Timer Period
*pTIMER0_WIDTH = 0x00800000; // Configure Timer Width
*pTIMER_ENABLE = 0x0001; // Enable Timer
} // end Init_Timer

void Init_Interrupts(void)
{
// Enable the SIC interrupt
*pSIC_IMASK = 0x00010000; // Timer0 Default IRQ Is Bit 16

// install the handler (also sets IVG11 in IMASK)

register_handler(ik_ivg11, Timer_ISR);
} // end Init_Interrupts

Listing 3: BF533_C_IRQ.c

References
[1] ADSP-BF535 Blackfin Hardware Reference. Revision 1.0, November 2002. Analog Devices, Inc.
[2] ADSP-BF533 Blackfin Hardware Reference. Preliminary Revision, March 2003. Analog Devices, Inc.
[3] VisualDSP++ 3.0 C/C++ Compiler and Library Manual for Blackfin Processors. Second Revision,
April 2002. Analog Devices, Inc.

Document History
Version Description

May 28, 2003 by Joe B. Updated interrupt service routine example code.

April 30, 2003 by Joe B. Initial Release

Using C To Create Interrupt-Driven Systems On Blackfin Processors (EE-192) Page 9 of 9