Lab 01 LOGIC
Lab 01 LOGIC
Submitted by:
Botardo, Joseph Jeremy B.
ECE-4101
Submitted to:
Engr. Ralph Gerard B. Sangalang
Date Submitted:
September 9, 2017
I. OBJECTIVES
1. To effectively know and evaluate the behavior of each IC based on its logic gate.
2. To tabulate the truth table for each of the IC.
II. MATERIALS
74LS00 LED
74LS02 Battery snap
74LS04 Breadboard
74LS08 2 SPDT switch
74LS32 Connecting Wires, Jumper wires
74LS86 Wire Stripper
III. PROCEDURES
1. Each IC was placed accordingly in a prototyping board.
2. As the VCC and ground of each IC was determined, stripped wires were then connected
on its designated placements. (pin 14 and pin 7).
3. Every IC has a designated pin output. The LED and the resistor was placed at one output
for every IC.
4. A 9V battery was then connected on the + and point of the proto-board.
5. The Two inputs were then connected using a jumper wire to the SPDT switches.
6. The logical HIGH and LOW changed as the switches were also varied in different
combinations.
7. The truth table was then tabulated.
74LS00 1 1 0
1 0 1
0 1 1
0 0 1
1 1 0
74S02
1 0 0
0 1 0
0 0 1
1 0
74LS04
0 1
1 1 1
74LS08
1 0 0
0 1 0
0 0 0
1 1 1
74LS32
1 0 1
0 1 1
0 0 0
1 1 0
74LS86
1 0 1
0 1 1
0 0 0
Given the necessary data for the effective determination of the input and output pinout
placement of each IC, the connections were connected accordingly as implied. From the given
tabulation of result, these facts were observed:
Almost all of the IC requires two initial input before an output can be obtained. The only IC
that required only 1 input was the 74LS04 (Inverter). The 74LS00, 74LS08, 74LS32 and 74LS86
has the same pin placements. 74LS02 has its unique pin placement. (the 1st, 4th, 10th, and 13th pin
is the output and the corresponding pins were the input) The inputs were connected on SPDT
switches. The switches were necessary for determining the truth table. Also, it had lessened the
effort of placing the input wires to the supply or to the ground. As the switches are altered in
different combinations, the output (the on/off action of the LED) varied as well. This is due to the
reason that each IC provided for this experiment has its own logic gates that reacted just as what
is provided in theories. All of the gates of the IC were tested and was observed to be working
fine. But for the sake of just portraying the behavior, only 1 gate was shown in the actual pictures.
VI. CONCLUSION
From what is observed for this experiment, it can be concluded that each IC provided for
this experiment has its own designated logic gates that could be used in different systems on a
various range of design applications. The 1s and 0s in terms of analysis is truly an efficient way to
analyze digital logic circuits. From theory, it is provided that the AND gate will only give a logical
high (1) when both inputs are also at logical high, the OR gate will give a logical high when at
least one of the input is at high, the Inverter will basically invert the logical input, the NAND gate
is a complement of an AND gate, the NOR gate is a complement of an OR gate, the XOR gate will
only give a logical high when one of the input is at high. If both of the inputs were the same, the
output will simply be a logical low (0). These statements were observed right all throughout this
experiment. The behavior of each IC will vary depending on the combination of the input that is
implied.