1 _________________ 3 __________________

___________________ ___________________
Advanced Logic Circuit Advanced Logic Circuit

Resistive Loads (DC Circuit Behavior with

Loads) ___________________ Resistive Loads ___________________
Connected to a CMOS output
Requiring nontrivial amounts of
___________________ ___________________
current
___________________ ___________________
Examples of resistive loads
Transmission-line termination ___________________ ___________________
___________________ ___________________
One or more TTL or other non-CMOS
inputs

Current-consuming devices such as

LED (light-emitting diode) ___________________ ___________________
When the output of a CMOS circuit is
connected to a resistive load, the
___________________ ___________________
output behavior is not ideal
___________________ 100
Vout = 100 + 667 X 3.33V = 0.43V
___________________
___________________ ___________________
CMOS Steady-State Electrical Behavior * Property of STI
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___________________ CMOS Steady-State Electrical Behavior * Property of STI
Page 3 of 14
___________________
2 _________________ 4 __________________
___________________ ___________________
Advanced Logic Circuit Advanced Logic Circuit

Circuit Behavior with Circuit Behavior with

Resistive Loads ___________________ Resistive Loads ___________________
___________________ ___________________
___________________ ___________________
___________________ ___________________
___________________ ___________________
___________________ ___________________
Rn, Rp
___________________ ___________________
on state : about 100 (n-channel), 200
(p-channel) ___________________ ___________________
___________________
667
___________________
off state : about above 1 M
Vout = 3.33V + (5 3.33) 200 + 667 V
= 4.61 V

CMOS Steady-State Electrical Behavior * Property of STI

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___________________ CMOS Steady-State Electrical Behavior * Property of STI
Page 4 of 14
___________________
 5 _________________ 7 __________________
___________________ ___________________
Advanced Logic Circuit Advanced Logic Circuit

Circuit Behavior with Circuit Behavior with

Resistive Loads ___________________ Non-ideal inputs ___________________
IC manufactures usually dont specify the
resistance of the on transistors
___________________ If the input voltage is not close to the
power-supply rail
___________________
Instead, IOLmax and IOHmax
___________________ on transistor may not be fully on
on resistance may increase
___________________
___________________ off transistor may not be fully off
off resistance may decrease ___________________
___________________ ___________________
___________________ ___________________
___________________ ___________________
___________________ ___________________
___________________ ___________________
CMOS Steady-State Electrical Behavior * Property of STI
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___________________ CMOS Steady-State Electrical Behavior * Property of STI
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___________________
6 _________________ 8 __________________
___________________ ___________________
Advanced Logic Circuit Advanced Logic Circuit

Circuit Behavior with Circuit Behavior with

Resistive Loads ___________________ Non-ideal inputs ___________________
___________________ The slight degradation of
voltage is generally tolerable
output ___________________
___________________ Whats worse is that the output
structure is now consuming a
___________________
___________________ nontrivial amount of power
Pwasted = 5.0V Iwasted = 8.62 mW (for VIN
___________________
___________________ ___________________
= 1.5V)
More serious in TTL loads rather than
CMOS loads

___________________ ___________________
on resistance from table 3-4 with a
worst-case resistive load
___________________ ___________________
Rp (ON) = ( VDD VOH minT ) / IOH maxT = 165
___________________ ___________________
___________________ ___________________
Rn (ON) = VOL maxT / IOL maxT = 82.5

CMOS Steady-State Electrical Behavior * Property of STI

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___________________
 9 _________________ 11 _________________
___________________ ___________________
Advanced Logic Circuit Advanced Logic Circuit

Circuit Behavior with

Fanout
Non-ideal inputs ___________________ ___________________
The output voltage of a CMOS inverter
deteriorates further with a resistive
___________________ IOHmaxC ___________________
___________________ ___________________
- 20 A for a HC-series CMOS gate
load driving CMOS inputs
Iimax

___________________ 1 A : The maximum input current

for a HC-series CMOS input ___________________
___________________ High-state fanout = 20 ___________________
___________________ ___________________
Overall fanout of a gate
The minimum of its High-state and
Low-state fanouts

___________________ ___________________
___________________ ___________________
___________________ ___________________
CMOS Steady-State Electrical Behavior * Property of STI
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___________________ CMOS Steady-State Electrical Behavior * Property of STI
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___________________
10 ________________ 12 _________________
___________________ ___________________
Advanced Logic Circuit Advanced Logic Circuit

Fanout Fanout
___________________ ___________________
Fanout of the logic ___________________ Effects of loading beyond the fanout: ___________________
___________________ ___________________
The number of inputs that the gate can drive LOW/HIGH state level changes
without exceeding its worst-case loading
Propagation delay, output rise & fall
specifications shown in table below.
time may increase beyond spec.

___________________ Operating temperature may increase

___________________
___________________ ___________________
___________________ ___________________
IOLmaxC
20 A for a HC-series CMOS gate
___________________ ___________________
___________________ ___________________

driving CMOS inputs
Iimax
1 A : The maximum input current
for a HC-series CMOS input ___________________ ___________________
Low-state fanout = 20
CMOS Steady-State Electrical Behavior * Property of STI
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 13 ________________
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Advanced Logic Circuit

Unused Inputs
___________________
In high-speed circuit design, its
usually better to use (b), (c) rather
___________________
than (a) since (a) increase the capacity
load on the driving signal
___________________
Unused CMOS inputs should never be
left unconnected ___________________
___________________
Floating input 0 V (logic 0)

___________________
___________________
___________________
___________________
CMOS Steady-State Electrical Behavior * Property of STI
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___________________
14 ________________
___________________
Advanced Logic Circuit

Current Spike and

Decoupling Capacitors
___________________
Current Spike ___________________
___________________
Flowing from VCC to ground through the
partially-on p- and n- channels when a
CMOS output switches between LOW

___________________
and HIGH
Showing up as noise on the power-
supply and ground connections

Decoupling Capacitors
___________________
Between VCC and ground to supply
current during transitions ___________________
___________________
___________________
___________________
CMOS Steady-State Electrical Behavior * Property of STI
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___________________