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GATE EC Topic wise Questions

Analog Circuits

2011 ONE MARK

Question. 1
In the circuit shown below, capacitors C1 and C2 are very large and
are shorts at the input frequency. vi is a small signal input. The gain
magnitude vo at 10 M rad/s is
vi

(A) maximum
(B) minimum
(C) unity
(D) zero

Question. 2
The circuit below implements a filter between the input current ii
and the output voltage vo . Assume that the op-amp is ideal. The
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Analog Circuits

filter implemented is a

(A) low pass filter (B) band pass filter

(C) band stop filter (D) high pass filter

2011 TWO MARKS

Question. 3
In the circuit shown below, for the MOS transistors, μn Cox = 100 μA/V 2
and the threshold voltage VT = 1 V . The voltage Vx at the source of
the upper transistor is

(A) 1 V (B) 2 V
(C) 3 V (D) 3.67 V

Question. 4
For a BJT, the common base current gain α = 0.98 and the collector
base junction reverse bias saturation current ICO = 0.6 μA . This BJT
is connected in the common emitter mode and operated in the active
region with a base drive current IB = 20 μA . The collector current IC
for this mode of operation is
(A) 0.98 mA (B) 0.99 mA
(C) 1.0 mA (D) 1.01 mA
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Analog Circuits

Question. 5
For the BJT, Q1 in the circuit shown below,
β = 3, VBEon = 0.7 V, VCEsat = 0.7 V . The switch is initially closed. At
time t = 0 , the switch is opened. The time t at which Q1 leaves the
active region is

(A) 10 ms (B) 25 ms
(C) 50 ms (D) 100 ms

Statement for Linked Answer Questions: 6 & 7

In the circuit shown below, assume that the voltage drop across a
forward biased diode is 0.7 V. The thermal voltage Vt = kT/q = 25 mV
. The small signal input vi = Vp cos ^ωt h where Vp = 100 mV.

Question. 6
The bias current IDC through the diodes is
(A) 1 mA (B) 1.28 mA
(C) 1.5 mA (D) 2 mA
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Analog Circuits

Question. 7

The ac output voltage vac is

(A) 0.25 cos ^ωt h mV (B) 1 cos (ωt) mV
(C) 2 cos (ωt) mV (D) 22 cos (ωt) mV

2010 ONE MARK

Question. 8

The amplifier circuit shown below uses a silicon transistor. The

capacitors CC and CE can be assumed to be short at signal frequency
and effect of output resistance r0 can be ignored. If CE is disconnected
from the circuit, which one of the following statements is true

(A) The input resistance Ri increases and magnitude of voltage gain

AV decreases
(B) The input resistance Ri decreases and magnitude of voltage gain
AV increases
(C) Both input resistance Ri and magnitude of voltage gain AV
decreases
(D) Both input resistance Ri and the magnitude of voltage gain AV
increases

Question. 9

In the silicon BJT circuit shown below, assume that the emitter area
of transistor Q1 is half that of transistor Q2
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Analog Circuits

The value of current Io is approximately

(A) 0.5 mA (B) 2 mA
(C) 9.3 mA (D) 15 mA

Question. 10

Assuming the OP-AMP to be ideal, the voltage gain of the amplifier

shown below is

(A) − R2 (B) − R 3
R1 R1

(D) −b R2 + R 3 l
R2 || R 3
(C) −
R1 R1

2010 TWO MARKS

Common Data Questions: 11 & 12 :

Consider the common emitter amplifier shown below with the
following circuit parameters:
β = 100, gm = 0.3861 A/V, r0 = 259 Ω, RS = 1 kΩ, RB = 93 kΩ,
RC = 250 kΩ, RL = 1 kΩ, C1 = 3 and C2 = 4.7 μF
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Analog Circuits

Question. 11

The resistance seen by the source vS is

(A) 258 Ω (B) 1258 Ω

(C) 93 kΩ (D) 3

Question. 12

The lower cut-off frequency due to C2 is

(A) 33.9 Hz (B) 27.1 Hz

(C) 13.6 Hz (D) 16.9 Hz

Question. 13

The transfer characteristic for the precision rectifier circuit shown

below is (assume ideal OP-AMP and practical diodes)

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Analog Circuits

2009 TWO MARKS

Question. 14

In the circuit below, the diode is ideal. The voltage V is given by

(A) min (Vi, 1) (B) max (Vi, 1)

(C) min (− Vi, 1) (D) max (− Vi, 1)

Question. 15

In the following a stable multivibrator circuit, which properties of

v0 (t) depend on R2 ?
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Analog Circuits

(A) Only the frequency

(B) Only the amplitude
(C) Both the amplitude and the frequency
(D) Neither the amplitude nor the frequency

Statement for Linked Answer Question 16 & 17

Consider for CMOS circuit shown, where the gate voltage v0 of the
n-MOSFET is increased from zero, while the gate voltage of the p −
MOSFET is kept constant at 3 V. Assume, that, for both transistors,
the magnitude of the threshold voltage is 1 V and the product of the
trans-conductance parameter is 1mA. V - 2

Question. 16

For small increase in VG beyond 1V, which of the following gives the
correct description of the region of operation of each MOSFET
(A) Both the MOSFETs are in saturation region
(B) Both the MOSFETs are in triode region
(C) n-MOSFETs is in triode and p −MOSFET is in saturation region
(D) n- MOSFET is in saturation and p −MOSFET is in triode region
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Analog Circuits

Question. 17

Estimate the output voltage V0 for VG = 1.5 V. [Hints : Use the

appropriate current-voltage equation for each MOSFET, based on
the answer to Q.4.16]

(A) 4 − 1 (B) 4 + 1
2 2

(C) 4 − 3 (D) 4 + 3
2 2

Question. 18

In the circuit shown below, the op-amp is ideal, the transistor has
VBE = 0.6 V and β = 150 . Decide whether the feedback in the circuit
is positive or negative and determine the voltage V at the output of
the op-amp.

(A) Positive feedback, V = 10 V. (B) Positive feedback, V = 0 V

(C) Negative feedback, V = 5 V (D) Negative feedback, V = 2 V

Question. 19

A small signal source Vi (t) = A cos 20t + B sin 106 t is applied to a

transistor amplifier as shown below. The transistor has β = 150 and
hie = 3Ω . Which expression best approximate V0 (t)
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Analog Circuits

(A) V0 (t) =− 1500 (A cos 20t + B sin 106 t)

(B) V0 (t) = − 1500( A cos 20t + B sin 106 t)
(C) V0 (t) =− 1500B sin 106 t
(D) V0 (t) =− 150B sin 106 t

2008 ONE MARK

Question. 20

In the following limiter circuit, an input voltage Vi = 10 sin 100πt is

applied. Assume that the diode drop is 0.7 V when it is forward
biased. When it is forward biased. The zener breakdown voltage is
6.8 V

The maximum and minimum values of the output voltage respectively

are

(A) 6.1 V, − 0.7 V (B) 0.7 V, − 7.5 V

(C) 7.5 V, − 0.7 V (D) 7.5 V, − 7.5 V
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Analog Circuits

2008 TWO MARSK

Question. 21

For the circuit shown in the following figure, transistor M1 and M2

are identical NMOS transistors. Assume the M2 is in saturation and
the output is unloaded.

The current Ix is related to Ibias as

(A) Ix = Ibias + Is (B) Ix = Ibias
(C) Ix = Ibias − cVDD − Vout m (D) Ix = Ibias − Is
RE

Question. 22

Consider the following circuit using an ideal OPAMP. The I-V

characteristic of the diode is described by the relation I = I 0 _eV − 1i
V
t

where VT = 25 mV, I0 = 1μ A and V is the voltage across the diode

(taken as positive for forward bias). For an input voltage Vi =− 1 V ,
the output voltage V0 is

(A) 0 V (B) 0.1 V

(C) 0.7 V (D) 1.1 V

Question. 23

The OPAMP circuit shown above represents a

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Analog Circuits

(A) high pass filter (B) low pass filter

(C) band pass filter (D) band reject filter

Question. 24

Two identical NMOS transistors M1 and M2 are connected as shown

below. Vbias is chosen so that both transistors are in saturation. The
equivalent gm of the pair is defied to be 2Iout at constant Vout
2Vi
The equivalent gm of the pair is

(A) the sum of individual gm ' s of the transistors

(B) the product of individual gm ’s of the transistors
(C) nearly equal to the gm of M1
gm
(D) nearly equal to of M2
g0

Question. 25

Consider the Schmidt trigger circuit shown below

A triangular wave which goes from -12 to 12 V is applied to the

inverting input of OPMAP. Assume that the output of the OPAMP
swings from +15 V to -15 V. The voltage at the non-inverting input
switches between
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Analog Circuits

(A) − 12V to +12 V (B) -7.5 V to 7.5 V

(C) -5 V to +5 V (D) 0 V and 5 V

Statement for Linked Answer Question 26 & 27:

In the following transistor circuit, VBE = 0.7 V, r3 = 25 mV/IE , and

β and all the capacitances are very large

Question. 26

The value of DC current IE is

(A) 1 mA (B) 2 mA
(C) 5 mA (D) 10 mA

Question. 27

The mid-band voltage gain of the amplifier is approximately

(A) -180 (B) -120
(C) -90 (D) -60
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Analog Circuits

2007 ONE MARK

Question. 28
The correct full wave rectifier circuit is

Question. 29
In a transconductance amplifier, it is desirable to have
(A) a large input resistance and a large output resistance
(B) a large input resistance and a small output resistance
(C) a small input resistance and a large output resistance
(D) a small input resistance and a small output resistance

2007 TWO MARKS

Question. 30
For the Op-Amp circuit shown in the figure, V0 is

(A) -2 V (B) -1 V
(C) -0.5 V (D) 0.5 V
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Analog Circuits

Question. 31

For the BJT circuit shown, assume that the β of the transistor is
very large and VBE = 0.7 V. The mode of operation of the BJT is

(A) cut-off (B) saturation

(C) normal active (D) reverse active

Question. 32

In the Op-Amp circuit shown, assume that the diode current

follows the equation I = Is exp (V/VT ). For Vi = 2V, V0 = V01, and for
Vi = 4V, V0 = V02 .

The relationship between V01 and V02 is

(A) V02 = 2 Vo1 (B) Vo2 = e2 Vo1

(C) Vo2 = Vo1 1n2 (D) Vo1 − Vo2 = VT 1n2

Question. 33

In the CMOS inverter circuit shown, if the trans conductance

parameters of the NMOS and PMOS transistors are
W
kn = kp = μn Cox Wn = μCox p = 40μA/V2
Ln Lp
and their threshold voltages ae VTHn = VTHp = 1 V the current I is
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Analog Circuits

(A) 0 A (B) 25 μA
(C) 45 μA (D) 90 μA

Question. 34
For the Zener diode shown in the figure, the Zener voltage at knee is
7 V, the knee current is negligible and the Zener dynamic resistance
is 10 Ω. If the input voltage (Vi) range is from 10 to 16 V, the output
voltage (V0) ranges from

(A) 7.00 to 7.29 V (B) 7.14 to 7.29 V

(C) 7.14 to 7.43 V (D) 7.29 to 7.43 V

Statement for Linked Answer Questions 35 & 36:

Consider the Op-Amp circuit shown in the figure.

Question. 35
The transfer function V0 (s)/ Vi (s) is
(A) 1 − sRC (B) 1 + sRC
1 + sRC 1 − sRC
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Analog Circuits

(C) 1 (D) 1
1 − sRC 1 + sRC

Question. 36

If Vi = V1 sin (ωt) and V0 = V2 sin (ωt + φ), then the minimum and
maximum values of φ (in radians) are respectively
(A) − π and π (B) 0 and π
2 2 2

(C) − π and 0 (D) − π and 0

2

2006 ONE MARK

Question. 37

The input impedance (Zi) and the output impedance (Z0) of an ideal
trans-conductance (voltage controlled current source) amplifier are
(A) Zi = 0, Z0 = 0 (B) Zi = 0, Z0 = 3
(C) Zi = 3, Z0 = 0 (D) Zi = 3, Z0 = 3

Question. 38

An n-channel depletion MOSFET has following two points on its

ID − VGs curve:
(i) VGS = 0 at ID = 12 mA and
(ii) VGS =− 6 Volts at ID = 0 mA
Which of the following Q point will given the highest trans conductance
gain for small signals?
(A) VGS =− 6 Volts (B) VGS =− 3 Volts
(C) VGS = 0 Volts (D) VGS = 3 Volts

2006 TWO MARKS

Question. 39

For the circuit shown in the following figure, the capacitor C is

initially uncharged. At t = 0 the switch S is closed. The Vc across the
capacitor at t = 1 millisecond is
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Analog Circuits

In the figure shown above, the OP-AMP is supplied with ! 15V .

(A) 0 Volt (B) 6.3 Volt

(C) 9.45 Volts (D) 10 Volts

Question. 40

For the circuit shown below, assume that the zener diode is ideal with
a breakdown voltage of 6 volts. The waveform observed across R is

Common Data for Questions 41, 42 & 43 :

In the transistor amplifier circuit shown in the figure below, the
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Analog Circuits

transistor has the following parameters:

βDC = 60 , VBE = 0.7V, hie " 3
The capacitance CC can be assumed to be infinite.
In the figure above, the ground has been shown by the symbol 4

Question. 41

Under the DC conditions, the collector-or-emitter voltage drop is

(A) 4.8 Volts (B) 5.3 Volts
(C) 6.0 Volts (D) 6.6 Volts

Question. 42

If βDC is increased by 10%, the collector-to-emitter voltage drop

(A) increases by less than or equal to 10%
(B) decreases by less than or equal to 10%
(C) increase by more than 10%
(D) decreases by more than 10%

Question. 43

The small-signal gain of the amplifier vc is

vs
(A) -10 (B) -5.3
(C) 5.3 (D) 10

Common Data for Questions 44 & 45:

A regulated power supply, shown in figure below, has an unregulated
input (UR) of 15 Volts and generates a regulated output Vout . Use the
component values shown in the figure.
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Analog Circuits

Question. 44

The power dissipation across the transistor Q1 shown in the figure is

(A) 4.8 Watts (B) 5.0 Watts
(C) 5.4 Watts (D) 6.0 Watts

Question. 45

If the unregulated voltage increases by 20%, the power dissipation

across the transistor Q1
(A) increases by 20% (B) increases by 50%
(C) remains unchanged (D) decreases by 20%

2005 ONE MARK

Question. 46

The input resistance Ri of the amplfier shown in the figure is

(A) 30 kΩ (B) 10 kΩ
4

(C) 40 kΩ (D) infinite

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Analog Circuits

Question. 47

The effect of current shunt feedback in an amplifier is to

(A) increase the input resistance and decrease the output resistance
(B) increases both input and output resistance
(C) decrease both input and output resistance
(D) decrease the input resistance and increase the output resistance

Question. 48

The cascade amplifier is a multistage configuration of

(A) CC − CB (B) CE − CB
(C) CB − CC (D) CE − CC

2005 TWO MARKS

Question. 49

In an ideal differential amplifier shown in the figure, a large value of

(RE ).
(A) increase both the differential and common - mode gains.
(B) increases the common mode gain only.
(C) decreases the differential mode gain only.
(D) decreases the common mode gain only.

Question. 50

For an npn transistor connected as shown in figure VBE = 0.7 volts.

Given that reverse saturation current of the junction at room
temperature 300 K is 10 - 13 A, the emitter current is

(A) 30 mA (B) 39 mA
(C) 49 mA (D) 20 mA
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Analog Circuits

Question. 51

The voltage e0 is indicated in the figure has been measured by an

ideal voltmeter. Which of the following can be calculated ?

(A) Bias current of the inverting input only

(B) Bias current of the inverting and non-inverting inputs only
(C) Input offset current only
(D) Both the bias currents and the input offset current

Question. 52

The Op-amp circuit shown in the figure is filter. The type of filter
and its cut. Off frequency are respectively

(A) high pass, 1000 rad/sec. (B) Low pass, 1000 rad/sec
(C) high pass, 1000 rad/sec (D) low pass, 10000 rad/sec

Question. 53

The circuit using a BJT with β = 50 and VBE = 0.7V is shown in

the figure. The base current IB and collector voltage by VC and
respectively
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Analog Circuits

(A) 43 μA and 11.4 Volts (B) 40 μA and 16 Volts

(C) 45 μA and 11 Volts (D) 50 μA and 10 Volts

Question. 54
The Zener diode in the regulator circuit shown in the figure has
a Zener voltage of 5.8 volts and a zener knee current of 0.5 mA.
The maximum load current drawn from this current ensuring proper
functioning over the input voltage range between 20 and 30 volts, is

(A) 23.7 mA (B) 14.2 mA

(C) 13.7 mA (D) 24.2 mA

Question. 55
Both transistors T1 and T2 show in the figure, have a β = 100 , threshold
voltage of 1 Volts. The device parameters K1 and K2 of T1 and T2 are,
respectively, 36 μA/V2 and 9 μA/V 2 . The output voltage Vo i s

(A) 1 V (B) 2 V
(C) 3 V (D) 4 V
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Analog Circuits

Common Data Questions 56, 57 & 58 :

Given, rd = 20kΩ , IDSS = 10 mA, Vp =− 8 V

Question. 56

Zi and Z0 of the circuit are respectively

(A) 2 MΩ and 2 kΩ (B) 2 MΩ and 20 kΩ
11

(C) infinity and 2 MΩ (D) infinity and 20 kΩ

11

Question. 57

ID and VDS under DC conditions are respectively

(A) 5.625 mA and 8.75 V (B) 1.875 mA and 5.00 V
(C) 4.500 mA and 11.00 V (D) 6.250 mA and 7.50 V

Question. 58

Transconductance in milli-Siemens (mS) and voltage gain of the

amplifier are respectively
(A) 1.875 mS and 3.41 (B) 1.875 ms and -3.41
(C) 3.3 mS and -6 (D) 3.3 mS and 6

Question. 59

Given the ideal operational amplifier circuit shown in the figure

indicate the correct transfer characteristics assuming ideal diodes
with zero cut-in voltage.
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Analog Circuits

2004 ONE MARK

Question. 60

An ideal op-amp is an ideal

(A) voltage controlled current source
(B) voltage controlled voltage source
(C) current controlled current source
(D) current controlled voltage source

Question. 61

Voltage series feedback (also called series-shunt feedback) results in

(A) increase in both input and output impedances
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Analog Circuits

(B) decrease in both input and output impedances

(C) increase in input impedance and decrease in output impedance
(D) decrease in input impedance and increase in output impedance

Question. 62

The circuit in the figure is a

(A) low-pass filter (B) high-pass filter

(C) band-pass filter (D) band-reject filter

2004 TWO MARKS

Question. 63

A bipolar transistor is operating in the active region with a collector

current of 1 mA. Assuming that the β of the transistor is 100 and
the thermal voltage (VT ) is 25 mV, the transconductance (gm) and
the input resistance (rπ) of the transistor in the common emitter
configuration, are
(A) gm = 25 mA/V and rπ = 15.625 kΩ
(B) gm = 40 mA/V and rπ = 4.0 kΩ
(C) gm = 25 mA/V and rπ = 2.5 k Ω
(D) gm = 40 mA/V and rπ = 2.5 kΩ

Question. 64

The value of C required for sinusoidal oscillations of frequency 1 kHz

in the circuit of the figure is
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Analog Circuits

(A) 1 μF (B) 2π μF
2π

(C) 1 μF (D) 2π 6 μF
2π 6

Question. 65

In the op-amp circuit given in the figure, the load current iL is

(A) − Vs (B) Vs
R2 R2

(C) − Vs (D) Vs
RL R1

Question. 66

In the voltage regulator shown in the figure, the load current can
vary from 100 mA to 500 mA. Assuming that the Zener diode is ideal
(i.e., the Zener knee current is negligibly small and Zener resistance
is zero in the breakdown region), the value of R is
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Analog Circuits

(A) 7 Ω (B) 70 Ω

(C) 70 Ω (D) 14 Ω
3

Question. 67

In a full-wave rectifier using two ideal diodes, Vdc and Vm are the dc
and peak values of the voltage respectively across a resistive load. If
PIV is the peak inverse voltage of the diode, then the appropriate
relationships for this rectifier are

(A) Vdc = Vm , PIV = 2Vm (B) Idc = 2 Vm , PIV = 2Vm

π π

(C) Vdc = 2 Vm , PIV = Vm (D) Vdc Vm , PIV = Vm

π π

Question. 68

Assume that the β of transistor is extremely large and VBE = 0.7V, IC

and VCE in the circuit shown in the figure

(A) IC = 1 mA, VCE = 4.7 V (B) IC = 0.5 mA, VCE = 3.75 V

(C) IC = 1 mA, VCE = 2.5 V (D) IC = 0.5 mA, VCE = 3.9 V
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2003 ONE MARK

Question. 69

Choose the correct match for input resistance of various amplifier

configurations shown below :
Configuration Input resistance
CB : Common Base LO : Low
CC : Common Collector MO : Moderate
CE : Common Emitter HI : High
(A) CB − LO, CC − MO, CE − HI
(B) CB − LO, CC − HI, CE − MO
(C) CB − MO, CC − HI, CE − LO
(D) CB − HI, CC − LO, CE − MO

Question. 70

The circuit shown in the figure is best described as a

(A) bridge rectifier (B) ring modulator

(C) frequency discriminator (D) voltage double

Question. 71

If the input to the ideal comparators shown in the figure is a sinusoidal

signal of 8 V (peak to peak) without any DC component, then the
output of the comparators has a duty cycle of

(A) 1/2 (B) 1/3

(C) 1/6 (D) 1/2
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Question. 72

If the differential voltage gain and the common mode voltage gain of
a differential amplifier are 48 dB and 2 dB respectively, then common
mode rejection ratio is
(A) 23 dB (B) 25 dB
(C) 46 dB (D) 50 dB

Question. 73

Generally, the gain of a transistor amplifier falls at high frequencies

due to the
(A) internal capacitances of the device
(B) coupling capacitor at the input
(C) skin effect
(D) coupling capacitor at the output

2003 TWO MARKS

Question. 74

An amplifier without feedback has a voltage gain of 50, input resistance

of 1 k Ω and output resistance of 2.5 kΩ. The input resistance of the
current-shunt negative feedback amplifier using the above amplifier
with a feedback factor of 0.2, is

(A) 1 kΩ (B) 1 kΩ
11 5

(C) 5 kΩ (D) 11 kΩ

Question. 75

In the amplifier circuit shown in the figure, the values of R1 and R2

are such that the transistor is operating at VCE = 3 V and IC = 1.5
mA when its β is 150. For a transistor with β of 200, the operating
point (VCE , IC ) is
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Analog Circuits

(A) (2 V, 2 mA) (B) (3 V, 2 mA)

(C) (4 V, 2 mA) (D) (4 V, 1 mA)

Question. 76

The oscillator circuit shown in the figure has an ideal inverting

amplifier. Its frequency of oscillation (in Hz) is

(A) 1 (B) 1
(2π 6 RC) (2πRC)

(C) 1 (D) 6
( 6 RC) (2πRC)

Question. 77

The output voltage of the regulated power supply shown in the figure
is

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Analog Circuits

(A) 3 V (B) 6 V
(C) 9 V (D) 12 V

Question. 78

If the op-amp in the figure is ideal, the output voltage Vout will be
equal to

(A) 1 V (B) 6 V
(C) 14 V (D) 17 V

Question. 79

Three identical amplifiers with each one having a voltage gain of 50,
input resistance of 1 kΩ and output resistance of 250 Ω are cascaded.
The opened circuit voltages gain of the combined amplifier is
(A) 49 dB (B) 51 dB
(C) 98 dB (D) 102 dB

Question. 80

An ideal sawtooth voltages waveform of frequency of 500 Hz and

amplitude 3 V is generated by charging a capacitor of 2 μF in every
cycle. The charging requires
(A) Constant voltage source of 3 V for 1 ms
(B) Constant voltage source of 3 V for 2 ms
(C) Constant voltage source of 1 mA for 1 ms
(D) Constant voltage source of 3 mA for 2 ms
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2002 ONE MARK

Question. 81

In a negative feedback amplifier using voltage-series (i.e. voltage-

sampling, series mixing) feedback.

(A) Ri decreases and R0 decreases

(B) Ri decreases and R0 increases

(C) Ri increases and R0 decreases

(D) Ri increases and R0 increases

(Ri and R0 denote the input and output resistance respectively)

Question. 82

A 741-type opamp has a gain-bandwidth product of 1 MHz. A non-

inverting amplifier suing this opamp and having a voltage gain of 20
dB will exhibit a -3 dB bandwidth of

(A) 50 kHz (B) 100 kHz

(C) 1000 kHz (D) 1000 kHz

17 7.07

Question. 83

Three identical RC-coupled transistor amplifiers are cascaded. If each

of the amplifiers has a frequency response as shown in the figure, the
overall frequency response is as given in

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Analog Circuits

2002 TWO MARKS

Question. 84

The circuit in the figure employs positive feedback and is

intended to generate sinusoidal oscillation. If at a frequency
V (f) 1
f0, B (f) = 3 f = +0c, then to sustain oscillation at this frequency
V0 (f) 6

(A) R2 = 5R1 (B) R2 = 6R1

(C) R2 = R1 (D) R2 = R1
6 5

Question. 85

An amplifier using an opamp with a slew-rate SR = 1 V/μ sec has

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Analog Circuits

a gain of 40 dB. If this amplifier has to faithfully amplify sinusoidal

signals from dc to 20 kHz without introducing any slew-rate induced
distortion, then the input signal level must not exceed.
(A) 795 mV (B) 395 mV
(C) 79.5 mV (D) 39.5 mV

Question. 86

A zener diode regulator in the figure is to be designed to meet the

specifications: IL = 10 mA V0 = 10 V and Vin varies from 30 V to 50
V. The zener diode has Vz = 10 V and Izk (knee current) =1 mA. For
satisfactory operation

(A) R # 1800Ω (B) 2000Ω # R # 2200Ω

(C) 3700Ω # R # 4000Ω (D) R $ 4000Ω

Question. 87

The voltage gain Av = v0 of the JFET amplifier shown in the figure

vt
is IDSS = 10 mA Vp =− 5 V(Assume C1, C2 and Cs to be very large

(A) +16 (B) -16

(C) +8 (D) -6
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2001 ONE MARK

Question. 88

The current gain of a BJT is

gm
(A) gm r0 (B)
r
gm
(C) gm rπ (D)
rπ

Question. 89

Thee ideal OP-AMP has the following characteristics.

(A) Ri = 3, A = 3, R0 = 0 (B) Ri = 0, A = 3, R0 = 0
(C) Ri = 3, A = 3, R0 = 3 (D) Ri = 0, A = 3, R0 = 3

Question. 90

Consider the following two statements :

Statement 1 :
A stable multi vibrator can be used for generating square wave.
Statement 2:
Bistable multi vibrator can be used for storing binary information.
(A) Only statement 1 is correct
(B) Only statement 2 is correct
(C) Both the statements 1 and 2 are correct
(D) Both the statements 1 and 2 are incorrect

2001 TWO MARKS

Question. 91

An npn BJT has gm = 38 mA/V, C μ = 10−14 F, C π = 4 # 10−13 F, and

DC current gain β0 = 90 . For this transistor fT and fβ are
(A) fT = 1.64 # 108 Hz and fβ = 1.47 # 1010 Hz
(B) fT = 1.47 # 1010 Hz and fβ = 1.64 # 108 Hz
(C) fT = 1.33 # 1012 Hz and fβ = 1.47 # 1010 Hz
(D) fT = 1.47 # 1010 Hz and fβ = 1.33 # 1012 Hz
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Analog Circuits

Question. 92

The transistor shunt regulator shown in the figure has a regulated

output voltage of 10 V, when the input varies from 20 V to 30 V.
The relevant parameters for the zener diode and the transistor are
: Vz = 9.5 , VBE = 0.3 V, β = 99 , Neglect the current through RB .
Then the maximum power dissipated in the zener diode (Pz ) and the
transistor (PT ) are

(A) Pz = 75 mW, PT = 7.9 W

(B) Pz = 85 mW, PT = 8.9 W
(C) Pz = 95 mW, PT = 9.9 W
(D) Pz = 115 mW, PT = 11.9 W

Question. 93

The oscillator circuit shown in the figure is

(A) Hartely oscillator with foscillation = 79.6 MHz

(B) Colpitts oscillator with foscillation = 50.3 MHz
(C) Hartley oscillator with foscillation = 159.2 MHz
(D) Colpitts oscillator with foscillation = 159.3 MHz
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Question. 94

The inverting OP-AMP shown in the figure has an open-loop gain of

100.

The closed-loop gain V0 is

Vs
(A) − 8 (B) − 9
(C) − 10 (D) − 11

Question. 95

In the figure assume the OP-AMPs to be ideal. The output v0 of the

circuit is

#0 cos (100τ) dτ
t
(A) 10 cos (100t) (B) 10

#0 cos (100τ) dτ
t
(C) 10 - 4 (D) 10 - 4 d cos (100t)
dt

2000 ONE MARK

Question. 96

In the differential amplifier of the figure, if the source resistance of

the current source IEE is infinite, then the common-mode gain is
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Analog Circuits

(A) zero (B) infinite

(C) indeterminate (D) Vin1 + Vin2
2VT

Question. 97
In the circuit of the figure, V0 is

(A) -1 V (B) 2 V
(C) +1 V (D) +15 V

Question. 98
Introducing a resistor in the emitter of a common amplifier stabilizes
the dc operating point against variations in
(A) only the temperature (B) only the β of the transistor
(C) both temperature and β (D) none of the above

Question. 99
The current gain of a bipolar transistor drops at high frequencies
because of
(A) transistor capacitances
(B) high current effects in the base
(C) parasitic inductive elements
(D) the Early effect
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Analog Circuits

Question. 100
If the op-anp in the figure, is ideal, then v0 is

(A) zero (B) (V1 − V2) sin ωt

(C) − (V1 + V2) sin ωt (D) (V1 + V2) sin ωt

Question. 101
The configuration of the figure is a

(A) precision integrator (B) Hartely oscillator

(C) Butterworth high pass filter (D) Wien-bridge oscillator

Question. 102
Assume that the op-amp of the figure is ideal. If vi is a triangular
wave, then v0 will be

(A) square wave (B) triangular wave

(C) parabolic wave (D) sine wave
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Analog Circuits

Question. 103

The most commonly used amplifier is sample and hold circuits is

(A) a unity gain inverting amplifier
(B) a unity gain non-inverting amplifier
(C) an inverting amplifier with a gain of 10
(D) an inverting amplifier with a gain of 100

2000 TWO MARKS

Question. 104

In the circuit of figure, assume that the transistor is in the active

region. It has a large β and its base-emitter voltage is 0.7 V. The
value of Ic is

(A) Indeterminate since Rc is not given (B) 1 mA

(C) 5 mA (D) 10 mA

Question. 105

If the op-amp in the figure has an input offset voltage of 5 mV and

an open-loop voltage gain of 10000, then v0 will be

(A) 0 V (B) 5 mV
(C) + 15 V or -15 V (D) +50 V or -50 V
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Analog Circuits

1999 ONE MARK

Question. 106

The first dominant pole encountered in the frequency response of a

compensated op-amp is approximately at
(A) 5 Hz (B) 10 kHz
(C) 1 MHz (D) 100 MHz

Question. 107

Negative feedback in an amplifier

(A) reduces gain
(B) increases frequency and phase distortions
(C) reduces bandwidth
(D) increases noise

Question. 108

In the cascade amplifier shown in the given figure, if the common-

emitter stage (Q1) has a transconductance gm1 , and the common
base stage (Q2) has a transconductance gm2 , then the overall
transconductance g (= i 0 /vi) of the cascade amplifier is

(A) gm1 (B) gm2

gm1 gm2
(C) (D)
2 2

Question. 109

Crossover distortion behavior is characteristic of

(A) Class A output stage (B) Class B output stage
(C) Class AB output stage (D) Common-base output stage
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Analog Circuits

1999 TWO MARK

Question. 110
An amplifier has an open-loop gain of 100, an input impedance of
1 kΩ,and an output impedance of 100 Ω. A feedback network with a
feedback factor of 0.99 is connected to the amplifier in a voltage series
feedback mode. The new input and output impedances, respectively,
are
(A) 10 Ω and 1Ω (B) 10 Ω and 10 kΩ
(C) 100 kΩ and 1 Ω (D) 100 kΩ and 1 kΩ

Question. 111
A dc power supply has a no-load voltage of 30 V, and a full-load
voltage of 25 V at a full-load current of 1 A. Its output resistance
and load regulation, respectively, are
(A) 5 Ω and 20% (B) 25 Ω and 20%
(C) 5 Ω and 16.7% (D) 25 Ω and 16.7%

1998 ONE MARK

Question. 112
The circuit of the figure is an example of feedback of the following
type

(A) current series (B) current shunt

(C) voltage series (D) voltage shunt

Question. 113
In a differential amplifier, CMRR can be improved by using an
increased
(A) emitter resistance (B) collector resistance
(C) power supply voltages (D) source resistance
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Analog Circuits

Question. 114
From a measurement of the rise time of the output pulse of an
amplifier whose is a small amplitude square wave, one can estimate
the following parameter of the amplifier
(A) gain-bandwidth product (B) slow rate
(C) upper 3–dB frequency (D) lower 3–dB frequency

Question. 115
The emitter coupled pair of BJT’s given a linear transfer relation
between the differential output voltage and the differential output
voltage and the differential input voltage Vid is less α times the
thermal voltage, where α is
(A) 4 (B) 3
(C) 2 (D) 1

Question. 116
In a shunt-shunt negative feedback amplifier, as compared to the
basic amplifier
(A) both, input and output impedances,decrease
(B) input impedance decreases but output impedance increases
(C) input impedance increase but output
(D) both input and output impedances increases.

1998 TWO MARKS

Question. 117
A multistage amplifier has a low-pass response with three real poles
at s =− ω1 − ω2 and ω3 . The approximate overall bandwidth B of the
amplifier will be given by
(A) B = ω1 + ω2 + ω3 (B) 1 = 1 + 1 + 1
B ω1 ω2 ω3

(C) B = (ω1 + ω2 + ω3) 1/3 (D) B = ω12 + ω22 + ω23

Question. 118
One input terminal of high gain comparator circuit is connected to
ground and a sinusoidal voltage is applied to the other input. The
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Analog Circuits

output of comparator will be

(A) a sinusoid (B) a full rectified sinusoid
(C) a half rectified sinusoid (D) a square wave

Question. 119
In a series regulated power supply circuit, the voltage gain Av of the
‘pass’ transistor satisfies the condition
(A) Av " 3 (B) 1 << Av < 3
(C) Av . 1 (D) Av << 1

Question. 120
For full wave rectification, a four diode bridge rectifier is claimed to
have the following advantages over a two diode circuit :
(A) less expensive transformer,
(B) smaller size transformer, and
(C) suitability for higher voltage application.
Of these,
(A) only (1) and (2) are true
(B) only (1) and (3) are true
(C) only (2) and (3) are true
(D) (1), (2) as well as (3) are true

Question. 121
In the MOSFET amplifier of the figure is the signal output V1 and V2
obey the relationship

(A) V1 = V2 (B) V1 =−V2

2 2
(C) V1 = 2V2 (D) V1 =− 2V2
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Question. 122

For small signal ac operation, a practical forward biased diode can

be modelled as
(A) a resistance and a capacitance in series
(B) an ideal diode and resistance in parallel
(C) a resistance and an ideal diode in series
(D) a resistance

1997 ONE MARK

Question. 123

In the BJT amplifier shown in the figure is the transistor is based in

the forward active region. Putting a capacitor across RE will

(A) decrease the voltage gain and decrease the input impedance
(B) increase the voltage gain and decrease the input impedance
(C) decrease the voltage gain and increase the input impedance
(D) increase the voltage gain and increase the input impedance

Question. 124

A cascade amplifier stags is equivalent to

(A) a common emitter stage followed by a common base stage
(B) a common base stage followed by an emitter follower
(C) an emitter follower stage followed by a common base stage
(D) a common base stage followed by a common emitter stage
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Analog Circuits

Question. 125

In a common emitter BJT amplifier, the maximum usable supply

voltage is limited by
(A) Avalanche breakdown of Base-Emitter junction
(B) Collector-Base breakdown voltage with emitter open (BVCBO)
(C) Collector-Emitter breakdown voltage with base open (BVCBO)
(D) Zener breakdown voltage of the Emitter-Base junction

1997 TWO MARKS

Question. 126

In the circuit of in the figure is the current iD through the ideal diode
(zero cut in voltage and forward resistance) equals

(A) 0 A (B) 4 A
(C) 1 A (D) None of the above

Question. 127

The output voltage V0 of the circuit shown in the figure is

(A) − 4 V (B) 6 V
(C) 5 V (D) − 5.5 V
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Analog Circuits

Question. 128

A half wave rectifier uses a diode with a forward resistance Rf . The

voltage is Vm sin ωt and the load resistance is RL . The DC current is
given by
(A) Vm (B) Vm
2 RL π (R f + R L)

(C) 2Vm (D) Vm

π RL

1996 ONE MARK

Question. 129

In the circuit of the given figure, assume that the diodes are ideal and
the meter is an average indicating ammeter. The ammeter will read

(A) 0.4 2 A (B) 0.4 A

(C) 0.8 A (D) 0.4 mamp
π π

Question. 130

The circuit shown in the figure is that of

(A) a non-inverting amplifier (B) an inverting amplifier

(C) an oscillator (D) a Schmitt trigger
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Analog Circuits

1996 TWO MARKS

Question. 131

In the circuit shown in the given figure N is a finite gain amplifier

with a gain of k , a very large input impedance, and a very low output
impedance. The input impedance of the feedback amplifier with the
feedback impedance Z connected as shown will be

(A) Z b1 − 1 l (B) Z (1 − k)
k
(C) Z (D) Z
(k − 1) (1 − k)

Question. 132

A Darlington stage is shown in the figure. If the transconductance of

c
Q1 is gm1 and Q2 is gm2 , then the overall transconductance gmc ;T i cc E
vbe
is given by

(A) gm1 (B) 0.5 gm1

(C) gm2 (D) 0.5 gm2

Question. 133

Value of R in the oscillator circuit shown in the given figure, so

chosen that it just oscillates at an angular frequency of ω. The value
of ω and the required value of R will respectively be
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Analog Circuits

(A) 105 rad/ sec, 2 # 10 4 Ω (B) 2 # 10 4 rad/ sec, 2 # 10 4 Ω

(C) 2 # 10 4 rad/ sec, 105 Ω (D) 105 rad/ sec, 105 Ω

Question. 134

A zener diode in the circuit shown in the figure is has a knee current

of 5 mA, and a maximum allowed power dissipation of 300 mW.

What are the minimum and maximum load currents that can be

drawn safely from the circuit, keeping the output voltage V0 constant

at 6 V?

(A) 0 mA, 180 mA (B) 5 mA, 110 mA

(C) 10 mA, 55 mA (D) 60 mA, 180 mA

***********

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