Digital Logic (CSC111)
Digital Logic (CSC111)
Course Description: This course covers the concepts of digital logic and switching networks. The course
includes the fundamental concepts of boolean algebra and its application for circuit analysis, multilevel
gates networks, flip-lops, counters logic devices and synchronous and asynchronous sequential logic and
digital integrated circuits.
Course Objectives: The main objective of this course is to introduce the basic tools for the design of
digital circuits and introducing methods and procedures suitable for a variety of digital design
applications.
Course Contents:
Units Topics Hours Remarks
1. 1. Digital systems 1 6 hours
Binary systems Digital and analog system
Block diagram of digital computer
advantage/disadvantages of digital system
2. Binary Numbers 4
Number system (binary, decimal, octal,
hexadecimal), importance of number
system
Number base conversion (binary to
decimal, octal & hexadecimal and vice-
versa etc.)
Complements- r’s, (r-1)’s
Complement methods of
addition/subtraction (r’s & (r-1)’s)
3. Binary Systems 1
BCD codes, error-detection codes,
reflected code, alphanumeric codes
(ASCII, EBCDIC)
2. 1. Basic definition of Boolean Algebra 1 5 hours
Boolean Introduction
algebra and Common postulates
Logic Gates 2. Basic Theory of Boolean Algebra
Duality theorem
Basic theorems
De-Morgans theorem
3. Boolean Function 1
Boolean function and truth table
Algebraic manipulation and simplification
of Boolean function
Complement of a function
Logic operations and Logic gates
Logic circuit, AND, OR, NOT operation
Logic Gates: Basic gates, universal gates,
Ex-OR, Ex-NOR Buffer
Implementation of Boolean function using
gates
4. Logic operations and Logic gates 2
Logic circuit, AND, OR, NOT operation
Logic gates: Basic gates, Universal gates,
Ex-OR, Ex-NOR, Buffer
Implementation of Boolean function using
gates
2
5. Integrated Circuits
Concept of DIP, SIMM, linear and digital
ICs
RTL, TTL, MOS, CMOS,
Positive and Negative Logic
Special Characteristics
Characteristics of IC logic Families
3. 1. SOP and POS 2 5 hours
Simplification SOP, POS, min-term, max-term, standard
of Boolean and canonical form
Functions Simplification of SOP and POS function
using Boolean algebra
2. K-map 2
Importance of k-map
Simplification of SOP and POS form
2 and 3 variable k-map
4 variable k-map
Don’t care combination
3. NAND and NOR implementation 1
NAND and NOR conversion
Rules for NAND and NOR implementation
Implementation of SOP and POS logic
expressions using NAND, NOR and basic
gates
4. 1. Design Procedure 1 5 hours
Combinational Definition of combinational logic circuit
Logic Design procedure
Realization / Implementation
2. Adders/Sub-tractors 1
Half Adder - definition, truth table, logic
diagram, implementation
Full Adder - definition, truth table, logic
diagram, implementation
Half sub-tractor
Full sub-tractor
3. Code Conversion 1
General Concept
Code conversion – BCD to Excess-3
4. Analysis Procedure 1
General concept
Steps in analysis
Obtaining Boolean functions from logic
diagram
Obtaining truth table from logic diagram
5. NAND, NOR, Ex-OR circuits 1
Concept of multi-level NAND and NOR
circuits
Implementation of basic operations using
universal gates
Block diagram method of Boolean function
implementation
Realization of Ex-OR using basic gates and
universal gates
Parity generator, Parity checker
5. 1. Adders 1 8 hours
Combinational 4-bit parallel binary adder
Logic with MSI Decimal Adder – BCD Adder
and LSI 2. Magnitude Comparator 2
Definition
4-bit Magnitude Comparator
3. Decoder
Definition of Encoder and Decoder
3-to-8 line decoder
4. Multiplexers 1
Meaning of multiplexing and de-
multiplexing
4-to-1 line multiplexer
5. Read-Only-Memory (ROM) 1
Types of ROM
Combinational logic implementation of
ROM
6. Programmable Logic Array (PLA) 1.5
Difference between ROM and PLA
Block diagram of PLA
PLA Program Table
Implementation of PLA
7. Programmable Array Logic (PAL) 1.5
PAL programming table
Circuit design
6. 1. Flip-Flop 3 10 hours
Synchronous Definition of sequential circuit
and RS flip-flop, clocked RS FF
Asynchronous D flip-flop, J-K flip-flop, T flip-flop, J-K
Sequential Master Slave flip-flop
Logic 2. Triggering of flip-flop 2
Clock pulse
Positive and negative edge triggering
Clocked J-K FF, edge triggered D FF
Direct inputs
3. Design with state equations and state reduction 3
table
State table
State diagram
State equation
State reduction and assignment
4. Design procedure
Design procedure of sequential circuits
5. Introduction to Asynchronous circuits 2
Basic definition
Difference between Synchronous and
Asynchronous circuit
State table
State diagram
State equation
Circuits with latches.
7. 1. Registers 1 6 hours
Registers and Introduction to register
Counters Shift registers – serial-in serial-out,
parallel-in parallel-out, serial-in parallel-
out, parallel-in serial-out
2. Ripple Counters 3
Definition of counter, ripple and
synchronous counter
Asynchronous counter – BCD ripple
counter, Binary ripple counter
3. Synchronous Counters
Binary counter
Binary up/down counter
BCD counter
4. Timing sequences 1
Word time generation
Timing signals
Johnson’s counter
5. Memory Unit 1
Introduction to memory unit
Block diagram
Read/Write operation
Integrated circuit memory
Text Books:
1. M. Morris Mano, “Digital Logic & Computer Design”
Reference Books:
Laboratory works:
Introduction to logic gates with IC pin details and verify the truth table using bread board.
1. Use any one simulator to simulate the basic logic circuits functions.
2. Design of half adder, full adder, subtractor using basic logic gates.
3. Study and verification of 3-8 decoder using IC.
4. Study and verification of 8-3 encoder using IC
5. Implementation of 4-1 Mux using IC
6. Implementation of 1-4 DeMux using IC
7. Implementation of 7 Segment Display
8. Verification of Flip flop
9. Design and verification of Up counter/Down counter
10. Design and verification of Shift Register
Required devices:
1. Bread board
2. Multimeters
3. IC’s/Logic Gates
Model Question:
000
010 011
101 110